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Author SHA1 Message Date
Matt Arsenault e174c278ca AMDGPU/GlobalISel: Fix mapping G_ICMP with constrained result 
When SI_IF is inserted, it constrains the source register with a
register class, which was quite likely a G_ICMP. This was incorrectly
treating it as a scalar, and then applyMappingImpl would end up
producing invalid MIR since this was unexpected.

Also fix not using all VGPR sources for vcc outputs.
 2020-02-12 16:19:45 -08:00
Matt Arsenault 6bdb92d833 AMDGPU/GlobalISel: Improve regbankselect for icmp s16 
Account for 64-bit scalar eq/ne when available.

llvm-svn: 365487
 2019-07-09 14:13:09 +00:00