Commit Graph

319 Commits

Author SHA1 Message Date
Rafael Espindola f351292141 Remove redundant argument.
llvm-svn: 306189
2017-06-24 00:26:57 +00:00
Rafael Espindola 801b42de31 ARM: move some logic from processFixupValue to applyFixup.
processFixupValue is called on every relaxation iteration. applyFixup
is only called once at the very end. applyFixup is then the correct
place to do last minute changes and value checks.

While here, do proper range checks again for fixup_arm_thumb_bl. We
used to do it, but dropped because of thumb2. We now do it again, but
use the thumb2 range.

llvm-svn: 306177
2017-06-23 22:52:36 +00:00
Krzysztof Parzyszek f63ad39e7d [Hexagon] Handle a global operand to A2_addi when creating duplexes
llvm-svn: 306012
2017-06-22 15:53:31 +00:00
Rafael Espindola 88d9e37ec8 Use a MutableArrayRef. NFC.
llvm-svn: 305968
2017-06-21 23:06:53 +00:00
Zachary Turner 264b5d9e88 Move Object format code to lib/BinaryFormat.
This creates a new library called BinaryFormat that has all of
the headers from llvm/Support containing structure and layout
definitions for various types of binary formats like dwarf, coff,
elf, etc as well as the code for identifying a file from its
magic.

Differential Revision: https://reviews.llvm.org/D33843

llvm-svn: 304864
2017-06-07 03:48:56 +00:00
Chandler Carruth 6bda14b313 Sort the remaining #include lines in include/... and lib/....
I did this a long time ago with a janky python script, but now
clang-format has built-in support for this. I fed clang-format every
line with a #include and let it re-sort things according to the precise
LLVM rules for include ordering baked into clang-format these days.

I've reverted a number of files where the results of sorting includes
isn't healthy. Either places where we have legacy code relying on
particular include ordering (where possible, I'll fix these separately)
or where we have particular formatting around #include lines that
I didn't want to disturb in this patch.

This patch is *entirely* mechanical. If you get merge conflicts or
anything, just ignore the changes in this patch and run clang-format
over your #include lines in the files.

Sorry for any noise here, but it is important to keep these things
stable. I was seeing an increasing number of patches with irrelevant
re-ordering of #include lines because clang-format was used. This patch
at least isolates that churn, makes it easy to skip when resolving
conflicts, and gets us to a clean baseline (again).

llvm-svn: 304787
2017-06-06 11:49:48 +00:00
Krzysztof Parzyszek e260332838 [Hexagon] Remove C6 and C7 as separate registers
These are M0 and M1. Removing duplicated registers reduces the number
of explicit register aliasing.

llvm-svn: 302306
2017-05-05 22:12:12 +00:00
Krzysztof Parzyszek 2af5037d34 [Hexagon] Use automatically-generated scheduling information for HVX
Patch by Jyotsna Verma.

llvm-svn: 302073
2017-05-03 20:10:36 +00:00
Krzysztof Parzyszek 57a8bb4343 [Hexagon] Change iconst to emit 27bit relocation
Patch by Colin LeMahieu.

llvm-svn: 301956
2017-05-02 18:19:11 +00:00
Krzysztof Parzyszek a750383d0f [Hexagon] Add extenders for GD_PLT_B22_PCREL and LD_PLT_B22_PCREL
Patch by Sid Manning.

llvm-svn: 301955
2017-05-02 18:15:33 +00:00
Krzysztof Parzyszek 32e20b80c6 [Hexagon] Formatting changes, NFC
llvm-svn: 301953
2017-05-02 18:09:07 +00:00
Krzysztof Parzyszek 188ab98f67 [Hexagon] Remove unused validSubtarget TSFlags
Patch by Colin LeMahieu.

llvm-svn: 301952
2017-05-02 18:05:36 +00:00
Krzysztof Parzyszek b0af1ef741 [Hexagon] Make sure duplexed dealloc_returns are checked for double jumps
Patch by Colin LeMahieu.

llvm-svn: 301951
2017-05-02 18:03:08 +00:00
Krzysztof Parzyszek 49f7e0a98b [Hexagon] Move checking AXOK to checker
Patch by Colin LeMahieu.

llvm-svn: 301949
2017-05-02 18:00:37 +00:00
Krzysztof Parzyszek 57f5046b4a [Hexagon] Remove unneeded code from HexagonShuffler
Patch by Colin LeMahieu.

llvm-svn: 301947
2017-05-02 17:58:52 +00:00
Krzysztof Parzyszek c15f8d2a08 [Hexagon] Extract function that checks endloops with other branches
Change location number to point to conflicting branch instruction.

Patch by Colin LeMahieu.

llvm-svn: 301946
2017-05-02 17:56:11 +00:00
Krzysztof Parzyszek 1cc6bfbc83 [Hexagon] Add new packet iterator which will iterate through duplexes
Patch by Colin LeMahieu.

llvm-svn: 301945
2017-05-02 17:53:51 +00:00
Krzysztof Parzyszek 107f82d128 [Hexagon] Check for .cur def without use without using a map data structure
Patch by Colin LeMahieu.

llvm-svn: 301943
2017-05-02 17:51:14 +00:00
Krzysztof Parzyszek 4a1c3f0aaa [Hexagon] Replace CVI_VM_CUR_LD type with CVI_VM_LD
A .cur instruction can be identified by checking isCVINew() && mayLoad().

Patch by Colin LeMahieu.

llvm-svn: 301829
2017-05-01 20:16:35 +00:00
Krzysztof Parzyszek 55db483a46 [Hexagon] Improving error reporting for writing to read only registers
Patch by Colin LeMahieu.

llvm-svn: 301828
2017-05-01 20:10:41 +00:00
Krzysztof Parzyszek e96d27a997 [Hexagon] Give better error messages for solo instruction errors
Patch by Colin LeMahieu.

llvm-svn: 301827
2017-05-01 20:06:01 +00:00
Krzysztof Parzyszek e12d1e70cb [Hexagon] Improve shuffle error reporting
Patch by Colin LeMahieu.

llvm-svn: 301823
2017-05-01 19:41:43 +00:00
Andrew V. Tischenko 75745d0c3e This patch closes PR#32216: Better testing of schedule model instruction latencies/throughputs.
The details are here: https://reviews.llvm.org/D30941

llvm-svn: 300311
2017-04-14 07:44:23 +00:00
Krzysztof Parzyszek 058abf1a4a [Hexagon] Change the vector scaling for vector offsets
Keep full offset value on MI-level instructions, but have it scaled down
in the MC-level instructions.

llvm-svn: 299664
2017-04-06 17:28:21 +00:00
Alex Bradbury 866113c2ea Add MCContext argument to MCAsmBackend::applyFixup for error reporting
A number of backends (AArch64, MIPS, ARM) have been using
MCContext::reportError to report issues such as out-of-range fixup values in
their TgtAsmBackend. This is great, but because MCContext couldn't easily be
threaded through to the adjustFixupValue helper function from its usual
callsite (applyFixup), these backends ended up adding an MCContext* argument
and adding another call to applyFixup to processFixupValue. Adding an
MCContext parameter to applyFixup makes this unnecessary, and even better -
applyFixup can take a reference to MCContext rather than a potentially null
pointer.

Differential Revision: https://reviews.llvm.org/D30264

llvm-svn: 299529
2017-04-05 10:16:14 +00:00
Krzysztof Parzyszek d04c9b999c [Hexagon] Remove unused variables
Found by PVS-Studio. Fixes llvm.org/PR31676.

llvm-svn: 299262
2017-03-31 21:03:59 +00:00
Colin LeMahieu ddebad956e [Hexagon] Updating inline saturate lanes for v62 version.
llvm-svn: 297920
2017-03-16 00:35:28 +00:00
Krzysztof Parzyszek 7a0981aa38 [Hexagon] Add -mhvx option to the Hexagon backend
llvm-svn: 297393
2017-03-09 17:05:11 +00:00
Simon Pilgrim ee6ef4d6dd Fix 'variable set but not used' warning when assertions are disabled.
llvm-svn: 295585
2017-02-19 00:03:46 +00:00
Benjamin Kramer efcf06f5f2 Move symbols from the global namespace into (anonymous) namespaces. NFC.
llvm-svn: 294837
2017-02-11 11:06:55 +00:00
Krzysztof Parzyszek f9015e62fd [Hexagon] Introduce Hexagon V62
llvm-svn: 294805
2017-02-10 23:46:45 +00:00
Krzysztof Parzyszek a72fad980c [Hexagon] Replace instruction definitions with auto-generated ones
llvm-svn: 294753
2017-02-10 15:33:13 +00:00
Krzysztof Parzyszek 5ea971ced5 [Hexagon] Update instruction types
Remove TypeXTYPE, TypeALU32, TypeSYSTEM, TypeJR, and instead use their
architecture counterparts.

Patch by Colin LeMahieu.

llvm-svn: 294321
2017-02-07 17:47:37 +00:00
Krzysztof Parzyszek 0605f3fddd [Hexagon] Address ASAN and UBSAN failures after r294226
Reinstate r294256 with a fix.

llvm-svn: 294269
2017-02-07 02:31:53 +00:00
Krzysztof Parzyszek becf0a362a Revert "[Hexagon] Address ASAN and UBSAN failures after r294226"
This reverts commit r294256. It seems to be causing more problems instead
of solving them.

llvm-svn: 294259
2017-02-06 23:30:17 +00:00
Krzysztof Parzyszek 35a7838954 [Hexagon] Address ASAN and UBSAN failures after r294226
llvm-svn: 294256
2017-02-06 23:11:32 +00:00
Krzysztof Parzyszek 8cdfe8ecf3 [Hexagon] Update MCTargetDesc
Changes include:
- Updates to the instruction descriptor flags.
- Improvements to the packet shuffler and checker.
- Updates to the handling of certain relocations.
- Better handling of duplex instructions.

llvm-svn: 294226
2017-02-06 19:35:46 +00:00
Krzysztof Parzyszek d0d42f0ec8 [Hexagon] Adding opExtentBits and opExtentAlign to GPrel instructions
Patch by Colin LeMahieu.

llvm-svn: 293933
2017-02-02 20:35:12 +00:00
Krzysztof Parzyszek e17b0bfb24 [Hexagon] Fix relocation kind for extended predicated calls
Patch by Sid Manning.

llvm-svn: 293931
2017-02-02 20:21:56 +00:00
Krzysztof Parzyszek 357b048666 [Hexagon] Remove A4_ext_* pseudo instructions
Patch by Colin LeMahieu.

llvm-svn: 293929
2017-02-02 19:58:22 +00:00
Krzysztof Parzyszek bc4dc9b4b9 [Hexagon] Emitting individual instructions without copying them
Patch by Colin LeMahieu.

llvm-svn: 293899
2017-02-02 15:32:26 +00:00
Krzysztof Parzyszek f65b8f14f4 [Hexagon] Rename TypeCOMPOUND to TypeCJ
llvm-svn: 293894
2017-02-02 15:03:30 +00:00
Eugene Zelenko b2ca1b3f37 [Hexagon, TableGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 290925
2017-01-04 02:02:05 +00:00
Eugene Zelenko 401f381533 [Hexagon] Other attempt to fix build with enabled asserts broken in 290024 (NFC).
llvm-svn: 290028
2016-12-17 01:29:35 +00:00
Eugene Zelenko 5015689b32 [Hexagon] Fix build with enabled asserts broken in 290024 (NFC).
llvm-svn: 290027
2016-12-17 01:17:18 +00:00
Eugene Zelenko 58655bbc60 [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 290024
2016-12-17 01:09:05 +00:00
Colin LeMahieu 8170754919 [Hexagon] Changing from literal numeric value to argument since #-1 will not parse when '-' is converted to a token.
llvm-svn: 288634
2016-12-05 04:29:00 +00:00
Daniel Sanders 72db2a390a Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
Summary:
* ARM is omitted from this patch because this check appears to expose bugs in this target.
* Mips is omitted from this patch because this check either detects bugs or deliberate
  emission of instructions that don't satisfy their predicates. One deliberate
  use is the SYNC instruction where the version with an operand is correctly
  defined as requiring MIPS32 while the version without an operand is defined
  as an alias of 'SYNC 0' and requires MIPS2.
* X86 is omitted from this patch because it doesn't use the tablegen-erated
  MCCodeEmitter infrastructure.

Patches for ARM and Mips will follow.

Depends on D25617

Reviewers: tstellarAMD, jmolloy

Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits

Differential Revision: https://reviews.llvm.org/D25618

llvm-svn: 287439
2016-11-19 13:05:44 +00:00
Simon Pilgrim 6ba672e542 Fix spelling mistakes in Hexagon target comments. NFC.
Identified by Pedro Giffuni in PR27636.

llvm-svn: 287248
2016-11-17 19:21:20 +00:00
Chandler Carruth 30e0029904 Delete a dead store found by PVS-Studio.
Quite sad we still aren't really using aggressive dead code warnings
from Clang that we could potentially use to catch this and so many other
things.

llvm-svn: 285936
2016-11-03 17:01:38 +00:00
Mehdi Amini f42454b94b Move the global variables representing each Target behind accessor function
This avoids "static initialization order fiasco"

Differential Revision: https://reviews.llvm.org/D25412

llvm-svn: 283702
2016-10-09 23:00:34 +00:00
Colin LeMahieu c69f7ff6c0 [Hexagon] Adding change of flow max 1 (cofMax1) TS flag for marking this restriction rather than implying it from TypeJR.
llvm-svn: 283665
2016-10-08 17:18:51 +00:00
Colin LeMahieu 9694825d32 [Hexagon][NFC] Using documented instruction type name V4LDST instead of MEMOP.
llvm-svn: 283582
2016-10-07 19:11:28 +00:00
Colin LeMahieu 8ed1aee9dd [Hexagon] NFC Removing 'V4_' prefix from duplex instruction names.
llvm-svn: 283514
2016-10-07 00:15:07 +00:00
Mehdi Amini 36d33fc109 Use StringRef instead of raw pointers in MCAsmInfo/MCInstrInfo APIs (NFC)
llvm-svn: 283018
2016-10-01 06:46:33 +00:00
Krzysztof Parzyszek 0b8672269c [Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFC
llvm-svn: 279255
2016-08-19 15:17:19 +00:00
Krzysztof Parzyszek 75e74ee699 [Hexagon] Rename the HEXAGON_MC namespace to Hexagon_MC, NFC
llvm-svn: 279243
2016-08-19 14:09:47 +00:00
Krzysztof Parzyszek 6421b934ec [Hexagon] Mark PS_jumpret as pseudo-instruction, expand it into J2_jumpr
llvm-svn: 279241
2016-08-19 14:04:45 +00:00
Justin Bogner b03fd12cef Replace "fallthrough" comments with LLVM_FALLTHROUGH
This is a mechanical change of comments in switches like fallthrough,
fall-through, or fall-thru to use the LLVM_FALLTHROUGH macro instead.

llvm-svn: 278902
2016-08-17 05:10:15 +00:00
Krzysztof Parzyszek be976d4ea9 [Hexagon] Standardize pseudo-instructions for calls and returns
- CALLv3nr        PS_call_nr
- CALLRv3nr       PS_callr_nr
- CALLstk         PS_call_stk

- TCRETURNi       PS_tailcall_i
- TCRETURNr       PS_tailcall_r

- JMPret          PS_jmpret
- JMPrett         PS_jmprett
- JMPretf         PS_jmpretf
- JMPrettnew      PS_jmprettnew
- JMPretfnew      PS_jmpretfnew
- JMPrettnewpt    PS_jmprettnewpt
- JMPretfnewpt    PS_jmpretfnewpt

llvm-svn: 278499
2016-08-12 11:12:02 +00:00
Joel Jones 373d7d30dd MC] Provide an MCTargetOptions to implementors of MCAsmBackendCtorTy, NFC
Some targets, notably AArch64 for ILP32, have different relocation encodings
based upon the ABI. This is an enabling change, so a future patch can use the
ABIName from MCTargetOptions to chose which relocations to use. Tested using
check-llvm.

The corresponding change to clang is in: http://reviews.llvm.org/D16538

Patch by: Joel Jones

Differential Revision: https://reviews.llvm.org/D16213

llvm-svn: 276654
2016-07-25 17:18:28 +00:00
Nirav Dave 8603062ee4 Fix branch relaxation in 16-bit mode.
Thread through MCSubtargetInfo to relaxInstruction function allowing relaxation
to generate jumps with 16-bit sized immediates in 16-bit mode.

This fixes PR22097.

Reviewers: dwmw2, tstellarAMD, craig.topper, jyknight

Subscribers: jfb, arsenm, jyknight, llvm-commits, dsanders

Differential Revision: http://reviews.llvm.org/D20830

llvm-svn: 275068
2016-07-11 14:23:53 +00:00
Benjamin Kramer 4d9d2cc77f [Hexagon] Create global std::map lazily.
This could of course be a simple binary search with no global state
involved at all if someone cares enough. Just don't make everyone
linking the hexagon backend pay for it on process startup and shutdown.

llvm-svn: 274437
2016-07-02 13:05:12 +00:00
Rafael Espindola d86e8bb0ed Delete MCCodeGenInfo.
MC doesn't really care about CodeGen stuff, so this was just
complicating target initialization.

llvm-svn: 274258
2016-06-30 18:25:11 +00:00
Reid Kleckner 858239d5f8 Prune some includes from headers and sink some inline functions
MCSymbol.h shouldn't pull in MCAssembler.h, just MCFragment.h.
MCLinkerOptimizationHint.h shouldn't need MCMachObjectWriter.h.  The
rest is fixing the fallout.

llvm-svn: 273507
2016-06-22 23:23:08 +00:00
David Majnemer e61e4bfd87 Replace silly uses of 'signed' with 'int'
llvm-svn: 273244
2016-06-21 05:10:24 +00:00
Krzysztof Parzyszek 96bb4fe539 [Hexagon] Separate C8 and USR to avoid unwanted subregister composition
Composing subreg_loreg with subreg_oveflow leads to strange results with
lane masks for register classes with subreg_loreg. In particular, dead
lane detection generates incorrect code.

llvm-svn: 271087
2016-05-28 01:51:16 +00:00
David Blaikie bc744272f8 Fix -Wunused-variable in non-Asserts build
llvm-svn: 270118
2016-05-19 20:44:22 +00:00
David Blaikie f869d3190c Simplify conditional unreachable into an assertion
llvm-svn: 270111
2016-05-19 20:28:40 +00:00
Ron Lieberman 562e19eecb Fix a covnersion from string to bool issue used in an assert
Problem Was exposed by -Wstring-conversion
    

llvm-svn: 270087
2016-05-19 18:05:56 +00:00
Rafael Espindola 8c34dd8257 Delete Reloc::Default.
Having an enum member named Default is quite confusing: Is it distinct
from the others?

This patch removes that member and instead uses Optional<Reloc> in
places where we have a user input that still hasn't been maped to the
default value, which is now clear has no be one of the remaining 3
options.

llvm-svn: 269988
2016-05-18 22:04:49 +00:00
Krzysztof Parzyszek a0ea73c9af [scan-build] fix dead store warnings emitted on LLVM Hexagon code base
Patch by Apelete Seketeli.

Differential Revision: http://reviews.llvm.org/D19900

llvm-svn: 269415
2016-05-13 13:13:59 +00:00
Krzysztof Parzyszek e737b86f8c [Hexagon] Handle double-vector registers as new-value producers
Patch by Colin LeMahieu.

llvm-svn: 267897
2016-04-28 15:54:48 +00:00
Colin LeMahieu a3782da3e3 [Hexagon] Merging nops in to previous packet rather than always creating a new one.
llvm-svn: 267798
2016-04-27 21:37:44 +00:00
Krzysztof Parzyszek 3e28229000 [Hexagon] Few fixes for exception handling
llvm-svn: 267469
2016-04-25 21:05:19 +00:00
Krzysztof Parzyszek e6ee481bdf [Hexagon] Correctly set "Flags" in ELF header
llvm-svn: 267397
2016-04-25 12:49:47 +00:00
Craig Topper 855d182656 Fix a couple assertions that can never fire because they just contained the text string which always evaluates to true. Add a ! so they'll evaluate to false.
llvm-svn: 267312
2016-04-24 02:01:25 +00:00
Krzysztof Parzyszek 64d4e2bc0d [Hexagon] Add -mv.. options to override CPU selection
This is for compatibility with scripts that use -mv5, etc. with the
assembler.

llvm-svn: 266918
2016-04-20 21:17:40 +00:00
Krzysztof Parzyszek 5626703837 [Hexagon] Fix handling of lcomm directive
Patch by Colin LeMahieu.

llvm-svn: 266882
2016-04-20 15:54:13 +00:00
Mehdi Amini b550cb1750 [NFC] Header cleanup
Removed some unused headers, replaced some headers with forward class declarations.

Found using simple scripts like this one:
clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap'

Patch by Eugene Kosov <claprix@yandex.ru>

Differential Revision: http://reviews.llvm.org/D19219

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 266595
2016-04-18 09:17:29 +00:00
Krzysztof Parzyszek b14f4fd0de [Hexagon] Add handling fixups and instruction relaxation
llvm-svn: 263981
2016-03-21 20:27:17 +00:00
Krzysztof Parzyszek c6f1e1a709 [Hexagon] Properly encode registers in duplex instructions
llvm-svn: 263980
2016-03-21 20:13:33 +00:00
Colin LeMahieu 5cb6eea664 [Hexagon] Modifying r262258 to only be in effect in the hand assembler path, not the integrated assembler.
llvm-svn: 262400
2016-03-01 21:37:41 +00:00
Colin LeMahieu ab9eca4d9f [Hexagon] As a size optimization, not lazy extending TPREL or DTPREL variants since they're usually in range.
llvm-svn: 262258
2016-02-29 21:21:56 +00:00
Colin LeMahieu 9e5a9c32db [Hexagon] Missed member initialization causing ubsan failure.
llvm-svn: 262252
2016-02-29 20:42:25 +00:00
Colin LeMahieu b9f1eae328 [Hexagon] Setting sign mismatch flag on expression instead of using bit tricks.
llvm-svn: 262243
2016-02-29 19:17:56 +00:00
Colin LeMahieu 73cd686ce1 [Hexagon] Using MustExtend flag on expression instead of passing around bools.
llvm-svn: 262238
2016-02-29 18:39:51 +00:00
Chad Rosier c00ab4f27d [Hexagon] Remove redundant check.
llvm-svn: 261232
2016-02-18 17:49:57 +00:00
Krzysztof Parzyszek 7a737d1abb [Hexagon] Implement TLS support
Patch by Anand Kodnani.

llvm-svn: 261218
2016-02-18 15:42:57 +00:00
Colin LeMahieu 5e552d141f [Hexagon] Replacing reference/dereference with reference cast.
llvm-svn: 261133
2016-02-17 18:50:21 +00:00
Benjamin Kramer 98520ca73b [Hexagon] cast<> a reference instead of referencing + dereferencing.
llvm-svn: 261077
2016-02-17 09:28:45 +00:00
Colin LeMahieu ecef1d9cbc [Hexagon] Adding relocation for code size, cold path optimization allowing a 23-bit 4-byte aligned relocation to be a valid instruction encoding.
The usual way to get a 32-bit relocation is to use a constant extender which doubles the size of the instruction, 4 bytes to 8 bytes.

Another way is to put a .word32 and mix code and data within a function.  The disadvantage is it's not a valid instruction encoding and jumping over it causes prefetch stalls inside the hardware.

This relocation packs a 23-bit value in to an "r0 = add(rX, #a)" instruction by overwriting the source register bits.  Since r0 is the return value register, if this instruction is placed after a function call which return void, r0 will be filled with an undefined value, the prefetch won't be confused, and the callee can access the constant value by way of the link register.

llvm-svn: 261006
2016-02-16 20:38:17 +00:00
Benjamin Kramer 986a49b036 [Hexagon] Hoist nonnull assert up.
Once a pointer is turned into a reference it cannot be nullptr, clang
rightfully warns about this assert being a tautology. Put the assert
before the reference is created.

llvm-svn: 260949
2016-02-16 09:53:47 +00:00
Colin LeMahieu c7b2124d49 [NFC] Fixing naming convention, lowercase start of function name.
llvm-svn: 260903
2016-02-15 18:47:55 +00:00
Colin LeMahieu 98c8e070b9 [Hexagon] Wrapping all MCExprs inside MCOperands within HexagonMCExpr to simplify handling and allow flags on the expression.
llvm-svn: 260902
2016-02-15 18:42:07 +00:00
Colin LeMahieu 0e05192d49 [MC] Merge VK_PPC_TPREL in to generic VK_TPREL.
Differential Revision: http://reviews.llvm.org/D17038

llvm-svn: 260401
2016-02-10 18:32:01 +00:00
Colin LeMahieu 1c79d9be6e [Hexagon] Fixing relocation generation and adding tests.
llvm-svn: 260259
2016-02-09 19:18:02 +00:00
Chris Bieneman e49730d4ba Remove autoconf support
Summary:
This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html

"I felt a great disturbance in the [build system], as if millions of [makefiles] suddenly cried out in terror and were suddenly silenced. I fear something [amazing] has happened."
- Obi Wan Kenobi

Reviewers: chandlerc, grosbach, bob.wilson, tstellarAMD, echristo, whitequark

Subscribers: chfast, simoncook, emaste, jholewinski, tberghammer, jfb, danalbert, srhines, arsenm, dschuff, jyknight, dsanders, joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D16471

llvm-svn: 258861
2016-01-26 21:29:08 +00:00
Rafael Espindola 8340f94df1 Convert a few assert failures into proper errors.
Fixes PR25944.

llvm-svn: 257697
2016-01-13 22:56:57 +00:00
Krzysztof Parzyszek bc17b68a47 [Hexagon] Add check for nullptr in getFixupNoBits
llvm-svn: 257338
2016-01-11 15:51:53 +00:00