Commit Graph

392908 Commits

Author SHA1 Message Date
Jay Foad ce098ccc1c [AMDGPU] Simplify tablegen files. NFC.
There is no need to cast records to strings before comparing them.
2021-07-07 09:19:23 +01:00
Jean Perier c2d4d6a1fd [flang] Create HostAssocDetails symbols when needed for mis-parsed ArrayRef
Name resolution is always creating symbols with HostAssocDetails
for host variable names inside internal procedures. This helps lowering
identifying and dealing with such variables inside internal procedures.

However, the case where the variable appears in an ArrayRef mis-parsed
as a FunctionRef goes through a different name resolution path that did
not create such HostAssocDetails when needed. Pointer assignment RHS
are also skipping this path.

Add the logic to create HostAssocDetails for host symbols inisde internal
procedures that appear in mis-parsed ArrayRef or in pointer assignment RHS.

Differential Revision: https://reviews.llvm.org/D105464
2021-07-07 10:07:19 +02:00
Srishti Srivastava 0c1a7730f5 [MLIR] Simplify affine.if having yield values and trivial conditions
When an affine.if operation is returning/yielding results and has a
trivially true or false condition, then its 'then' or 'else' block,
respectively, is promoted to the affine.if's parent block and then, the
affine.if operation is replaced by the correct results/yield values.
Relevant test cases are also added.

Signed-off-by: Srishti Srivastava <srishti.srivastava@polymagelabs.com>

Differential Revision: https://reviews.llvm.org/D105418
2021-07-07 13:02:10 +05:30
Fangrui Song 1894c89389 [llvm-readobj][test] Improve grouped option test 2021-07-06 23:02:33 -07:00
Uday Bondhugula 4acf3807e3 [MLIR] Split out GPU ops library from Transforms
Split out GPU ops library from GPU transforms. This allows libraries to
depend on GPU Ops without needing/building its transforms.

Differential Revision: https://reviews.llvm.org/D105472
2021-07-07 11:26:49 +05:30
Hsiangkai Wang 593bf9b4de [Clang][RISCV] Implement vlseg and vlsegff.
Differential Revision: https://reviews.llvm.org/D103527
2021-07-07 13:44:40 +08:00
Stanislav Mekhanoshin b16400449f [AMDGPU] isPassEnabled() helper to check cl::opt and OptLevel
We have several checks for both cl::opt and OptLevel over our
pass config, although these checks do not properly work if
default value of a cl::opt will be false. Create a helper to
use instead and properly handle it. NFC for now.

Differential Revision: https://reviews.llvm.org/D105517
2021-07-06 21:53:35 -07:00
Johannes Doerfert 168a9234d7 [Attributor][FIX] Replace uses first, then values
Before we replaced value by registering all their uses. However, as we
replace a value old uses become stale. We now replace values explicitly
and keep track of "new values" when doing so to avoid replacing only
uses in stale/old values but not their replacements.
2021-07-06 22:43:51 -05:00
Johannes Doerfert 9bd2ee0788 [Attriibutor][NFC] Precommit heap-2-stack test case 2021-07-06 22:41:23 -05:00
Johannes Doerfert aa3768278d [Attributor] Introduce a helper function to deal with undef + none
We often need to deal with the value lattice that contains none and
undef as special values. A simple helper makes this much nicer.

Differential Revision: https://reviews.llvm.org/D103857
2021-07-06 22:41:21 -05:00
Johannes Doerfert fc82409b5c [Attributor] Simplify operands inside of simplification AAs first
When we do simplification via AAPotentialValues or AAValueConstantRange
we need to simplify the operands of an instruction we deconstruct first.
This does not only improve the result, see for example range.ll, but is
required as we allow outside AAs to provide simplification rules via
callbacks. If we do ignore the simplification rules and base other
simplifications on the IR instead we can create an inconsistent state.
2021-07-06 22:41:18 -05:00
Uday Bondhugula 11d88c4acb [MLIR][NFC] Move normalizeAffine methods to Affine utils
The normalizeAffineForOp and normalizedAffineParallel methods were
misplaced in the AffineLoopNormalize pass file while their declarations
were in affine utils. Move these to affine Utils.cpp. NFC.

Differential Revision: https://reviews.llvm.org/D105468
2021-07-07 08:11:28 +05:30
Tom Stellard 7f1c077c30 tests/CodeGen: Use %python lit substitution when invoking python
This will use the python that LLVM was configured to use rather than
python from PATH.

Reviewed By: serge-sans-paille

Differential Revision: https://reviews.llvm.org/D105224
2021-07-06 18:46:36 -07:00
Nemanja Ivanovic 3553698de7 [PowerPC] Re-enable combine for i64 BSWAP on targets without LDBRX
The combine was disabled in 4e22c7265d as it caused failures in
the ppc64be-multistage (bootstrap) bot.
It turns out that the combine did not correctly update the MMO for
the high load which caused aliased stores to be reported as unaliased.
This patch fixes that problem and re-enables the combine.
2021-07-06 20:42:01 -05:00
Matheus Izvekov f2d5fce86e [clang] fixes named return of variables with dependent alignment
Named return of a variable with aligned attribute would
trip an assert in case alignment was dependent.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D105380
2021-07-07 02:54:55 +02:00
Eli Friedman 75eb43ab49 [AArch64] Add more tests related to vselect with constant condition.
Not a complete set of tests, but a starting point if anyone wants to
look at improving this.
2021-07-06 17:06:22 -07:00
Eli Friedman 56b3e9edc4 [AArch64] Sync isDef32 to the current x86 version.
We should probably come up with some better way to do this, but let's
make sure to catch known issues for now.
2021-07-06 17:05:01 -07:00
David Blaikie 6c9559b67b DebugInfo: Mangle K&R declarations for debug info linkage names
This fixes a gap in the `overloadable` attribute support (K&R declared
functions would get mangled symbol names, but that name wouldn't be
represented in the debug info linkage name field for the function) and
in -funique-internal-linkage-names (this came up in review discussion on
D98799) where K&R static declarations would not get the uniqued linkage
names.
2021-07-06 16:28:02 -07:00
Stanislav Mekhanoshin a0ab45799b [AMDGPU] Move atomic expand past infer address spaces
There are cases where infer address spaces pass cannot yet
infer an address space in the opt pipeline and then in the
llc pipeline it runs too late for atomic expand pass to
benefit from a specific address space.

Move atomic expand pass past the infer address spaces.

Fixes: SWDEV-293410

Differential Revision: https://reviews.llvm.org/D105511
2021-07-06 15:53:32 -07:00
Stanislav Mekhanoshin 5915d33874 [AMDGPU] Do not run IR optimizations at -O0
Differential Revision: https://reviews.llvm.org/D105515
2021-07-06 15:29:52 -07:00
Stanislav Mekhanoshin aff66b7eef [AMDGPU] Fix pass name of AMDGPULowerKernelAttributes. NFC.
This was obviously copy-pasted.
2021-07-06 15:03:31 -07:00
Tony Tye 8d69635ed9 [NFC][AMDGPU] Add link to AMD GPU gfx906 instruction set architecture
Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D105377
2021-07-06 20:21:26 +00:00
Krzysztof Parzyszek 94e01d579c [Hexagon] Generate trap/undef if misaligned access is detected
This applies to memory accesses to (compile-time) constant addresses
(such as memory-mapped registers). Currently when a misaligned access
to such an address is detected, a fatal error is reported. This change
will emit a remark, and the compilation will continue with a trap,
and "undef" (for loads) emitted.

This fixes https://llvm.org/PR50838.

Differential Revision: https://reviews.llvm.org/D50524
2021-07-06 14:52:23 -05:00
Nico Weber 76f734040a [lld/mac] Give several LTO tests an "lto-" prefix
Differential Revision: https://reviews.llvm.org/D105476
2021-07-06 15:23:42 -04:00
Eli Friedman 7ac1c7bead Recommit [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers.
As part of making ScalarEvolution's handling of pointers consistent, we
want to forbid multiplying a pointer by -1 (or any other value). This
means we can't blindly subtract pointers.

There are a few ways we could deal with this:
1. We could completely forbid subtracting pointers in getMinusSCEV()
2. We could forbid subracting pointers with different pointer bases
(this patch).
3. We could try to ptrtoint pointer operands.

The option in this patch is more friendly to non-integral pointers: code
that works with normal pointers will also work with non-integral
pointers. And it seems like there are very few places that actually
benefit from the third option.

As a minimal patch, the ScalarEvolution implementation of getMinusSCEV
still ends up subtracting pointers if they have the same base.  This
should eliminate the shared pointer base, but eventually we'll need to
rewrite it to avoid negating the pointer base. I plan to do this as a
separate step to allow measuring the compile-time impact.

This doesn't cause obvious functional changes in most cases; the one
case that is significantly affected is ICmpZero handling in LSR (which
is the source of almost all the test changes).  The resulting changes
seem okay to me, but suggestions welcome.  As an alternative, I tried
explicitly ptrtoint'ing the operands, but the result doesn't seem
obviously better.

I deleted the test lsr-undef-in-binop.ll becuase I couldn't figure out
how to repair it to test what it was actually trying to test.

Recommitting with fix to MemoryDepChecker::isDependent.

Differential Revision: https://reviews.llvm.org/D104806
2021-07-06 12:16:05 -07:00
Louis Dionne 6e43f3fc14 [libc++] Do not set CMAKE_BUILD_WITH_INSTALL_NAME_DIR
I'm not sure what that gains us, and it creates a problem when
trying to run the tests against libc++ with a custom install name
dir (e.g. /usr/lib), since the library that we link against (in
the build tree) will advertise itself as /usr/lib/libc++.dylib,
so we end up linking against the system dylib at runtime.

Differential Revision: https://reviews.llvm.org/D105499
2021-07-06 14:46:47 -04:00
Louis Dionne 5d2511c389 [libc++] NFC: Sort header lists and remove outdated comments in modulemap 2021-07-06 14:45:52 -04:00
Craig Topper 12d51f95fe [RISCV] Implement lround*/llround*/lrint*/llrint* with fcvt instruction with -fno-math-errno
These are fp->int conversions using either RMM or dynamic rounding modes.

The lround and lrint opcodes have a return type of either i32 or
i64 depending on sizeof(long) in the frontend which should follow
xlen. llround/llrint should always return i64 so we'll need a libcall
for those on rv32.

The frontend will only emit the intrinsics if -fno-math-errno is in
effect otherwise a libcall will be emitted which will not use
these ISD opcodes.

gcc also does this optimization.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D105206
2021-07-06 11:43:22 -07:00
Michał Górny 2d68bb1765 [compiler-rt] [test] Fix asan symbolize tests on py3.10
Update the asan_symbolize_script for changes in argparse output
in Python 3.10.  The parser output 'options' instead of 'optional
arguments'.

Differential Revision: https://reviews.llvm.org/D105489
2021-07-06 20:41:35 +02:00
Michał Górny 2b0d95fb58 [openmp] [test] Add missing <limits> include to capacity_nthreads
Differential Revision: https://reviews.llvm.org/D105474
2021-07-06 20:39:53 +02:00
David Green be0924ad17 [Tests] Update some tests for D104765. NFC 2021-07-06 19:23:52 +01:00
LLVM GN Syncbot 7a46d8f50c [gn build] Port 8517a26d44 2021-07-06 18:17:43 +00:00
Eli Friedman a6d081b2cb Revert "[ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers."
This reverts commit 74d6ce5d5f.

Seeing crashes on buildbots in MemoryDepChecker::isDependent.
2021-07-06 11:17:13 -07:00
Jake Egan 045872f422 [AIX] Define __TOS_AIX__ predefined macro
%%%
Transfer the predefined macro, __TOS_AIX__, from the AIX XL C/C++ compilers.

__TOS_AIX__ indicates that the target operating system is AIX.
%%%

Reviewed By: cebowleratibm

Differential Revision: https://reviews.llvm.org/D103587
2021-07-06 14:15:35 -04:00
Louis Dionne 2ce0df4dfb [libc++][docs] Overhaul the documentation for building and using libc++
This patch overhauls the documentation around building libc++
for vendors, and using libc++ for end-users. It also:

- Removes mention of the standalone build, which we've been trying to
  get rid of for a long time.
- Removes mention of using a local ABI installation, which we don't do
  and is documented as "not recommended".
- Removes mention of the separate libc++filesystem.a library, which isn't
  relevant anymore since filesystem support is in the main library.
- Adds mention of the GDB pretty printers and how to use them.
2021-07-06 14:09:14 -04:00
Fangrui Song 7b6b15e010 [profile][test] Improve coverage-linkage.cpp with ld.lld --gc-sections
The __llvm_prf_names section uses SHF_GNU_RETAIN.  However, GNU ld before 2015-10
(https://sourceware.org/bugzilla/show_bug.cgi?id=19161) neither supports it nor
retains __llvm_prf_names according to __start___llvm_prf_names. So --gc-sections
does not work on such old GNU ld.

This is not a problem for gold and sufficiently new lld.
2021-07-06 11:08:47 -07:00
Sanjay Patel 4ec7c02197 [InstSimplify] fix bug in poison propagation for FP ops
If any operand of a math op is poison, that takes
precedence over general undef/NaN.

This should not be visible with binary ops because
it requires 2 constant operands to trigger (and if
both operands of a binop are constant, that should
get handled first in ConstantFolding).
2021-07-06 14:06:50 -04:00
Sanjay Patel 35e8cc4979 [InstSimplify][test] add tests for poison propagation through FP calls; NFC 2021-07-06 14:06:50 -04:00
Christopher Di Bella 8517a26d44 [libcxx][modularisation] splices `<iterator>` into individual headers
Differential Revision: https://reviews.llvm.org/D105076
2021-07-06 17:59:21 +00:00
Philip Reames 9ffa90d6c2 [LV] Disable epilogue vectorization for non-latch exits
When skimming through old review discussion, I noticed a post commit comment on an earlier patch which had gone unaddressed.  Better late (4 months), than never right?

I'm not aware of an active problem with the combination of non-latch exits and epilogue vectorization, but the interaction was not considered and I'm not modivated to make epilogue vectorization work with early exits. If there were a bug in the interaction, it would be pretty hard to hit right now (as we canonicalize towards bottom tested loops), but an upcoming change to allow multiple exit loops will greatly increase the chance for error.  Thus, let's play it safe for now.
2021-07-06 10:57:10 -07:00
Philip Reames 600624a103 [LoopVersion] Move an assert [nfc-ish] 2021-07-06 10:57:10 -07:00
Eli Friedman 74d6ce5d5f [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers.
As part of making ScalarEvolution's handling of pointers consistent, we
want to forbid multiplying a pointer by -1 (or any other value). This
means we can't blindly subtract pointers.

There are a few ways we could deal with this:
1. We could completely forbid subtracting pointers in getMinusSCEV()
2. We could forbid subracting pointers with different pointer bases
(this patch).
3. We could try to ptrtoint pointer operands.

The option in this patch is more friendly to non-integral pointers: code
that works with normal pointers will also work with non-integral
pointers. And it seems like there are very few places that actually
benefit from the third option.

As a minimal patch, the ScalarEvolution implementation of getMinusSCEV
still ends up subtracting pointers if they have the same base.  This
should eliminate the shared pointer base, but eventually we'll need to
rewrite it to avoid negating the pointer base. I plan to do this as a
separate step to allow measuring the compile-time impact.

This doesn't cause obvious functional changes in most cases; the one
case that is significantly affected is ICmpZero handling in LSR (which
is the source of almost all the test changes).  The resulting changes
seem okay to me, but suggestions welcome.  As an alternative, I tried
explicitly ptrtoint'ing the operands, but the result doesn't seem
obviously better.

I deleted the test lsr-undef-in-binop.ll becuase I couldn't figure out
how to repair it to test what it was actually trying to test.

Differential Revision: https://reviews.llvm.org/D104806
2021-07-06 10:54:41 -07:00
Jonas Paulsson 458eac2573 [SystemZ] Support the 'N' code for the odd register in inline-asm.
The odd register of a (128 bit) register pair is accessed with the 'N' code
with an inline assembly operand.

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D105502
2021-07-06 19:46:49 +02:00
Jeremy Morse 2b2ffb7bdc [DebugInfo][InstrRef][3/4] Produce DBG_INSTR_REFs for all variable locations
This patch emits DBG_INSTR_REFs for two remaining flavours of variable
locations that weren't supported: copies, and inter-block VRegs. There are
still some locations that must be represented by DBG_VALUE such as
constants, but they're mostly independent of optimisations.

For variable locations that refer to values defined in different blocks,
vregs are allocated before isel begins, but the defining instruction
might not exist until late in isel. To get around this, emit
DBG_INSTR_REFs in a "half done" state, where the first operand refers to a
VReg. Then at the end of isel, patch these back up to refer to
instructions, using the finalizeDebugInstrRefs method.

Copies are something that I complained about the original RFC, and I
really don't want to have to put instruction numbers on copies. They don't
define a value: they move them. To address this isel, salvageCopySSA
interprets:
 * COPYs,
 * SUBREG_TO_REG,
 * Anything that isCopyInstr thinks is a copy.
And follows chains of copies back to the defining instruction that they
read from. This relies on any physical registers that COPYs read being
defined in the same block, or being entry-block arguments. For the former
we can put an instruction number on the defining instruction; for the
latter we can drop a DBG_PHI that reads the incoming value.

Differential Revision: https://reviews.llvm.org/D88896
2021-07-06 18:31:38 +01:00
Craig Topper 2b5e53111a [RISCV] Add support for matching vwmul(u) and vwmacc(u) from fixed vectors.
This adds a DAG combine to detect sext/zext inputs and emit a
new ISD opcode. The extends will either be removed or replaced
with narrower extends.

Isel patterns are used to match add and widening mul to vwmacc
similar to the recently added vmacc patterns.

There's still some work to be to match vmulsu.
We should also rewrite splats that were extended as scalars and
then splatted.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D104802
2021-07-06 10:24:31 -07:00
Arnold Schwaighofer 846a530e7d Fix coro lowering of single predecessor phis
Code assumes that uses of single predecessor phis are not live accross
suspend points. Cleanup any single predecessor phis preceeding the code
making this assumption.

rdar://76020301

Differential Revision: https://reviews.llvm.org/D105488
2021-07-06 10:22:25 -07:00
Simon Pilgrim b298308ba2 [CostModel][X86] fptosi/fptoui to i8/i16 are truncated from fptosi to i32
Provide a generic fallback that performs the fptosi to i32 types, then truncates to sub-i32 scalars.

These numbers can be tweaked for specific sse levels, but we should get the default handling in place first.
2021-07-06 17:28:03 +01:00
ShihPo Hung f1cbea3e52 [RISCV] Remove Zvamo implication for v1.0-rc change
As v1.0-rc specs say Zvamo is removed from standard extension,
Zvamo has to be specified explicitly.

Reviewed By: evandro

Differential Revision: https://reviews.llvm.org/D105396
2021-07-07 00:14:58 +08:00
Jonas Paulsson 37a92f3b03 [SystemZ] Generate XC loop for memset 0 of variable length.
Benchmarking has shown that it is worthwhile to implement a variable length
memset of 0 with XC (exclusive or) like gcc does, instead of using a libcall.

This requires the use of the EXecute Relative Long (EXRL) instruction which
can now be done in a framework that can also be used with other target
instructions (not just XC).

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D103865
2021-07-06 18:07:31 +02:00
Jon Chesterfield ddfb074a80 [libomptarget][nfc] Group environment variables, drop accesses to DeviceInfo global
[libomptarget][nfc] Group environment variables, drop accesses to DeviceInfo global

Folds some duplicates logic into a helper function, passes the new environment
struct into getLaunchVals which no longer reads the DeviceInfo global.

Implemented on top of D105237

Reviewed By: dhruvachak

Differential Revision: https://reviews.llvm.org/D105239
2021-07-06 17:06:38 +01:00