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6823 Commits

Author SHA1 Message Date
Chris Lattner 4889a7af36 Private labels start with .L on linux, not just . 
llvm-svn: 32841
 2007-01-03 18:16:48 +00:00
Reid Spencer e87b5e9825 Fix a comment that referred to the now defunct ubyte type. 
llvm-svn: 32840
 2007-01-03 17:24:59 +00:00
Reid Spencer fb4070521a Remove two useless bit casts. 
llvm-svn: 32839
 2007-01-03 17:24:11 +00:00
Anton Korobeynikov 4efbbc963f Really big cleanup. 
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin

llvm-svn: 32833
 2007-01-03 11:43:14 +00:00
Evan Cheng 74b46e8c05 Fix naming inconsistency. 
llvm-svn: 32823
 2007-01-02 21:33:40 +00:00
Rafael Espindola fd68718467 implement missing compares 
patch by Lauro
bug fixed by me

llvm-svn: 32795
 2006-12-31 18:52:39 +00:00
Reid Spencer e63b6518fa For PR950: 
Three changes:
1. Convert signed integer types to signless versions.
2. Implement the @sext and @zext parameter attributes. Previously the
   type of an function parameter was used to determine whether it should
   be sign extended or zero extended before the call. This information is
   now communicated via the function type's parameter attributes.
3. The interface to LowerCallTo had to be changed in order to accommodate
   the parameter attribute information. Although it would have been
   convenient to pass in the FunctionType itself, there isn't always one
   present in the caller. Consequently, a signedness indication for the
   result type and for each parameter was provided for in the interface
   to this method. All implementations were changed to make the adjustment
   necessary.

llvm-svn: 32788
 2006-12-31 05:55:36 +00:00
Rafael Espindola 64493fb30d fix comment 
llvm-svn: 32767
 2006-12-29 14:28:12 +00:00
Lauro Ramos Venancio 8ab8f7df6f Define StaticCtorsSection and StaticDtorsSection for ARM. 
llvm-svn: 32763
 2006-12-28 13:13:00 +00:00
Lauro Ramos Venancio 7251e57ff8 Implement SELECT_CC (f32/f64) for ARM. 
llvm-svn: 32762
 2006-12-28 13:11:14 +00:00
Rafael Espindola 865b979833 remove duplicated line 
bug noticed by Lauro

llvm-svn: 32761
 2006-12-28 12:51:40 +00:00
Lauro Ramos Venancio d0ced3f1e8 This patch defines extloadi1 and fixes an internal compiler error on 
arm.

llvm-svn: 32760
 2006-12-26 19:30:42 +00:00
Reid Spencer 266e42b312 For PR950: 
This patch removes the SetCC instructions and replaces them with the ICmp
and FCmp instructions. The SetCondInst instruction has been removed and
been replaced with ICmpInst and FCmpInst.

llvm-svn: 32751
 2006-12-23 06:05:41 +00:00
Anton Korobeynikov 430e68a1b9 Refactored JIT codegen for mingw32. Now we're using standart relocation 
type for distinguish JIT & non-JIT instead of "dirty" hacks :)

llvm-svn: 32745
 2006-12-22 22:29:05 +00:00
Chris Lattner 959113a5c8 add a note 
llvm-svn: 32741
 2006-12-22 01:03:22 +00:00
Chris Lattner 5cfa5ef912 Fix for ARM weak symbols, patch by Lauro Ramos Venancio! 
llvm-svn: 32740
 2006-12-21 22:59:58 +00:00
Jim Laskey 28663c73ef Changes from Nick Lewycky with a simplified PPCTargetAsmInfo. 
llvm-svn: 32735
 2006-12-21 20:26:09 +00:00
Jim Laskey 4c90a6df16 Oops. 
llvm-svn: 32724
 2006-12-20 21:35:00 +00:00
Jim Laskey c2c861d00e Original patch was overly complicated. 
llvm-svn: 32723
 2006-12-20 21:33:34 +00:00
Jim Laskey 41621a72f5 Changes to target powerpc for non-Darwin assemblers. 
1. Patches from Nick Lewycky.
2. Code to filter register names and print them as numeric values on
non-Darwin systems.

llvm-svn: 32721
 2006-12-20 20:56:46 +00:00
Anton Korobeynikov b3d704c91d Fixed 80 cols & style violation 
llvm-svn: 32720
 2006-12-20 20:40:30 +00:00
Anton Korobeynikov 93acb49182 Fixed dllimported symbols support during JIT'ing. JIT on mingw32 
platform should be more or less workable. At least, sim is running fine
under lli :)

llvm-svn: 32711
 2006-12-20 01:03:20 +00:00
Chris Lattner 1ef9cd400d eliminate static ctors for Statistic objects. 
llvm-svn: 32703
 2006-12-19 22:59:26 +00:00
Evan Cheng 582ac4bed7 Fix for PR1062 by Dan Gohman. 
llvm-svn: 32688
 2006-12-19 21:31:42 +00:00
Anton Korobeynikov 44ef93449a Fix for PR1059: http://llvm.org/PR1059 
llvm-svn: 32685
 2006-12-19 21:04:20 +00:00
Chris Lattner 68f62b58f7 The x86-64 target machine should be used for amd64-* target triples. 
llvm-svn: 32678
 2006-12-19 19:40:09 +00:00
Chris Lattner a7f95900f4 Fix PR1061 and CodeGen/X86/2006-12-19-IntelSyntax.ll 
llvm-svn: 32676
 2006-12-19 19:29:58 +00:00
Rafael Espindola 3ab9256d19 macros -> Inline functions 
Lauros's patch

llvm-svn: 32656
 2006-12-18 11:07:09 +00:00
Rafael Espindola d7998d0e6d move ExtWeakSymbols to AsmPrinter 
llvm-svn: 32648
 2006-12-18 03:37:18 +00:00
Reid Spencer 8bd6317823 Use a predicate function to identify bitcast of fp and integer instead of 
repeating the logic in two different parts of the code.

llvm-svn: 32643
 2006-12-17 20:24:50 +00:00
Reid Spencer 174dc2f35e Fix PR1058: 
Generate the BITCAST_TEMPORARY regardless of the uses or inlinability of
the instruction. This temporary is needed to perform the instruction, not
provide storage for its results.

llvm-svn: 32642
 2006-12-17 18:50:51 +00:00
Chris Lattner 360a14be02 Apply B. Scott Michel's patch for PR1054, thanks! 
llvm-svn: 32630
 2006-12-16 20:23:42 +00:00
Jim Laskey a0850e98ee Patterns no longer needed due to fix in the DAG combiner. 
llvm-svn: 32612
 2006-12-15 21:39:31 +00:00
Evan Cheng 2f4cdc78fa Some AT&T syntax assembler (e.g. Mac OS X) does not recognize the movq alias for i64 <-> XMM moves. 
llvm-svn: 32609
 2006-12-15 19:58:58 +00:00
Jim Laskey 73d307d12d Not all test cases are created equal. This fix is needed. 
llvm-svn: 32605
 2006-12-15 18:51:01 +00:00
Jim Laskey 38b1d53afe Not needed. Misinterpreted error message from other bug (Missing load/store 
relocations.)

llvm-svn: 32604
 2006-12-15 18:45:32 +00:00
Jim Laskey b0367c987e Missing load/store relocations. 
llvm-svn: 32601
 2006-12-15 16:44:10 +00:00
Jim Laskey 36d826dca2 Provide 64-bit support for i64 sextload<i8>. 
llvm-svn: 32600
 2006-12-15 14:34:11 +00:00
Jim Laskey f07cc990dd Provide support for FP_TO_UINT. 
llvm-svn: 32599
 2006-12-15 14:32:57 +00:00
Evan Cheng 2455e6937b This is done. 
llvm-svn: 32591
 2006-12-15 05:50:39 +00:00
Evan Cheng 735fcf74d8 f64 <-> i64 bit_convert using movq in 64-bit mode. 
llvm-svn: 32587
 2006-12-14 21:55:39 +00:00
Evan Cheng e50b17e97e Fix a couple of typo's. 
llvm-svn: 32585
 2006-12-14 19:46:06 +00:00
Evan Cheng ac1fa442a7 This is done. 
llvm-svn: 32584
 2006-12-14 19:45:32 +00:00
Evan Cheng 0fd32e9ade Added MOVSS2DIrr and MOVDI2SSrr to foldMemeoryOperand(). 
llvm-svn: 32583
 2006-12-14 19:44:45 +00:00
Evan Cheng fccea9b2a9 - Rename MOVDSS2DIrr to MOVSS2DIrr for consistency sake. 
- Add MOVDI2SSrm and MOVSS2DImr to fold load / store for i32 <-> f32 bit_convert
  patterns.

llvm-svn: 32582
 2006-12-14 19:43:11 +00:00
Rafael Espindola 3b7544e24c avoid using a constant table when a constant can be used inline 
llvm-svn: 32580
 2006-12-14 18:58:37 +00:00
Rafael Espindola 09e2921d9a Avoid creating invalid sub/add instructions on the prolog/epilog 
patch by Lauro

llvm-svn: 32577
 2006-12-14 13:31:27 +00:00
Evan Cheng 9ffa6a60ed Add note. 
llvm-svn: 32561
 2006-12-13 20:59:43 +00:00
Jim Laskey 59e7a777da Honor cpu directive, take two. 
llvm-svn: 32492
 2006-12-12 20:57:08 +00:00
Jim Laskey 8171e58bd9 Rollback changes to take a different tack. 
llvm-svn: 32488
 2006-12-12 19:26:50 +00:00
Rafael Espindola 67d1c8ae0e more general matching of the MVN instruction 
llvm-svn: 32484
 2006-12-12 17:10:13 +00:00
Jim Laskey 7c3cab9ddc Honor the command line specification for machine type. 
llvm-svn: 32483
 2006-12-12 16:07:33 +00:00
Rafael Espindola 470d61d82c don't use "ordinary" addressing mode 1 when mvn is appropriate 
llvm-svn: 32482
 2006-12-12 14:03:29 +00:00
Jim Laskey 095e6f3044 Reduce number of instructions to load 64-bit constants. 
llvm-svn: 32481
 2006-12-12 13:23:43 +00:00
Reid Spencer b341b0861d Change inferred getCast into specific getCast. Passes all tests. 
llvm-svn: 32469
 2006-12-12 05:05:00 +00:00
Rafael Espindola 9fa0a26808 use MVN to handle small negative constants 
llvm-svn: 32459
 2006-12-12 01:03:11 +00:00
Rafael Espindola 1bbe581d0f add mvn 
llvm-svn: 32454
 2006-12-12 00:37:38 +00:00
Reid Spencer 2075374e28 Fix the BitCastUnion type for 32-bit targets. 
llvm-svn: 32453
 2006-12-12 00:11:08 +00:00
Rafael Espindola eb3e8d75df add note 
llvm-svn: 32452
 2006-12-11 23:56:10 +00:00
Chris Lattner f4646a7e54 Another step forward in PPC64 JIT support: we now no-longer need stubs 
emitted for external globals in PPC64-JIT-PIC mode (which is good because
we didn't handle them before!).

This also fixes a bug handling the picbase delta, which we would get wrong
in some cases.

llvm-svn: 32451
 2006-12-11 23:22:45 +00:00
Chris Lattner b1f3157638 getInstrItineraryData shouldn't copy the itineraries 
llvm-svn: 32448
 2006-12-11 21:42:55 +00:00
Reid Spencer b943555716 Implement correct bitcast of int<->float and long<->double by using a 
union to perform the bitcast.

llvm-svn: 32444
 2006-12-11 20:39:15 +00:00
Jim Laskey 2b136a73bd Missing opcode. 
llvm-svn: 32439
 2006-12-11 18:45:56 +00:00
Jim Laskey e95909a4ef Layout proper frame for ppc64. 
llvm-svn: 32436
 2006-12-11 18:10:54 +00:00
Nate Begeman e8da58b3f9 Properly mangles symbol table names 
Supports constant pools
Supports relocations to jump tables
Supports relocations within the data segment (global = address of global)
Allocates memory in a non-hacky for all non-code objects.

llvm-svn: 32430
 2006-12-11 02:20:45 +00:00
Chris Lattner a11aa92e6b Update note, with the SROA change, we now produce: 
_pairtest:
        movl 8(%esp), %eax
        movl 4(%esp), %ecx
        movd %eax, %xmm0
        movd %ecx, %xmm1
        addss %xmm0, %xmm1
        movl 12(%esp), %eax
        movss %xmm1, (%eax)
        ret

instead of:

_pairtest:
        subl $12, %esp
        movl 20(%esp), %eax
        movl %eax, 4(%esp)
        movl 16(%esp), %eax
        movl %eax, (%esp)
        movss (%esp), %xmm0
        addss 4(%esp), %xmm0
        movl 24(%esp), %eax
        movss %xmm0, (%eax)
        addl $12, %esp
        ret

llvm-svn: 32427
 2006-12-11 01:20:25 +00:00
Chris Lattner 6727f2a5f9 this is done 
llvm-svn: 32424
 2006-12-11 01:01:03 +00:00
Chris Lattner feeb9c7be5 Evan implemented the machineinstr improvements. 
The rot example works if the type is cast to ubyte.

Move sroa examples together and upgrade them to HEAD syntax.

llvm-svn: 32423
 2006-12-11 00:44:03 +00:00
Anton Korobeynikov 3b7c257cae Cleaned setjmp/longjmp lowering interfaces. Now we're producing right 
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.

llvm-svn: 32415
 2006-12-10 23:12:42 +00:00
Jim Laskey 6af2220815 Reverting until finding the cause of secondary bugs. 
llvm-svn: 32413
 2006-12-10 13:09:42 +00:00
Jim Laskey 04c832d4ab __PPC64CompilationCallback code was allowing registers to be clobbered by stub. 
llvm-svn: 32412
 2006-12-10 12:13:31 +00:00
Rafael Espindola b8ada08b26 .align is in bits 
.comm is in bytes
:-(

llvm-svn: 32408
 2006-12-10 02:53:14 +00:00
Rafael Espindola b313efb0cd fix test/Regression/CodeGen/X86/weak.ll 
if a variable has no initialization, I->getInitializer() will fail

llvm-svn: 32407
 2006-12-09 23:14:08 +00:00
Evan Cheng e107a8b872 Added option -soft-float to generate SW fp library calls instead of fp instructions. 
llvm-svn: 32393
 2006-12-09 02:41:30 +00:00
Rafael Espindola d12d2250a7 %progbits not @progbits 
llvm-svn: 32376
 2006-12-08 22:06:02 +00:00
Rafael Espindola 94f29f129d add \"aw\",@progbits" to ctors and dtors 
llvm-svn: 32373
 2006-12-08 21:24:58 +00:00
Evan Cheng 78cb08d082 Move findTiedToSrcOperand to TargetInstrDescriptor. 
llvm-svn: 32366
 2006-12-08 18:45:48 +00:00
Rafael Espindola 87f4382163 fix truncstorei1 
llvm-svn: 32364
 2006-12-08 18:41:21 +00:00
Andrew Lenharth dcb3c978c4 Packed Structures 
llvm-svn: 32361
 2006-12-08 18:06:16 +00:00
Evan Cheng b5f1c22e94 Use MI's TargetInstrDescriptor. 
llvm-svn: 32352
 2006-12-08 07:57:56 +00:00
Chris Lattner 5040f58ae4 Fix a bug introduced by the streams patch. DEBUG code was made unconditional. 
llvm-svn: 32351
 2006-12-08 05:41:26 +00:00
Chris Lattner 09fecf9a47 this is an initial patch to switch the ppc64 jit over to working in PIC mode, 
which allows the code to be above the 2G marker.  We still need to JIT emit
dyld stubs to support external, weak, common, etc globals, but that will
happen tomorrow.

llvm-svn: 32348
 2006-12-08 04:54:03 +00:00
Chris Lattner 4d475f6e6e add a note 
llvm-svn: 32347
 2006-12-08 02:01:32 +00:00
Andrew Lenharth 085cfdbfdc Simplify a bit 
llvm-svn: 32343
 2006-12-07 23:55:55 +00:00
Chris Lattner 13535c2d93 fix incorrect encoding of rldicr, used by ppc64 function stubs, etc. 
llvm-svn: 32341
 2006-12-07 23:44:07 +00:00
Bill Wendling 30c0f3367c Don't use <sstream> in Streams.h but <iosfwd> instead. 
llvm-svn: 32340
 2006-12-07 23:41:45 +00:00
Rafael Espindola 265fa68bd8 fix alignment 
llvm-svn: 32337
 2006-12-07 22:38:06 +00:00
Bill Wendling 9bfb1e1f29 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Chris Lattner a9a817dc7d fix CodeGen/PowerPC/2006-12-07-LargeAlloca.ll on ppc64 
llvm-svn: 32331
 2006-12-07 22:15:58 +00:00
Rafael Espindola 219a796475 make sure that we don't use a common symbol if a section was specified 
llvm-svn: 32310
 2006-12-07 18:33:58 +00:00
Andrew Lenharth 76a61eb054 Be sure to grab weak functions too, and make implicit defs comments 
llvm-svn: 32308
 2006-12-07 17:39:14 +00:00
Chris Lattner d8e7451dc3 Fix i64 uint_to_fp on ppc64 
llvm-svn: 32297
 2006-12-07 01:24:16 +00:00
Evan Cheng e312c152d2 MI keeps a ptr of TargetInstrDescriptor, use it. 
llvm-svn: 32296
 2006-12-07 01:21:59 +00:00
Chris Lattner 43c0eb839c implement sextinreg i8->i64 and i16->i64 
llvm-svn: 32293
 2006-12-06 21:46:13 +00:00
Chris Lattner 9472eb83c3 fix another sradi encoding bug. This fixes Olden/health with the ppc64 jit. 
llvm-svn: 32291
 2006-12-06 21:35:10 +00:00
Reid Spencer b8cf1ff83c Always pass "true" to isMaxValue(bool) because we know the type is LongTy. 
llvm-svn: 32290
 2006-12-06 21:27:07 +00:00
Reid Spencer de09dea742 Adjust to new ConstantIntegral interface for Max/Min tests. 
llvm-svn: 32289
 2006-12-06 20:45:15 +00:00
Chris Lattner aeadac88ea fix the jit encoding of sradi, simplify the MDForm1 description. 
llvm-svn: 32285
 2006-12-06 20:02:54 +00:00
Chris Lattner 1fa392dbfa add relocation support for ppc64 branches. 
llvm-svn: 32284
 2006-12-06 19:40:04 +00:00
Chris Lattner 7c779fcad4 add #include 
llvm-svn: 32281
 2006-12-06 18:19:53 +00:00
Chris Lattner f06bb658a8 add missing #include 
llvm-svn: 32280
 2006-12-06 18:14:47 +00:00
Chris Lattner 700b873130 Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.

llvm-svn: 32279
 2006-12-06 17:46:33 +00:00
Jim Laskey 527c12f8e6 Make it easier for gdb to find the return address. 
llvm-svn: 32277
 2006-12-06 17:42:06 +00:00
Rafael Espindola 776abee608 print weak references 
llvm-svn: 32276
 2006-12-06 13:35:10 +00:00
Chris Lattner 81cf22d873 These asm printers shouldn't use assembly/writer.h 
llvm-svn: 32262
 2006-12-06 06:13:25 +00:00
Evan Cheng 47e181cc4d Revert an unintended change. 
llvm-svn: 32239
 2006-12-05 22:03:40 +00:00
Evan Cheng dd60ca029c - Switch X86-64 JIT to large code size model. 
- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.

llvm-svn: 32238
 2006-12-05 19:50:18 +00:00
Chris Lattner c20b7e878a If we have ScalarSSE, we can select bitconvert into single instructions. 
This compiles bitcast.ll:test3/test4 into:

_test3:
        movd %xmm0, %eax
        ret
_test4:
        movd %edi, %xmm0
        ret

llvm-svn: 32230
 2006-12-05 18:45:06 +00:00
Chris Lattner 57a41985e3 Add a perf optzn corresponding to PR1033. 
llvm-svn: 32229
 2006-12-05 18:25:10 +00:00
Chris Lattner 55c17f9177 Fix PR1033 and CodeGen/X86/bitcast.ll, by expanding bitcast to a load/store pair. 
This could be better, readme entry pending.

llvm-svn: 32228
 2006-12-05 18:22:22 +00:00
Rafael Espindola b5dee63958 expand memmove and memcpy 
llvm-svn: 32226
 2006-12-05 17:57:23 +00:00
Rafael Espindola 96fd6447c7 add support for the "r" asm constraint 
patch by Lauro Ramos Venancio

llvm-svn: 32224
 2006-12-05 17:37:31 +00:00
Chris Lattner a16201c672 Fix typo noticed by Lauro Ramos Venancio, thanks! 
llvm-svn: 32223
 2006-12-05 17:29:40 +00:00
Rafael Espindola 2369a024d7 add support for weak linkage 
llvm-svn: 32222
 2006-12-05 17:00:17 +00:00
Evan Cheng 3b235aa5dc JIT large code model support. 
llvm-svn: 32220
 2006-12-05 07:29:55 +00:00
Evan Cheng 8e0e9fbe7b Asm printing bug. 
llvm-svn: 32218
 2006-12-05 06:43:58 +00:00
Evan Cheng 62cdc3f011 - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit 
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.

llvm-svn: 32215
 2006-12-05 04:01:03 +00:00
Evan Cheng 830f224bf5 Update 
llvm-svn: 32214
 2006-12-05 03:58:23 +00:00
Chris Lattner d139ddd2e6 Add support for 64-bit 'r' constraint. Patch by by Rafael ~Avila de Espíndol! 
This fixes PR1029 and Regression/CodeGen/X86/x86-64-asm.ll

llvm-svn: 32206
 2006-12-04 22:38:21 +00:00
Jim Laskey e4f4d048dd Restoration of the stack pointer after a deallocation of a alloca was not 
updating the SP link.

llvm-svn: 32202
 2006-12-04 22:04:42 +00:00
Evan Cheng 0c2a74a487 Non-darwin gcc should default to static relocation to match gcc. 
llvm-svn: 32184
 2006-12-04 18:07:10 +00:00
Evan Cheng 67fc141db5 Match TargetInstrInfo changes. 
llvm-svn: 32098
 2006-12-01 21:52:58 +00:00
Evan Cheng 07fc107e90 convertToThreeAddress() is now responsible for updating live info as well as inserting the new MI's. 
llvm-svn: 32097
 2006-12-01 21:52:41 +00:00
Evan Cheng 022030a425 Add weak reference directive. 
llvm-svn: 32091
 2006-12-01 20:47:11 +00:00
Evan Cheng b689d32b20 Copy and paste error. An initialized global cannot be a weak reference. 
llvm-svn: 32075
 2006-12-01 17:39:22 +00:00
Jim Laskey 1b0bc794e6 1. In ppc64 mode we need only use one GPR. 
2. Float values need to be promoted to double when they are vararg.

llvm-svn: 32074
 2006-12-01 16:30:47 +00:00
Jim Laskey 311622f912 ExternalWeak case in wrong location. 
llvm-svn: 32073
 2006-12-01 14:37:39 +00:00
Evan Cheng 845bd6e096 Fix 2005-05-08-FPStackifierPHI.ll failure. 
llvm-svn: 32071
 2006-12-01 10:11:51 +00:00
Evan Cheng 5fb2c76d59 A initialized global variable cannot be extern weak. However, if a global value's initializer is itself a external weak symbol, emit the weak reference. 
llvm-svn: 32069
 2006-12-01 09:13:26 +00:00
Evan Cheng fa54c0b6fb Darwin PPC external weak linkage support. 
llvm-svn: 32068
 2006-12-01 07:56:37 +00:00
Evan Cheng 5b020349f2 Minor code clean up. 
llvm-svn: 32067
 2006-12-01 07:38:23 +00:00
Evan Cheng db66456285 Fix indentation. 
llvm-svn: 32066
 2006-12-01 07:17:00 +00:00
Evan Cheng 6476a3b4ba Darwin X86 external weak linkage support. 
llvm-svn: 32065
 2006-12-01 07:15:24 +00:00
Chris Lattner 09ed0ff2ac Fix the CodeGen/PowerPC/vec_constants.ll regression. 
llvm-svn: 32057
 2006-12-01 01:45:39 +00:00
Anton Korobeynikov 12c94949e0 Introducing external weak linkage. Darwin codegen should be added later. 
llvm-svn: 32052
 2006-12-01 00:25:12 +00:00
Anton Korobeynikov 6dbdfe2baa Factor out GVRequiresExtraLoad() from .h to .cpp 
llvm-svn: 32048
 2006-11-30 22:42:55 +00:00
Evan Cheng ae1cd75af7 - Use a different wrapper node for RIP-relative GV, etc. 
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.

llvm-svn: 32046
 2006-11-30 21:55:46 +00:00
Evan Cheng aafeaef8c8 MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor 
llvm-svn: 32034
 2006-11-30 07:12:03 +00:00
Evan Cheng fef6400f01 Remove the ugly SPARCV9 TargetInstrDescriptors hack. 
llvm-svn: 32033
 2006-11-30 07:10:43 +00:00
Evan Cheng 7a9238c84d In PIC mode, GV not requiring an extra load can be used as address immediate. 
llvm-svn: 32028
 2006-11-29 23:48:14 +00:00
Evan Cheng 8c84c7cd0d Clean up. 
llvm-svn: 32027
 2006-11-29 23:46:27 +00:00
Evan Cheng 0b1692216d Fix for PR1018 - Better support for X86-64 Linux in small code model. 
llvm-svn: 32026
 2006-11-29 23:19:46 +00:00
Chris Lattner 2f648fc55d Fix bug codegen'ing FP constant vectors with integer splats. Make sure the 
created intrinsics have the right integer types.  This fixes
PowerPC/2006-11-29-AltivecFPSplat.ll

llvm-svn: 32024
 2006-11-29 19:58:49 +00:00
Jim Laskey 152671f0bf Offset for load of 32-bit arg in 64-bit world was incorrect. 
llvm-svn: 32019
 2006-11-29 13:37:09 +00:00
Evan Cheng 28a9e9b230 Custom lower READCYCLECOUNTER for x86-64. 
llvm-svn: 32017
 2006-11-29 08:28:13 +00:00
Chris Lattner 0d67dde00a done 
llvm-svn: 32013
 2006-11-29 07:21:46 +00:00
Evan Cheng 8facb43593 16-byte stack alignment for X86-64 ELF. Patch by Dan Gohman. 
llvm-svn: 32004
 2006-11-29 02:00:40 +00:00
Chris Lattner 38084725a2 Upgrade the ugly darwin 64-bit bswap idiom (bswap %eax / bswap %edx / 
xchgl %eax, %edx) to llvm.bswap.i64.  This compiles:

long long test2(long long A) {
  return _OSSwapInt64(A);
}

to:

_test2:
        movl 8(%esp), %eax
        movl 4(%esp), %edx
        bswapl %eax
        bswapl %edx
        ret

instead of:

_test2:
        movl 8(%esp), %edx
        movl 4(%esp), %eax
        bswap   %eax
        bswap   %edx
        xchgl   %eax, %edx
        ret

GCC manages (with -fomit-frame-pointer) the uglier:

_test2:
        subl    $4, %esp
        movl    8(%esp), %eax
        movl    12(%esp), %edx
        bswap   %eax
        bswap   %edx
        xchgl   %eax, %edx
        addl    $4, %esp
        ret

llvm-svn: 32001
 2006-11-29 01:48:01 +00:00
Chris Lattner 0fc6ae0c3d Trivially lower 'bswap $0' into llvm.bswap. This fixes hexxagon with the 
JIT on darwin/x86, which has htonl implemented as inline asm.

llvm-svn: 31999
 2006-11-29 01:14:06 +00:00
Andrew Lenharth 904ca9c688 gcc doesn't like an empty colbber list 
llvm-svn: 31987
 2006-11-28 23:07:32 +00:00
Andrew Lenharth f52ae7ec72 Identities are default now 
llvm-svn: 31980
 2006-11-28 22:28:08 +00:00
Andrew Lenharth 8b59fd03c2 Make identity default, and fix PR1020 
llvm-svn: 31979
 2006-11-28 22:25:32 +00:00
Evan Cheng 69b1825488 New entries. 
llvm-svn: 31976
 2006-11-28 19:59:25 +00:00
Andrew Lenharth 7f739d5bdd update comments 
llvm-svn: 31975
 2006-11-28 19:56:02 +00:00
Andrew Lenharth 212f15fa8a Get the asminfo for the target most closely matching the module and use that for inline asm 
llvm-svn: 31974
 2006-11-28 19:53:36 +00:00
Andrew Lenharth 2675e23a7e X86 asm -> gcc asm translation table (incomplete) 
llvm-svn: 31973
 2006-11-28 19:52:49 +00:00
Andrew Lenharth ff35b449a0 Add per-target support for asm translation in the cbe 
llvm-svn: 31972
 2006-11-28 19:52:20 +00:00
Jim Laskey 40182179b6 Remove debug code. 
llvm-svn: 31970
 2006-11-28 18:27:02 +00:00
Jim Laskey ec05b046c7 Prime text sections to improve branch locality in large object files. 
llvm-svn: 31969
 2006-11-28 18:21:52 +00:00
Jim Laskey f4e2e009d9 32-bit int space was not accounted for properly in lowerCall. 
llvm-svn: 31966
 2006-11-28 14:53:52 +00:00
Evan Cheng 8ddbdc70b7 Fix JIT encoding bugs for shift / rotate by one ops. 
llvm-svn: 31952
 2006-11-28 01:28:00 +00:00
Andrew Lenharth e8c64aba11 Preliminary support for inline asm in the cbe. The target specific ugliness 
is still in Writer, but issolated to a single function. This might be split
into something in each target directory.  This is sufficient to get through
archie and an strcpy impl on linux-x86.

Module level asm is not handled.

llvm-svn: 31948
 2006-11-27 23:50:49 +00:00
Evan Cheng 20350c4025 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.

llvm-svn: 31947
 2006-11-27 23:37:22 +00:00
Reid Spencer 16eaffe595 When truncating to bool, it is necessary to & with 1 for all casts that 
can result in a bool. Previously PtrToInt, FPToUI and FPToSI were missing
this operation.

llvm-svn: 31938
 2006-11-27 18:51:06 +00:00
Reid Spencer 6c38f0bb07 For PR950: 
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.

llvm-svn: 31931
 2006-11-27 01:05:10 +00:00
Duraid Madina 24cdf575e7 fix storing bools to mem and unordered FP ops 
llvm-svn: 31920
 2006-11-26 04:34:26 +00:00
Reid Spencer 6968c497de Add newline at end of file. 
llvm-svn: 31902
 2006-11-25 05:41:02 +00:00
Anton Korobeynikov 5b96cdebb0 Refactored *GVRequiresExtraLoad() to Subtarget method. 
llvm-svn: 31887
 2006-11-21 00:01:06 +00:00
Chris Lattner ec5dbccdcf in ppc64-mode, don't allocate the 32-bit version of r13 either. 
llvm-svn: 31884
 2006-11-20 20:48:05 +00:00
Chris Lattner ac36360348 r13 is the thread pointer on darwin/ppc64, don't allocate it. 
llvm-svn: 31882
 2006-11-20 19:33:51 +00:00
Chris Lattner 3e96211bc8 Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bit 
features autodetected.  This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.

llvm-svn: 31879
 2006-11-20 18:16:05 +00:00
Anton Korobeynikov 37d080b11d We should perform extra load for dllimported calls 
llvm-svn: 31874
 2006-11-20 10:46:14 +00:00
Chris Lattner 2cca385fbb on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots. 
Also, valist should create a pointer RC reg class value, not a GPRC value.

llvm-svn: 31840
 2006-11-18 01:57:19 +00:00
Chris Lattner 572e238c14 make sure to safe LR8 in the right stack slot for PPC64 
llvm-svn: 31839
 2006-11-18 01:34:43 +00:00
Chris Lattner 9ca15c8914 Pretty print 'rldicr r2, r2, 2, 61' as 'sldi r2, r2, 2'. 
llvm-svn: 31838
 2006-11-18 01:23:56 +00:00
Chris Lattner 542dfd5510 Rewrite the branch selector to be correct in the face of large functions. 
The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model.  This fixes assembler errors when compiling 403.gcc with
tail merging enabled.

Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion.  Only if branches need expansion are instructions rewritten
and created.  This should make branch select faster, and eliminates the
Bxx instructions from the .td file.

llvm-svn: 31837
 2006-11-18 00:32:03 +00:00
Chris Lattner 33fc1d45e5 add encoding for BCC, after finally wrestling strange ppc/tblgen endianness 
issues to the ground.

llvm-svn: 31836
 2006-11-17 23:53:28 +00:00
Chris Lattner be9377a1e3 convert PPC::BCC to use the 'pred' operand instead of separate predicate 
value and CR reg #.  This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(

llvm-svn: 31835
 2006-11-17 22:37:34 +00:00
Chris Lattner e0263794f4 rename PPC::COND_BRANCH to PPC::BCC 
llvm-svn: 31834
 2006-11-17 22:14:47 +00:00
Chris Lattner 8c6a41ea12 start using PPC predicates more consistently. 
llvm-svn: 31833
 2006-11-17 22:10:59 +00:00
Evan Cheng 9e8093ae20 For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while 
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.

llvm-svn: 31832
 2006-11-17 22:10:14 +00:00
Jim Laskey de5fa025ab Hopefully a good crack at making debugging work on intel -disable-fp-elim. 
llvm-svn: 31830
 2006-11-17 21:19:15 +00:00
Jim Laskey 73106b5e2a Assert unhandled case. 
llvm-svn: 31828
 2006-11-17 18:49:39 +00:00
Jim Laskey 1823346b3e 1. Ignore the -disable-fp-elim when the routine is a leaf. 
2. Offsets on 64-bit stores are still in bytes.

llvm-svn: 31824
 2006-11-17 16:09:31 +00:00
Jim Laskey 91542a4f2d Typo. Fix the nightly tests. 
llvm-svn: 31823
 2006-11-17 14:06:41 +00:00
Bill Wendling c8e81b8d48 Removed even more std::cerr and #include <iostream> things. 
llvm-svn: 31813
 2006-11-17 07:52:03 +00:00
Chris Lattner 3b7261b18e implement a todo: change a map into a vector 
llvm-svn: 31805
 2006-11-17 01:52:23 +00:00
Chris Lattner be1a4d80b3 fix typo 
llvm-svn: 31799
 2006-11-17 00:49:36 +00:00
Chris Lattner a715288b40 implicit_def_vrrc doesn't generate code. 
llvm-svn: 31797
 2006-11-16 23:49:52 +00:00
Evan Cheng 572dc9cb4e Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. 
llvm-svn: 31795
 2006-11-16 23:33:25 +00:00
Evan Cheng 7ae482c52a Fix a potential bug: MOVPDI2DI, etc. are not copy instructions. 
llvm-svn: 31794
 2006-11-16 23:22:26 +00:00
Jim Laskey 48850c10c0 This is a general clean up of the PowerPC ABI. Address several problems and 
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.

llvm-svn: 31792
 2006-11-16 22:43:37 +00:00
Chris Lattner 30055b9208 fix a regression that I introduced. stdu should scale the offset by 4 
before printing it.

llvm-svn: 31791
 2006-11-16 21:45:30 +00:00
Evan Cheng c5e769710e Align stubs on 4 byte boundary. This fixes 447.dealII. 
llvm-svn: 31790
 2006-11-16 20:13:34 +00:00
Chris Lattner 96d7386006 add a statistic 
llvm-svn: 31785
 2006-11-16 18:13:49 +00:00
Chris Lattner a7ff5162b0 fix broken encoding 
llvm-svn: 31778
 2006-11-16 01:01:28 +00:00
Chris Lattner e742d9a4b7 add ppc64 r+i stores with update. 
llvm-svn: 31776
 2006-11-16 00:57:19 +00:00
Chris Lattner 6f5840c409 add patterns for ppc32 preinc stores. ppc64 next. 
llvm-svn: 31775
 2006-11-16 00:41:37 +00:00
Chris Lattner 3a494989a6 switch these back to the 'bad old way' 
llvm-svn: 31774
 2006-11-16 00:33:34 +00:00
Chris Lattner b4e911d15a Fix ppc64 epilog bug. 
llvm-svn: 31771
 2006-11-15 23:35:30 +00:00
Chris Lattner 5771156be0 Stop using isTwoAddress, switching to operand constraints instead. 
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).

llvm-svn: 31770
 2006-11-15 23:24:18 +00:00
Chris Lattner 5c23899c7d add a new field needed by the code emitter generator. 
llvm-svn: 31768
 2006-11-15 22:55:04 +00:00
Evan Cheng dc2c8748a7 Properly transfer kill / dead info. 
llvm-svn: 31765
 2006-11-15 20:58:11 +00:00
Evan Cheng bbbcac39e6 Kill / dead info has been moved to MI's. 
llvm-svn: 31764
 2006-11-15 20:56:39 +00:00
Evan Cheng c57819d4a3 commuteInstruction should propagate kill / dead info. 
llvm-svn: 31763
 2006-11-15 20:56:03 +00:00
Chris Lattner 474b5b7c95 fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri 
addrmodes.

llvm-svn: 31757
 2006-11-15 19:55:13 +00:00
Chris Lattner 2775aba51d Simplify IntrinsicLowering and clarify that it is only for use by the 
CBE and interpreter.

llvm-svn: 31755
 2006-11-15 18:00:10 +00:00
Chris Lattner 60c2a0154a Remove unneeded forward decls 
llvm-svn: 31754
 2006-11-15 17:53:13 +00:00
Chris Lattner 0e117c7e9d Fix the PPC regressions last night 
llvm-svn: 31752
 2006-11-15 17:40:51 +00:00
Chris Lattner 1396961e85 Switch loads over to use memri as the operand instead of a reg/imm operand 
pair for cleanliness.  Add instructions for PPC32 preinc-stores with commented
out patterns.  More improvement is needed to enable the patterns, but we're
getting close.

llvm-svn: 31749
 2006-11-15 02:43:19 +00:00
Evan Cheng cf772f7eca Revert. This wasn't meant to be checked in. 
llvm-svn: 31737
 2006-11-14 19:20:33 +00:00
Chris Lattner e79a451475 group load and store instructions together. No functionality change. 
llvm-svn: 31736
 2006-11-14 19:19:53 +00:00
Chris Lattner 58e8bed48e Fix predicates for unindexed stores so they don't accidentally match indexed 
stores.

llvm-svn: 31735
 2006-11-14 19:13:39 +00:00
Chris Lattner 44dbdbe5cf Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls 
clobber.  This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity.  This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.

llvm-svn: 31734
 2006-11-14 18:44:47 +00:00
Chris Lattner b542925b22 remove a ton of custom selection logic no longer needed 
llvm-svn: 31733
 2006-11-14 18:43:11 +00:00
Chris Lattner 4916acbd0f it would be nice of ctlz were lowered to bsf etc. 
llvm-svn: 31730
 2006-11-14 08:08:46 +00:00
Chris Lattner 97ff46b3cc lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of 
'(shr (ctlz (sub Y, Z)), 5)'.

The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner.  For example, this:

typedef struct {
  unsigned prefix : 4;
  unsigned code : 4;
  unsigned unsigned_p : 4;
} tree_common;

int foo(tree_common *a, tree_common *b) {
  return a->code == b->code;
}

Now compiles to:

_foo:
        lwz r2, 0(r4)
        lwz r3, 0(r3)
        xor r2, r3, r2
        rlwinm r2, r2, 28, 28, 31
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

instead of:

_foo:
        lbz r2, 3(r4)
        lbz r3, 3(r3)
        srwi r2, r2, 4
        srwi r3, r3, 4
        subf r2, r2, r3
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

saving a cycle.

llvm-svn: 31725
 2006-11-14 05:28:08 +00:00
Chris Lattner 6dc22332bf add a note 
llvm-svn: 31719
 2006-11-14 01:57:53 +00:00
Chris Lattner 683712583a minor tweaks, reject vector preinc. 
llvm-svn: 31717
 2006-11-14 01:38:31 +00:00
Evan Cheng dbd3d294e6 Matches MachineInstr changes. 
llvm-svn: 31712
 2006-11-13 23:36:35 +00:00
Chris Lattner 1121e50f7e teach the g5 hazard recognizer about update loads. This fixes 
Ptrdist/anagram among others.

llvm-svn: 31708
 2006-11-13 20:11:06 +00:00
Nick Lewycky 0df2ada9d4 Cute example from Chris Lattner. 
llvm-svn: 31696
 2006-11-13 00:23:28 +00:00
Jim Laskey 1dfc6110ff Make sure stack link is set in 64-bit. 
llvm-svn: 31690
 2006-11-11 22:22:07 +00:00
Chris Lattner 0d550cc56c implement proper PPC64 prolog/epilog codegen. 
llvm-svn: 31684
 2006-11-11 19:05:28 +00:00
Jim Laskey 66c502b54a Running with frame pointers prevented debugging, external probes and 
potentially some system calls/exception handling from working.  TOS must always
link to previous frame.  This is a short term workaround until alloca scheme is
reworked.

llvm-svn: 31677
 2006-11-11 10:21:58 +00:00
Evan Cheng db04c958a5 Add implicit use / def operands to created MI's. 
llvm-svn: 31676
 2006-11-11 10:21:44 +00:00
Evan Cheng a36cdcfaf8 Add all implicit defs to FP_REG_KILL mi. 
llvm-svn: 31674
 2006-11-11 07:19:36 +00:00
Chris Lattner c5102bfc7c allow the offset of a preinc'd load to be the low-part of a global. This 
produces this clever code:

_millisecs:
        lis r2, ha16(_Time.1182)
        lwzu r3, lo16(_Time.1182)(r2)
        lwz r2, 4(r2)
        addic r4, r2, 1
        addze r3, r3
        blr

instead of this:

_millisecs:
        lis r2, ha16(_Time.1182)
        la r3, lo16(_Time.1182)(r2)
        lwz r2, lo16(_Time.1182)(r2)
        lwz r3, 4(r3)
        addic r4, r3, 1
        addze r3, r2
        blr

for:

long %millisecs() {
        %tmp = load long* %Time.1182            ; <long> [#uses=1]
        %tmp1 = add long %tmp, 1                ; <long> [#uses=1]
        ret long %tmp1
}

llvm-svn: 31673
 2006-11-11 04:53:30 +00:00
Chris Lattner 2ff632c54b Mark operands as symbol lo instead of imm32 so that they print lo(x) around 
globals.

llvm-svn: 31672
 2006-11-11 04:51:36 +00:00
Chris Lattner b314b155ed ppc64 doesn't have lwau, don't attempt to form it. 
llvm-svn: 31656
 2006-11-11 00:08:42 +00:00
Chris Lattner c9fa36d706 implement preinc support for r+i loads on ppc64 
llvm-svn: 31654
 2006-11-10 23:58:45 +00:00
Evan Cheng 915026cdc3 Add a note. 
llvm-svn: 31650
 2006-11-10 22:09:17 +00:00
Evan Cheng 5b725a71a9 These are done. 
llvm-svn: 31649
 2006-11-10 22:03:35 +00:00
Evan Cheng 49683ba236 Don't dag combine floating point select to max and min intrinsics. Those 
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.

This fixes PR996.

llvm-svn: 31645
 2006-11-10 21:43:37 +00:00
Evan Cheng fb44822a98 Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a 
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.

llvm-svn: 31641
 2006-11-10 21:23:04 +00:00
Chris Lattner 6c8656a6b1 dform 8/9 are identical to dform 1 
llvm-svn: 31637
 2006-11-10 17:51:02 +00:00
Evan Cheng 286357480c Fix a potential bug. 
llvm-svn: 31634
 2006-11-10 09:13:37 +00:00
Evan Cheng 8c9c6d71ed Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Chris Lattner ce6455489a add an initial cut at preinc loads for ppc32. This is broken for ppc64 
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)

This is disabled unless -enable-ppc-preinc is passed to llc for now.

llvm-svn: 31621
 2006-11-10 02:08:47 +00:00
Chris Lattner cd436327f1 add note about ugly codegen with preinc 
llvm-svn: 31617
 2006-11-10 01:33:53 +00:00
Evan Cheng 14140059f0 Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes. 
llvm-svn: 31616
 2006-11-10 01:28:43 +00:00
Anton Korobeynikov b9c91c265c Fixing PR990: http://llvm.org/PR990. 
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).

llvm-svn: 31613
 2006-11-10 00:48:11 +00:00
Chris Lattner 4e03cb1945 add a note about viterbi 
llvm-svn: 31612
 2006-11-10 00:23:26 +00:00
Evan Cheng 36a8fbf771 PPC supports i32 / i64 pre-inc load / store. 
llvm-svn: 31599
 2006-11-09 19:11:50 +00:00
Evan Cheng c034f14fbe Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31596
 2006-11-09 18:44:21 +00:00
Evan Cheng b15000736c Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31595
 2006-11-09 17:55:04 +00:00
Rafael Espindola 5f7ab1b964 implement load effective address similar to the alpha backend 
remove lea_addri and the now unused memri addressing mode

llvm-svn: 31592
 2006-11-09 13:58:55 +00:00
Evan Cheng 1698c2999c Remove M_2_ADDR_FLAG. 
llvm-svn: 31583
 2006-11-09 02:22:54 +00:00
Evan Cheng c9a4cdc9c9 Added indexed store node and patfrag's. 
llvm-svn: 31576
 2006-11-08 23:02:11 +00:00
Evan Cheng 3b3b786f03 Use movl+xchgl instead of pushl+popl. 
llvm-svn: 31572
 2006-11-08 20:35:37 +00:00
Evan Cheng 6cd0909da7 Match tblegen changes. 
llvm-svn: 31571
 2006-11-08 20:34:28 +00:00
Rafael Espindola 708cb60588 initial implementation of addressing mode 2 
TODO: fix lea_addri

llvm-svn: 31552
 2006-11-08 17:07:32 +00:00
Reid Spencer fdff938a7e For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.

llvm-svn: 31542
 2006-11-08 06:47:33 +00:00
Chris Lattner a801fcedd3 Refactor all the addressing mode selection stuff into the isel lowering 
class, where it can be used for preinc formation.

llvm-svn: 31536
 2006-11-08 02:15:41 +00:00
Chris Lattner 6a5a4f85d3 correct the (currently unused) pattern for lwzu. 
llvm-svn: 31535
 2006-11-08 02:13:12 +00:00
Evan Cheng 922e191116 Fixed a bug which causes x86 be to incorrectly match 
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.

Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>

llvm-svn: 31519
 2006-11-07 22:14:24 +00:00
Chris Lattner be7033b346 add a note from viterbi 
llvm-svn: 31506
 2006-11-07 18:30:21 +00:00
Chris Lattner d94477f6c9 fix encoding of BLR 
llvm-svn: 31485
 2006-11-07 01:51:50 +00:00
Chris Lattner 7e885005ba add a note 
llvm-svn: 31477
 2006-11-06 21:26:49 +00:00
Jeff Cohen 7d6f3db3e2 Unbreak VC++ build. 
llvm-svn: 31464
 2006-11-05 19:31:28 +00:00
Reid Spencer 35b927e0d3 Fix a bug in the last patch and convert to && instead of & for logical expr. 
llvm-svn: 31463
 2006-11-05 19:26:37 +00:00
Reid Spencer 6088f8af16 Implement the -enabled-cbe-printf-a feature. 
llvm-svn: 31462
 2006-11-05 17:09:41 +00:00
Chris Lattner 2959789c92 encode BLR predicate info for the JIT 
llvm-svn: 31450
 2006-11-04 05:42:48 +00:00
Chris Lattner 6be726048e Go through all kinds of trouble to mark 'blr' as having a predicate operand 
that takes a register and condition code.  Print these pieces of BLR the
right way, even though it is currently set to 'always'.

Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.

llvm-svn: 31449
 2006-11-04 05:27:39 +00:00
Chris Lattner c8a68d08c3 Describe PPC predicates, which are a pair of CR# and condition. 
llvm-svn: 31438
 2006-11-03 23:53:25 +00:00
Chris Lattner 4905d2c5b4 initial steps to getting the predicate on PPC::BLR right. 
llvm-svn: 31437
 2006-11-03 23:52:18 +00:00
Chris Lattner 4fcc04a32a remove dead var 
llvm-svn: 31436
 2006-11-03 23:50:15 +00:00
Chris Lattner 9ac6442db6 remove dead/redundant vars 
llvm-svn: 31435
 2006-11-03 23:48:56 +00:00
Chris Lattner eb7128465d remove redundant/dead vars 
llvm-svn: 31434
 2006-11-03 23:47:20 +00:00
Chris Lattner 895d199348 remove dead vars 
llvm-svn: 31433
 2006-11-03 23:46:45 +00:00
Chris Lattner 2048373e71 add a note 
llvm-svn: 31429
 2006-11-03 22:27:39 +00:00
Rafael Espindola 4ece5c04f4 revert previous patch 
llvm-svn: 31411
 2006-11-03 03:08:28 +00:00
Evan Cheng 94b29e9e91 Dead code. 
llvm-svn: 31405
 2006-11-03 02:08:41 +00:00
Rafael Espindola 38b162c1d2 add createCFGSimplificationPass to ARMTargetMachine::addInstSelector 
llvm-svn: 31400
 2006-11-03 01:39:25 +00:00
Chris Lattner 799b96be08 silence warning 
llvm-svn: 31395
 2006-11-03 01:19:31 +00:00
Chris Lattner b974b0a3e1 silence warnings. 
llvm-svn: 31394
 2006-11-03 01:18:29 +00:00
Chris Lattner de2f0906e4 silence warning 
llvm-svn: 31393
 2006-11-03 01:13:15 +00:00
Chris Lattner 71f55131d4 silence warnings 
llvm-svn: 31392
 2006-11-03 01:11:05 +00:00
Reid Spencer c0b1dec892 Make CBackend -pedantic clean. 
llvm-svn: 31388
 2006-11-03 00:00:57 +00:00
Chris Lattner 2de0910a1b fix a bug reid noticed 
llvm-svn: 31385
 2006-11-02 23:39:53 +00:00
Reid Spencer de46e48420 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
 2006-11-02 20:25:50 +00:00
Rafael Espindola ac8668d62f move ARMCondCodeToString to ARMAsmPrinter.cpp 
remove unused variables from lowerCall

llvm-svn: 31378
 2006-11-02 15:00:02 +00:00
Andrew Lenharth d8b59f67f6 fix 2006-11-01-vastart.ll 
llvm-svn: 31371
 2006-11-02 03:05:26 +00:00
Reid Spencer 7eb55b395f For PR950: 
Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369
 2006-11-02 01:53:59 +00:00
Chris Lattner 584a11ae22 Implement the getRegForInlineAsmConstraint method for PPC. With recent 
sdisel changes, this eliminates a ton of copies around common inline asms.
For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr

llvm-svn: 31367
 2006-11-02 01:44:04 +00:00
Evan Cheng 93cdd149f7 Rename 
llvm-svn: 31364
 2006-11-01 23:18:32 +00:00
Evan Cheng 1b2e60e970 Added getTiedToSrcOperand() to check for two-address'ness. 
llvm-svn: 31360
 2006-11-01 23:00:31 +00:00
Rafael Espindola 3576405a26 print null values in bss 
llvm-svn: 31349
 2006-11-01 14:26:44 +00:00
Rafael Espindola 0cd8d14c7c implement zextload bool and truncstore bool 
llvm-svn: 31348
 2006-11-01 14:13:27 +00:00
Evan Cheng 94e5bc9e83 Fix ldmxcsr JIT encoding. 
llvm-svn: 31343
 2006-11-01 06:53:52 +00:00
Evan Cheng 7a6a5b9af5 Add constraints to Instruction class. 
llvm-svn: 31332
 2006-11-01 00:26:27 +00:00
Andrew Lenharth dfbf91e59d more shotenning 
llvm-svn: 31331
 2006-10-31 23:46:56 +00:00
Evan Cheng a41c2d6432 Nuke dead code. 
llvm-svn: 31327
 2006-10-31 21:53:31 +00:00
Chris Lattner 44daa50bed allow the address of a global to be used with the "i" constraint when in 
-static mode.  This implements PR882.

llvm-svn: 31326
 2006-10-31 20:13:11 +00:00
Chris Lattner 60ce558aaa implement the 'c' inline asm modifier character 
llvm-svn: 31325
 2006-10-31 20:12:30 +00:00
Andrew Lenharth 8b20fa42da Let us play simplify the td file (and fix a few missed sub and mul patterns). 
llvm-svn: 31322
 2006-10-31 19:52:12 +00:00
Chris Lattner f6a6966cd2 handle "st" as "st(0)" 
llvm-svn: 31320
 2006-10-31 19:42:44 +00:00
Chris Lattner 8c6949e5b2 Change the prototype for TargetLowering::isOperandValidForConstraint 
llvm-svn: 31318
 2006-10-31 19:40:43 +00:00
Andrew Lenharth 692e4155aa Add all that branch mangling niftiness 
llvm-svn: 31313
 2006-10-31 16:49:55 +00:00
Rafael Espindola 4e825336a0 add support for calling functions when the caller has variable sized objects 
llvm-svn: 31312
 2006-10-31 13:03:26 +00:00
Anton Korobeynikov aa4c0f9374 1. Clean up code due to changes in SwitchTo*Section(2) 
2. Added partial debug support for mingw\cygwin targets (the same as
   Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
   for storing debug info by default, thus many (runtime) libraries has
   this information included. These formats shouldn't be mixed in one binary
   ('stabs' & 'DWARF'), otherwise binutils tools will be confused.

llvm-svn: 31311
 2006-10-31 08:31:24 +00:00
Anton Korobeynikov 49993529eb Unbreaking static ctors patch. 
Defaulting second arguments of SwitchTo*Section, this should make things
somehow clearer.

llvm-svn: 31306
 2006-10-31 06:11:06 +00:00
Reid Spencer 2545fe6d93 Make this compile again. 
llvm-svn: 31304
 2006-10-31 01:45:56 +00:00
Evan Cheng de5ecd6bc1 Apply Aton's LLVM patch for PR973: Linux ctors / dtors support. 
llvm-svn: 31303
 2006-10-31 01:26:55 +00:00
Chris Lattner 3e36e07db2 fix miscompilation of llvm.isunordered, where we branched on the opposite 
condition.  This fixes miscompilation of Olden/bh and many others.

llvm-svn: 31301
 2006-10-30 23:02:25 +00:00
Reid Spencer b51b5c0b1f Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4 
generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.

llvm-svn: 31299
 2006-10-30 22:32:30 +00:00
Chris Lattner 7443600ef8 fix wonky indentation 
llvm-svn: 31298
 2006-10-30 22:27:23 +00:00
Evan Cheng 0d41d19427 All targets expand BR_JT for now. 
llvm-svn: 31294
 2006-10-30 08:02:39 +00:00
Chris Lattner 113f7470e6 implement the BlockHasNoFallThrough hook 
llvm-svn: 31264
 2006-10-28 17:35:02 +00:00
Chris Lattner 53ebf20c26 add another target hook for branch folding. 
llvm-svn: 31262
 2006-10-28 17:29:57 +00:00
Evan Cheng ae8c29a7d3 Doh. Must check if GV is constant first before putting it in .cstring. 
llvm-svn: 31253
 2006-10-28 05:56:51 +00:00
Evan Cheng 0d782b4c60 Doh. Must check if GV is constant first. 
llvm-svn: 31252
 2006-10-28 05:56:06 +00:00
Chris Lattner a6873c0f88 don't dist internal readme 
llvm-svn: 31247
 2006-10-28 00:51:15 +00:00
Chris Lattner acc6b37d0d don't dist internal readme's 
llvm-svn: 31246
 2006-10-28 00:49:54 +00:00
Chris Lattner 3be52bb570 don't distribute internal readme's 
llvm-svn: 31245
 2006-10-28 00:48:27 +00:00
Reid Spencer 247e09a07c Make sure all the readme files get distributed. 
llvm-svn: 31244
 2006-10-28 00:11:39 +00:00
Chris Lattner 28174f5a3a this doesn't occur any more in mason 
llvm-svn: 31236
 2006-10-27 22:02:19 +00:00
Chris Lattner 4c0cc53da1 the code in question is now: 
cmpw cr0, r7, r3
        ble cr0, LBB1_5 ;bb25
LBB1_8: ;bb17
        cmpw cr0, r8, r5
        bgt cr0, LBB1_2 ;bb

which is just as good as crnand.

llvm-svn: 31235
 2006-10-27 22:00:55 +00:00
Evan Cheng e056dd5928 Fixed a significant bug where unpcklpd is incorrectly used to extract element 1 from a v2f64 value. 
llvm-svn: 31228
 2006-10-27 21:08:32 +00:00
Evan Cheng bf3df77758 Fix for PR968: expand vector sdiv, udiv, srem, urem. 
llvm-svn: 31220
 2006-10-27 18:49:08 +00:00
Reid Spencer e54243f030 Initialize CStringSection member var. 
llvm-svn: 31214
 2006-10-27 16:14:06 +00:00
Evan Cheng f53ae69365 Change load PatFrag to ignore indexed load. 
llvm-svn: 31210
 2006-10-26 21:55:50 +00:00
Evan Cheng e1e06c2de8 Place cstrings in .cstring section. 
llvm-svn: 31207
 2006-10-26 21:48:57 +00:00
Evan Cheng 392f645783 Put cstrings in .cstring section when compiling for Mac OS X. 
llvm-svn: 31203
 2006-10-26 19:18:18 +00:00
Rafael Espindola a23166d6a4 initial support for frame pointers 
llvm-svn: 31197
 2006-10-26 13:31:26 +00:00
Reid Spencer c6b52da458 Enclose a case in { and } so that the pickier compilers don't complain. 
llvm-svn: 31196
 2006-10-26 06:17:40 +00:00
Reid Spencer 7e80b0b31e For PR950: 
Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.

llvm-svn: 31195
 2006-10-26 06:15:43 +00:00
Evan Cheng c415c5be49 During vector shuffle lowering, we sometimes commute a vector shuffle to try 
to match MOVL (movss, movsd, etc.). Don't forget to commute it back and try
unpck* and shufp* if that doesn't pan out.

llvm-svn: 31186
 2006-10-25 21:49:50 +00:00
Evan Cheng 7e065ff7e4 X86ISD::PEXTRW 3rd operand type is always target pointer type. 
llvm-svn: 31185
 2006-10-25 21:35:05 +00:00
Evan Cheng 798b306311 Remove -disable-x86-shuffle-opti 
llvm-svn: 31183
 2006-10-25 20:48:19 +00:00
Devang Patel 71b99297aa Move getPreferredAlignmentLog from AsmPrinter to TargetData 
llvm-svn: 31171
 2006-10-24 20:32:14 +00:00
Rafael Espindola bd29281e97 expand ISD::VACOPY 
llvm-svn: 31170
 2006-10-24 20:15:21 +00:00
Chris Lattner 9030fc690a Fix CodeGen/IA64/ret-0.ll, which has apparently been broken since some of the 
isel changes happened months ago.

llvm-svn: 31164
 2006-10-24 17:09:43 +00:00
Rafael Espindola ed32883b27 fix warning about missing newline at end of file 
llvm-svn: 31162
 2006-10-24 17:07:11 +00:00
Chris Lattner aaeede0aa2 implement uncond branch insertion, mark branches with isBranch. 
llvm-svn: 31160
 2006-10-24 16:47:57 +00:00
Chris Lattner ccd7704354 implement uncond branch insertion for the branch folding pass 
llvm-svn: 31159
 2006-10-24 16:44:55 +00:00
Chris Lattner 042d56230e implement uncond branch insertion so alpha works work branchfolding. 
llvm-svn: 31158
 2006-10-24 16:41:36 +00:00
Chris Lattner b7267bd034 implement uncond branch insertion for sparc to fix regressions from last night 
due to branchfolding

llvm-svn: 31157
 2006-10-24 16:39:19 +00:00
Chris Lattner f054003ba7 new bad case 
llvm-svn: 31156
 2006-10-24 16:12:47 +00:00
Chris Lattner d43e8a7429 Add intrinsics for the rest of the DCB* instructions. 
llvm-svn: 31148
 2006-10-24 01:08:42 +00:00
Rafael Espindola b43efe86f5 implement STRB and STRH 
llvm-svn: 31138
 2006-10-23 20:34:27 +00:00
Rafael Espindola cd5f662c7b expand ISD::MEMSET 
llvm-svn: 31137
 2006-10-23 20:08:22 +00:00
Chris Lattner bb3084546a this part implemented. 
llvm-svn: 31122
 2006-10-22 21:40:12 +00:00
Anton Korobeynikov 41a83d7871 Do section switching right way for Mingw\Cygwin and Linux. 
This will allow (after llvm-gcc linkage fix) more dummy tests using
libstdc++ to pass on mingw :)

llvm-svn: 31120
 2006-10-22 21:37:13 +00:00
Reid Spencer aa1c614784 Don't generate a prototype for _setjmp. At least on Linux, this function 
has a different prototype than the one #included from <setjmp.h>. This
patch fixes siod and a number of other test cases on Linux that were
failing the CBE because of this _setjmp issue.

llvm-svn: 31112
 2006-10-22 09:58:21 +00:00
Chris Lattner 23f22de26f Implement support for branch reversal, fix a bug in branch analysis. 
This provides stuff like:

        cmpw cr0, r15, r29
        mr r14, r15
-       bge cr0, LBB3_111       ;bb656
-       b LBB3_90       ;bb501
+       blt cr0, LBB3_90        ;bb501
 LBB3_111:      ;bb656
        lwz r18, 68(r1)

which is particularly good for dispatch group formation.

llvm-svn: 31101
 2006-10-21 06:03:11 +00:00
Chris Lattner 3a897f31fa Implement support for branch condition reversal. 
llvm-svn: 31099
 2006-10-21 05:52:40 +00:00
Chris Lattner d881660366 Simplify code, no functionality change 
llvm-svn: 31097
 2006-10-21 05:42:09 +00:00
Chris Lattner 94e04442eb implement support for inserting a cond branch 
llvm-svn: 31096
 2006-10-21 05:36:13 +00:00
Chris Lattner 6fca75ec05 allow insertion of a conditional branch with fall-through 
llvm-svn: 31095
 2006-10-21 05:34:23 +00:00
Chris Lattner 20e75d4635 update assert message 
llvm-svn: 31093
 2006-10-21 04:42:29 +00:00
Chris Lattner 8366b874a9 bugfix 
llvm-svn: 31074
 2006-10-20 20:44:34 +00:00
Chris Lattner c0fb567e23 Implement branch analysis/xform hooks required by the branch folding pass. 
llvm-svn: 31065
 2006-10-20 17:42:20 +00:00
Reid Spencer e0fc4dfc22 For PR950: 
This patch implements the first increment for the Signless Types feature.
All changes pertain to removing the ConstantSInt and ConstantUInt classes
in favor of just using ConstantInt.

llvm-svn: 31063
 2006-10-20 07:07:24 +00:00
Rafael Espindola 336d62e99a use Pat to implement extloadi8 and extloadi16 
llvm-svn: 31052
 2006-10-19 17:05:03 +00:00
Rafael Espindola f8274c0318 implement undef 
llvm-svn: 31049
 2006-10-19 13:45:00 +00:00
Rafael Espindola ea67b973c2 print common symbols 
llvm-svn: 31048
 2006-10-19 13:30:40 +00:00
Rafael Espindola ff62819e2f implement extloadi8 and extloadi16 
llvm-svn: 31047
 2006-10-19 12:45:04 +00:00
Rafael Espindola 3c563c5072 expand SIGN_EXTEND_INREG 
llvm-svn: 31046
 2006-10-19 12:06:50 +00:00
Rafael Espindola b260306625 expand brind so that we don't have to implement jump tables right now 
llvm-svn: 31045
 2006-10-19 10:56:43 +00:00
Chris Lattner f4aeff00c2 fit in 80 cols 
llvm-svn: 31039
 2006-10-18 18:26:48 +00:00
Chris Lattner 35a1471046 add a note 
llvm-svn: 31038
 2006-10-18 17:04:09 +00:00
Rafael Espindola bad440742e add blx 
llvm-svn: 31037
 2006-10-18 16:21:43 +00:00
Rafael Espindola 01dd97a8aa add isTerminatortto b and bcond 
llvm-svn: 31036
 2006-10-18 16:20:57 +00:00
Rafael Espindola b21e8d2e12 implement CallingConv::Fast as CallingConv::C 
llvm-svn: 31034
 2006-10-18 12:03:07 +00:00
Anton Korobeynikov 24b7ac303c Fixed mingw\cygwin linkonce linkage once again. 
Added workaround for linker bug with linkonce sections.
Changed sections prefix to allow linker merge them
(PE loader doesn't like too much long-named sections :) )
All of this unbreaks libstdc++ on mingw32 allowing (small)
programs to be compiled, linked and run.

llvm-svn: 31033
 2006-10-18 09:12:29 +00:00
Chris Lattner 454436dcc5 set the ppc64 stack pointer right, dynamic alloca now works for ppc64 
llvm-svn: 31028
 2006-10-18 01:20:43 +00:00
Chris Lattner ab4df83426 Expand alloca for ppc64 
llvm-svn: 31027
 2006-10-18 01:18:48 +00:00
Chris Lattner 0408e5b7ce expose DWARF_LABEL opcode# so the branch folder can update debug info properly. 
llvm-svn: 31024
 2006-10-17 22:41:45 +00:00
Rafael Espindola ba8f296167 expand ISD::SDIV, ISD::UDIV, ISD::SREM and ISD::UREM 
llvm-svn: 31014
 2006-10-17 21:05:33 +00:00
Rafael Espindola 3968263ca8 add the FPUnaryOp and DFPUnaryOp classes 
llvm-svn: 31013
 2006-10-17 20:45:22 +00:00
Rafael Espindola 99bf133d58 add FABSS and FABSD 
llvm-svn: 31012
 2006-10-17 20:33:13 +00:00
Anton Korobeynikov 75b01beb2f Adding linkonce linkage codegeneration support for mingw32\cygwin 
targets.

llvm-svn: 31011
 2006-10-17 20:29:49 +00:00
Rafael Espindola 2d7d14262a remove extra [] in stores 
llvm-svn: 31008
 2006-10-17 18:29:14 +00:00
Chris Lattner a61f0105bd add support for inserting an uncond branch 
llvm-svn: 31003
 2006-10-17 18:06:55 +00:00
Rafael Espindola 19398ec86e initial implementation of addressing mode 5 
llvm-svn: 31002
 2006-10-17 18:04:53 +00:00
Rafael Espindola feb50708eb add the immediate to the Offset in eliminateFrameIndex 
llvm-svn: 30998
 2006-10-17 14:34:02 +00:00
Rafael Espindola 418c8e69bb add FSTD and FSTS 
llvm-svn: 30996
 2006-10-17 13:36:07 +00:00
Rafael Espindola c31ee94920 add FCPYS and FCPYD 
llvm-svn: 30995
 2006-10-17 13:13:23 +00:00
Jim Laskey 2794184191 Use S_debug for dwarf info. 
llvm-svn: 30994
 2006-10-17 11:30:57 +00:00
Evan Cheng a3e1ad7a61 Proper fix. 
llvm-svn: 30993
 2006-10-17 00:24:49 +00:00
Evan Cheng ed60d16ac7 One more try. 
llvm-svn: 30992
 2006-10-16 23:44:08 +00:00
Evan Cheng 1367ff084d Unbreak x86-64 build. 
llvm-svn: 30990
 2006-10-16 22:53:28 +00:00
Rafael Espindola afdd47ace4 add fdivs e fdivd 
llvm-svn: 30988
 2006-10-16 21:50:04 +00:00
Rafael Espindola f719c5f43d expand ISD::SHL_PARTS, ISD::SRA_PARTS and ISD::SRL_PARTS 
llvm-svn: 30987
 2006-10-16 21:10:32 +00:00
Evan Cheng afb610468b Added a X86CompilationCallback variant which saves XMM argument registers for targets with SSE. 
llvm-svn: 30986
 2006-10-16 21:01:55 +00:00
Evan Cheng a8b4aeace0 Proper fix for rdar://problem/4770604 Thanks to Stuart Hastings! 
llvm-svn: 30985
 2006-10-16 21:00:37 +00:00
Rafael Espindola e341d60f53 define the DFPBinOp class 
llvm-svn: 30981
 2006-10-16 18:39:22 +00:00
Rafael Espindola f63752f94b add the FPBinOp class 
llvm-svn: 30980
 2006-10-16 18:32:36 +00:00
Rafael Espindola b23dc14135 define the Addr1BinOp class 
llvm-svn: 30979
 2006-10-16 18:18:14 +00:00
Rafael Espindola 203922d083 define the IntBinOp class and use it to implement the multiply instructions 
llvm-svn: 30978
 2006-10-16 17:57:20 +00:00
Rafael Espindola c4abf8dc5b fix assembly syntax 
llvm-svn: 30977
 2006-10-16 17:38:12 +00:00
Rafael Espindola 677ee8390d implement LDRB, LDRSB, LDRH and LDRSH 
llvm-svn: 30976
 2006-10-16 17:17:22 +00:00
Rafael Espindola 595dc4c884 implement smull and umull 
llvm-svn: 30975
 2006-10-16 16:33:29 +00:00
Evan Cheng 949bcc94ea Avoid getting into an infinite loop when -disable-x86-shuffle-opti is specified. 
llvm-svn: 30974
 2006-10-16 06:36:00 +00:00
Evan Cheng ff1a712794 SelectScalarSSELoad should call CanBeFoldedBy as well. 
llvm-svn: 30973
 2006-10-16 06:34:55 +00:00
Anton Korobeynikov 34e051d537 Align stack size to DWORD boundary 
llvm-svn: 30964
 2006-10-14 20:53:35 +00:00
Rafael Espindola 2b7f635951 expand ISD::BRCOND 
llvm-svn: 30963
 2006-10-14 17:59:54 +00:00
Rafael Espindola 4c1baf1528 fix some fp condition codes 
use non trapping comparison instructions

llvm-svn: 30962
 2006-10-14 13:42:53 +00:00
Evan Cheng b86375cfd0 Corrected load folding check. We need to start from the root of the sub-dag 
being matched and ensure there isn't a non-direct path to the load (i.e. a
path that goes out of the sub-dag.)

llvm-svn: 30958
 2006-10-14 08:33:25 +00:00
Chris Lattner a47294ed7a implement branch inspection/modification methods. 
llvm-svn: 30946
 2006-10-13 21:21:17 +00:00
Evan Cheng ab51cf2e78 Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode. 
llvm-svn: 30945
 2006-10-13 21:14:26 +00:00
Chris Lattner 63007919dc remove some dead code 
llvm-svn: 30938
 2006-10-13 20:40:42 +00:00
Chris Lattner be131662c3 add note 
llvm-svn: 30937
 2006-10-13 20:20:58 +00:00
Chris Lattner cf56917053 set isBarrier correctly 
llvm-svn: 30936
 2006-10-13 19:10:34 +00:00
Chris Lattner 4dc4f30a48 Correctly handle instruction separators. 
llvm-svn: 30935
 2006-10-13 17:56:02 +00:00
Chris Lattner 95129a7f22 Expose method and ivars for measuring inline asm length properly. 
llvm-svn: 30934
 2006-10-13 17:50:07 +00:00
Rafael Espindola 5ab3166f74 add FNEGS and FNEGD 
llvm-svn: 30932
 2006-10-13 17:37:35 +00:00
Rafael Espindola d6050c3149 add SBCS and SUBS 
llvm-svn: 30930
 2006-10-13 17:19:20 +00:00
Rafael Espindola 79d9807c87 implement calls to functions that return long 
llvm-svn: 30929
 2006-10-13 16:47:22 +00:00
Rafael Espindola 3874a168d0 implement unordered floating point compares 
llvm-svn: 30928
 2006-10-13 13:14:59 +00:00
Chris Lattner 03fda13dbb add a note 
llvm-svn: 30921
 2006-10-12 22:01:26 +00:00
Evan Cheng a7956d2894 Doh. This wasn't causing problems by luck. 
llvm-svn: 30914
 2006-10-12 19:13:59 +00:00
Evan Cheng 694810c227 Some X86ISD::CMP were created with wrong ValueType's. 
llvm-svn: 30913
 2006-10-12 19:12:56 +00:00
Chris Lattner 8c9422c4b8 mark call adjustments as modifying the SP 
llvm-svn: 30911
 2006-10-12 18:00:26 +00:00
Chris Lattner 0e0ee36f45 adjcallstack up/down clobbers the sp 
llvm-svn: 30910
 2006-10-12 18:00:14 +00:00
Chris Lattner d376e9f4ac adjcallstackup/down clobbers the stack pointer 
llvm-svn: 30909
 2006-10-12 17:57:58 +00:00
Chris Lattner 7374bc0577 mark adjcallstack up/down as clobbering and using the SP 
llvm-svn: 30908
 2006-10-12 17:56:34 +00:00
Chris Lattner adcaf294d7 Move the Imp tblgen class from the X86 backend to common code. 
llvm-svn: 30907
 2006-10-12 17:49:27 +00:00
Chris Lattner b5cda3daa9 Mark ADJCALLSTACKUP/DOWN as clobbering ESP so that virtregmap will notice 
that it can't assume ESP is unmodified across the instrs.

llvm-svn: 30905
 2006-10-12 17:42:56 +00:00
Chris Lattner 40ec2bebf9 fix compilation failure of smg2000 
llvm-svn: 30900
 2006-10-12 03:55:48 +00:00
Chris Lattner d5fcfaa6da Fold "zero extending vector loads" now that evan added the chain manip stuff. 
This compiles both tests in X86/vec_ss_load_fold.ll into:

_test1:
        movss 4(%esp), %xmm0
        subss LCPI1_0, %xmm0
        mulss LCPI1_1, %xmm0
        minss LCPI1_2, %xmm0
        xorps %xmm1, %xmm1
        maxss %xmm1, %xmm0
        cvttss2si %xmm0, %eax
        andl $65535, %eax
        ret

instead of:

_test1:
        movss LCPI1_0, %xmm0
        movss 4(%esp), %xmm1
        subss %xmm0, %xmm1
        movss LCPI1_1, %xmm0
        mulss %xmm0, %xmm1
        movss LCPI1_2, %xmm0
        minss %xmm0, %xmm1
        xorps %xmm0, %xmm0
        maxss %xmm0, %xmm1
        cvttss2si %xmm1, %eax
        andl $65535, %eax
        ret

llvm-svn: 30894
 2006-10-11 22:09:58 +00:00
Evan Cheng 4090dc4703 ComplexPatterns sse_load_f32 and sse_load_f64 returns in / out chain operands. 
llvm-svn: 30892
 2006-10-11 21:06:01 +00:00
Evan Cheng 577ef7694e Add properties to ComplexPattern. 
llvm-svn: 30891
 2006-10-11 21:03:53 +00:00
Andrew Lenharth fa8cbfd8e8 Reduce the amount of state in the lowering code and drop old pattern ISel functions 
llvm-svn: 30881
 2006-10-11 16:24:51 +00:00
Evan Cheng d35734bd1f Naming consistency. 
llvm-svn: 30878
 2006-10-11 07:10:22 +00:00
Chris Lattner 6487854b3f Use cute tblgen tricks to make zap handling more powerful. Specifically, 
when the dag combiner simplifies an and mask, notice this and allow those bits
to be missing from the zap mask.

This compiles Alpha/zapnot4.ll into:

        sll $16,3,$0
        zapnot $0,3,$0
        ret $31,($26),1

instead of:

        ldah $0,1($31)
        lda $0,-8($0)
        sll $16,3,$1
        and $1,$0,$0
        ret $31,($26),1

It would be *really* nice to replace the hunk of code in the
AlphaISelDAGToDAG.cpp file that matches (and (srl (x, C), c2) into
(SRL (ZAPNOTi)) with a similar pattern, but I've spent enough time poking
at alpha.  Make andrew will do this.

llvm-svn: 30875
 2006-10-11 05:13:56 +00:00
Andrew Lenharth a6bbf33cbf Jimptables working again on alpha. 
As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.

llvm-svn: 30873
 2006-10-11 04:29:42 +00:00
Chris Lattner 9f86f7c2ab Remove dead/redundant instructions. These are handled by ZAPNOTi 
llvm-svn: 30872
 2006-10-11 04:12:39 +00:00
Andrew Lenharth 4a57e2a6ed This entry is done. switched to the gcc way of doing things. 
llvm-svn: 30867
 2006-10-11 01:48:03 +00:00
Chris Lattner 3d74556d74 This has apparently been fixed 
llvm-svn: 30864
 2006-10-11 01:44:46 +00:00
Rafael Espindola 8429e1f6c3 uint <-> double conversion 
llvm-svn: 30862
 2006-10-10 20:38:57 +00:00
Rafael Espindola b5f1ff336a add fp sub 
llvm-svn: 30859
 2006-10-10 19:35:01 +00:00
Rafael Espindola 57d109fb08 add double <-> int conversion 
llvm-svn: 30858
 2006-10-10 18:55:14 +00:00
Rafael Espindola d1a4ea41c9 compare doubles 
llvm-svn: 30856
 2006-10-10 16:33:47 +00:00
Rafael Espindola d15c892433 initial support for fp compares. Unordered compares not implemented yet 
llvm-svn: 30854
 2006-10-10 12:56:00 +00:00
Evan Cheng 61b8b43bbe More isel time load folding checking for nodes that produce flag values. 
See comment in CanBeFoldedBy() for detailed explanation.

llvm-svn: 30851
 2006-10-10 01:46:56 +00:00
Evan Cheng 57ccb6d372 Don't go too crazy with these AddComplexity. Try matching shufps with load 
folding first.

llvm-svn: 30848
 2006-10-09 21:42:15 +00:00
Evan Cheng e646abb7b6 Don't convert to MOVLP if using shufps etc. may allow load folding. 
llvm-svn: 30847
 2006-10-09 21:39:25 +00:00
Evan Cheng e71fe34d75 Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes. 
llvm-svn: 30844
 2006-10-09 20:57:25 +00:00
Rafael Espindola 9e29ec371a add float -> double and double -> float conversion 
llvm-svn: 30835
 2006-10-09 17:50:29 +00:00
Rafael Espindola 396b4a6b7b add ADDS and ADCS 
llvm-svn: 30830
 2006-10-09 17:18:28 +00:00
Rafael Espindola e4c3276afc expand ISD::SELECT 
llvm-svn: 30829
 2006-10-09 16:28:33 +00:00
Rafael Espindola c154dacb2f add a note 
llvm-svn: 30828
 2006-10-09 14:18:33 +00:00
Rafael Espindola 41730922bb expand ISD::EXTLOAD 
llvm-svn: 30827
 2006-10-09 14:13:40 +00:00
Rafael Espindola 78d6c2bf59 most ARM targets are little endian 
llvm-svn: 30826
 2006-10-09 14:12:15 +00:00
Chris Lattner 398195ebbe completely disable folding of loads into scalar sse instructions and provide 
a framework for doing it right.  This fixes
CodeGen/X86/2006-10-07-ScalarSSEMiscompile.ll.

Once X86DAGToDAGISel::SelectScalarSSELoad is implemented right, this task
will be done.

llvm-svn: 30817
 2006-10-07 21:55:32 +00:00
Chris Lattner 942009fee5 convert packed FP add/sub/mul/div to use a multiclass. 
llvm-svn: 30815
 2006-10-07 21:17:13 +00:00
Chris Lattner 4005f4e49c one multiclass now defines all 8 variants of binary-scalar-sse-fp operations. 
llvm-svn: 30814
 2006-10-07 20:55:57 +00:00
Chris Lattner 6eaee2c8e3 Switch ADD/MUL/DIV/SUB scalarsse fp ops to a multiclass 
llvm-svn: 30813
 2006-10-07 20:35:44 +00:00
Chris Lattner c8c6441821 Random acts of shrinkage 
llvm-svn: 30812
 2006-10-07 19:49:05 +00:00
Chris Lattner b5df7e554d Convert pand/por/pxor to use multiclass 
llvm-svn: 30811
 2006-10-07 19:37:30 +00:00
Chris Lattner 6138cba5f1 Convert some more instructions over to use a new multiclass. 
Fix a bug where the asmstring for PSUBQrm was wrong.

llvm-svn: 30810
 2006-10-07 19:34:33 +00:00
Chris Lattner 662ba43f08 Fix a bug where PADDQrm printed paddd instead of paddq. 
llvm-svn: 30809
 2006-10-07 19:15:46 +00:00
Chris Lattner 29c62a3c88 Add multiclass for SSE2 instructions that correspond to simple binops. 
llvm-svn: 30808
 2006-10-07 19:14:49 +00:00
Chris Lattner e0928d9d7b rename: 
PDI_binop_rm -> PDI_binop_rm_int
  PDI_binop_rmi -> PDI_binop_rmi_int

to make it clear that these are for use with intrinsics.

llvm-svn: 30807
 2006-10-07 19:02:31 +00:00
Chris Lattner 489b63089d Convert saturating PADD/PSUB's to use a multiclass 
llvm-svn: 30806
 2006-10-07 18:48:46 +00:00
Chris Lattner fa2ce8824d Convert PAVG*, PMADDWD, and PMUL* to use multiclasses. 
llvm-svn: 30805
 2006-10-07 18:39:00 +00:00
Chris Lattner cab92e4c0c Fix typo in packsswb instr definition, where the load had the wrong type. 
This allows us to use the multiclass for other packs.

llvm-svn: 30804
 2006-10-07 18:23:58 +00:00
Rafael Espindola b50938866b implement FUITOS and FUITOD 
llvm-svn: 30803
 2006-10-07 14:24:52 +00:00
Rafael Espindola 58c368bc4f implement FLDD 
llvm-svn: 30802
 2006-10-07 14:03:39 +00:00
Rafael Espindola 40f5dd27f0 implement fadds, faddd, fmuls and fmuld 
llvm-svn: 30801
 2006-10-07 13:46:42 +00:00
Chris Lattner e746a9cd6a handle pmin/pmax with multiclasses 
llvm-svn: 30800
 2006-10-07 07:49:33 +00:00
Chris Lattner b14e6a0f8c simplify pack and shift intrinsics with multiclasses 
llvm-svn: 30797
 2006-10-07 07:06:17 +00:00
Chris Lattner 521fc4e33f Use a multiclass to simplify 'SSE2 Integer comparison' 
llvm-svn: 30796
 2006-10-07 06:47:08 +00:00
Chris Lattner c6138cec61 move class defns close to uses to make it easier to read 
llvm-svn: 30795
 2006-10-07 06:33:36 +00:00
Chris Lattner 87e692323c simplify horizontal op definitions 
llvm-svn: 30794
 2006-10-07 06:31:41 +00:00
Chris Lattner 3e9fc37458 remove more unneeded type info 
llvm-svn: 30793
 2006-10-07 06:27:03 +00:00
Chris Lattner 807be0a715 remove unneeded definitions and type info 
llvm-svn: 30792
 2006-10-07 06:19:41 +00:00
Chris Lattner 5b1358a8eb remove some unneeded type info 
llvm-svn: 30791
 2006-10-07 06:17:43 +00:00
Chris Lattner 3414c022af simplify patterns by merging in operand info 
llvm-svn: 30790
 2006-10-07 05:50:25 +00:00
Chris Lattner ca21ce5f08 Factor operands into packed unary classes 
llvm-svn: 30789
 2006-10-07 05:47:20 +00:00
Chris Lattner 0052c3ff5b remove dead/duplicate instructions 
llvm-svn: 30788
 2006-10-07 05:41:52 +00:00
Chris Lattner 904c6e9c92 Pull operand info up into parent class for scalar sse intrinsics. 
llvm-svn: 30787
 2006-10-07 05:26:13 +00:00
Chris Lattner e698c90ee9 convert the sole sd unary intrinsic to a multiclass for consistency 
llvm-svn: 30786
 2006-10-07 05:19:31 +00:00
Chris Lattner 2bb2f050f5 pull operand string into the multiclass 
llvm-svn: 30785
 2006-10-07 05:13:26 +00:00
Chris Lattner 069679c7b6 Remove RSQRTSS[rm] RCPSS[rm], which are dead. 
Introduce SS_IntUnary, a multiclass to replace SS_Int[rm].

llvm-svn: 30784
 2006-10-07 05:09:48 +00:00
Chris Lattner f13a7b376c eliminate redundancy 
llvm-svn: 30783
 2006-10-07 04:52:09 +00:00
Chris Lattner dc3064e223 Set the jt section 
llvm-svn: 30781
 2006-10-06 22:52:33 +00:00
Chris Lattner 21fa769867 Alpha uses a got 
llvm-svn: 30778
 2006-10-06 22:46:51 +00:00
Rafael Espindola aa2a12f1a2 add optional input flag to FMRRD 
llvm-svn: 30774
 2006-10-06 20:33:26 +00:00
Rafael Espindola 671f25281d add support for calling functions that return double 
llvm-svn: 30771
 2006-10-06 19:10:05 +00:00
Evan Cheng 5fe9680253 80 col violation. 
llvm-svn: 30770
 2006-10-06 18:57:51 +00:00
Chris Lattner 2421a179e4 ugly codegen 
llvm-svn: 30769
 2006-10-06 17:39:34 +00:00
Rafael Espindola ef01656ea4 fix some bugs affecting functions with no arguments 
llvm-svn: 30767
 2006-10-06 17:26:30 +00:00
Rafael Espindola 6024ea8383 fix the stack alignment 
llvm-svn: 30766
 2006-10-06 14:29:47 +00:00
Rafael Espindola 5fe7909e18 add support for calling functions that have double arguments 
llvm-svn: 30765
 2006-10-06 12:50:22 +00:00
Evan Cheng ff1beda569 Still need to support -mcpu=<> or cross compilation will fail. Doh. 
llvm-svn: 30764
 2006-10-06 09:17:41 +00:00
Evan Cheng 9274f72e58 Do away with CPU feature list. Just use CPUID to detect MMX, SSE, SSE2, SSE3, and 64-bit support. 
llvm-svn: 30763
 2006-10-06 08:21:07 +00:00
Evan Cheng 4c1a804a5b It appears the inline asm in GetCpuIDAndInfo() may clobbers some registers if it isn't inlined (at < -O3). Force it to be inlined. 
llvm-svn: 30762
 2006-10-06 07:50:56 +00:00
Evan Cheng df9ac47e5e Make use of getStore(). 
llvm-svn: 30759
 2006-10-05 23:01:46 +00:00
Rafael Espindola decfeca52d use a const ref for passing the vector to ArgumentLayout 
llvm-svn: 30756
 2006-10-05 17:46:48 +00:00
Rafael Espindola e04df41ca2 implement a ArgumentLayout class to factor code common to LowerFORMAL_ARGUMENTS and LowerCALL 
implement FMDRR
add support for f64 function arguments

llvm-svn: 30754
 2006-10-05 16:48:49 +00:00
Chris Lattner f2ef243580 Lower some min/max idioms to minss/maxss when unsafe fp math is enabled. 
llvm-svn: 30748
 2006-10-05 04:11:26 +00:00
Chris Lattner 8cfd10eff3 Don't bother setting JumpTableTextSection, it is about to disappear 
llvm-svn: 30745
 2006-10-05 03:13:59 +00:00
Chris Lattner a6a570e02f Pass the MachineFunction into EmitJumpTableInfo. 
llvm-svn: 30742
 2006-10-05 03:01:21 +00:00
Chris Lattner 38e2c8a0a2 implement and use getSectionForFunction 
llvm-svn: 30741
 2006-10-05 02:51:36 +00:00
Chris Lattner 4431699187 Use getSectionForFunction. 
llvm-svn: 30740
 2006-10-05 02:49:23 +00:00
Chris Lattner d4d255a408 Use getSectionForFunction 
llvm-svn: 30739
 2006-10-05 02:48:40 +00:00
Chris Lattner c8c78982d4 use getSectionForFunction to decide which section to emit code into 
llvm-svn: 30738
 2006-10-05 02:47:13 +00:00