Commit Graph

246021 Commits

Author SHA1 Message Date
Craig Topper bf9e5a16a4 [X86] Don't use loadv2i64 on SSE version of PMULHRSW. Use memopv2i64 instead.
This bug was introduced in r285501.

llvm-svn: 285510
2016-10-30 00:02:55 +00:00
NAKAMURA Takumi ff76cfefc0 NativeFormatting.cpp: Fix build for mingw. Where would writePadding() be?
llvm-svn: 285509
2016-10-29 23:14:18 +00:00
Teresa Johnson 38d4df714c [ThinLTO] Rename doPromoteLocalToGlobal to shouldPromoteLocalToGlobal (NFC)
Rename as suggested in code review for D26063.

llvm-svn: 285508
2016-10-29 21:52:23 +00:00
Teresa Johnson 1b9c2be8f4 [ThinLTO] Use NoPromote flag in summary during promotion
Summary:
Replace the check of whether a GV has a section with the flag check
in the summary. This is in preparation for using the NoPromote flag
to convey other situations when we can't promote (e.g. locals used in
inline asm).

Reviewers: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26063

llvm-svn: 285507
2016-10-29 21:31:48 +00:00
Peter Collingbourne 310474f576 IR: Remove a no longer needed assert.
This assert was checking for a miscompile in a version of GCC that
we no longer support.

llvm-svn: 285506
2016-10-29 20:57:12 +00:00
Craig Topper 4caf76bee2 [AVX-512] Remove 128/256-bit masked pmulhrsw/pmulhuw/pmulhw builtins and use unmasked builtins and select instead.
llvm-svn: 285505
2016-10-29 19:02:14 +00:00
Craig Topper 2eadf1b67e [AVX-512] Remove masked 128/256-bit sqrt builtins and replace them with unmasked builtins and a select.
llvm-svn: 285504
2016-10-29 19:02:10 +00:00
Craig Topper 09e94007be [AVX-512] Remove masked 128/256-bit pmuludq/pmuldq builtins and replace them with unmasked builtins and a select.
llvm-svn: 285503
2016-10-29 19:02:07 +00:00
Craig Topper 160ca8420d [AVX-512] Remove masked 128/256-bit floating point max/min builtins. Use unmasked builtins with select instead.
llvm-svn: 285502
2016-10-29 19:02:03 +00:00
Craig Topper defe9ffbb5 [X86] Use intrinsics table for VPMULHRSW intrincis so that the legacy intrinsics can select EVEX encoded instructions when available.
This requires a minor rename of the instructions due to the use of different tablegen classes and how the names are concatenated.

llvm-svn: 285501
2016-10-29 18:41:45 +00:00
Richard Smith 2680bc9951 Factor finding of libc++ include path out of building -cc1 arguments.
llvm-svn: 285500
2016-10-29 17:28:48 +00:00
Sanjay Patel 36eeb6d6f6 [ValueTracking] recognize more variants of smin/smax
Try harder to detect obfuscated min/max patterns: the initial pattern was added with D9352 / rL236202. 
There was a bug fix for PR27137 at rL264996, but I think we can do better by folding the corresponding
smax pattern and commuted variants.

The codegen tests demonstrate the effect of ValueTracking on the backend via SelectionDAGBuilder. We
can't expose these differences minimally in IR because we don't have smin/smax intrinsics for IR.

Differential Revision: https://reviews.llvm.org/D26091

llvm-svn: 285499
2016-10-29 16:21:19 +00:00
Sanjay Patel e9fa95e572 [x86] add tests for smin/smax matchSelPattern (D26091)
llvm-svn: 285498
2016-10-29 16:02:57 +00:00
Piotr Padlewski 77cc962bce [Devirtualization] Decorate vfunction load with invariant.load
Summary:
This patch was introduced one year ago, but because my google account
was disabled, I didn't get email with failing buildbot and I missed
revert of this commit. There was small but in test regex.
I am back.

Reviewers: rsmith, rengolin

Subscribers: nlewycky, rjmccall, cfe-commits

Differential Revision: https://reviews.llvm.org/D26117

llvm-svn: 285497
2016-10-29 15:28:30 +00:00
Piotr Padlewski 2f8b97f3a6 NFC small format
llvm-svn: 285496
2016-10-29 15:28:25 +00:00
Sanjay Patel 978f827d12 [InstCombine] re-use bitcasted compare operands in selects (PR28001)
These mixed bitcast patterns show up with SSE/AVX intrinsics because we bitcast function parameters to <2 x i64>.

The bitcasts obfuscate the expected min/max forms as shown in PR28001:
https://llvm.org/bugs/show_bug.cgi?id=28001#c6

Differential Revision: https://reviews.llvm.org/D25943

llvm-svn: 285495
2016-10-29 15:22:04 +00:00
Simon Pilgrim 75a697a17e [DAGCombiner] (REAPPLIED) Add vector demanded elements support to computeKnownBits
Currently computeKnownBits returns the common known zero/one bits for all elements of vector data, when we may only be interested in one/some of the elements.

This patch adds a DemandedElts argument that allows us to specify the elements we actually care about. The original computeKnownBits implementation calls with a DemandedElts demanding all elements to match current behaviour. Scalar types set this to 1.

The approach was found to be easier than trying to add a per-element known bits solution, for a similar usefulness given the combines where computeKnownBits is typically used.

I've only added support for a few opcodes so far (the ones that have proven straightforward to test), all others will default to demanding all elements but can be updated in due course.

DemandedElts support could similarly be added to computeKnownBitsForTargetNode in a future commit.

This looked like this had caused compile time regressions on some buildbots (and was reverted in rL285381), but appears to have just been a harmless bystander!

Differential Revision: https://reviews.llvm.org/D25691

llvm-svn: 285494
2016-10-29 11:29:39 +00:00
Michael Zuckerman 25eb420233 [X86][AVX512][Clang][Intrinsics][reduce] Adding missing reduce (max|min) intrinsics to Clang .
After LGTM and Check-all 

Vector-reduction arithmetic accepts vectors as inputs and produces 
scalars as outputs.This class of vector operation forms the basis 
of many scientific computations. In vector-reduction arithmetic, 
the evaluation off is independent of the order of the input elements of V.

Reviewer: 1. craig.topper 
          2. igorb

Differential Revision: https://reviews.llvm.org/D25988

llvm-svn: 285493
2016-10-29 10:29:20 +00:00
Elena Demikhovsky 519b4ccd70 Fixed FMA + FNEG combine.
Masked form of FMA should be omitted in this optimization.

Differential Revision: https://reviews.llvm.org/D25984

llvm-svn: 285492
2016-10-29 08:44:46 +00:00
Tobias Grosser ebb626e4b7 [ScopDetect] Use SCEVRewriteVisitor to simplify SCEVRemoveSMax rewriter
ScalarEvolution got at some pointer a SCEVRewriteVisitor. Use it to simplify
our SCEVRemoveSMax visitor.

llvm-svn: 285491
2016-10-29 06:19:34 +00:00
Matt Arsenault c88ba36eab AMDGPU: Use 1/2pi inline imm on VI
I'm guessing at how it is supposed to be printed

llvm-svn: 285490
2016-10-29 04:05:06 +00:00
Rui Ueyama c802fc2623 Attempt to fix a buildbot really this time.
llvm-svn: 285489
2016-10-29 01:28:06 +00:00
Matthias Braun 7d78614ae9 AArch64DeadRegisterDefinitionsPass: Cleanup; NFC
- Fix doxygen file comment
- reduce indentation in loop
- Factor out some common subexpressions
- Move independent helper function out of class
- Fix Changed flag (this is not strictly NFC but a bugfix, but the flag
  seems ignored anyway)

llvm-svn: 285488
2016-10-29 01:03:41 +00:00
Rui Ueyama 77be2403f6 Define calculateDbgStreamSize for consistency.
llvm-svn: 285487
2016-10-29 00:56:44 +00:00
Tim Shen 1bab9cfbe5 [APFloat] Remove the redundent function body of uninitialized ctor, which should be done in r285468
llvm-svn: 285486
2016-10-29 00:51:41 +00:00
Mehdi Amini 31fdcf39d3 Revert "Added 'inline' attribute to basic_string's destructor"
This reverts commit r285456, which broke LTO bootstrap on Darwin.

llvm-svn: 285485
2016-10-29 00:50:02 +00:00
Todd Fiala fe68f09975 Limit LLDB_EXPORT_ALL_SYMBOLS to lldb symbols
LLDB_EXPORT_ALL_SYMBOLS used to instruct the build to export all
the symbols in liblldb on CMake builds.  This change limits the
CMake define to only add in the lldb_private namespace to the
symbols that normally get exported, such that we export all the
symbols in the public lldb namespace and the lldb_private namespace.

This is a fix for:
https://llvm.org/bugs/show_bug.cgi?id=30822

Reviewers: labath, beanz

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D26093

llvm-svn: 285484
2016-10-29 00:29:15 +00:00
Zachary Turner 5b2243e884 Resubmit "Add support for advanced number formatting."
This resubmits r284436 and r284437, which were reverted in
r284462 as they were breaking the AArch64 buildbot.

The breakage on AArch64 turned out to be a miscompile which is
still not fixed, but is actively tracked at llvm.org/pr30748.

This resubmission re-writes the code in a way so as to make the
miscompile not happen.

llvm-svn: 285483
2016-10-29 00:27:22 +00:00
Anna Zaks 7be6b4963c [asan] Set the darwin deployment target for the dead-strip test
ASan dead-strip support relies on a linker option that only exists
in 10.11 and later, so the LLVM instrumentation checks for the deployment
target. This test does not pass when clang is built to choose lower
deployment target by default but runs on newer host.

(Note, the REQUIRES: osx-ld64-live_support clause only checks the host
and not the target OS.)

Differential Revision: https://reviews.llvm.org/D26107

llvm-svn: 285482
2016-10-29 00:27:07 +00:00
Rui Ueyama c95b46449a Do not print out Flags field twice.
llvm-svn: 285481
2016-10-28 23:57:37 +00:00
Davide Italiano 86168b23cf [DAGCombiner] Fix a crash visiting `AND` nodes.
Instead of asserting that the shift count is != 0 we just bail out
as it's not profitable trying to optimize a node which will be
removed anyway.

Differential Revision:  https://reviews.llvm.org/D26098

llvm-svn: 285480
2016-10-28 23:55:32 +00:00
Tom Stellard 6695ba0440 AMDGPU/SI: Don't use non-0 waitcnt values when waiting on Flat instructions
Summary:
Flat instruction can return out of order, so we need always need to wait
for all the outstanding flat operations.

Reviewers: tony-tye, arsenm

Subscribers: kzhuravl, wdng, nhaehnle, llvm-commits, yaxunl

Differential Revision: https://reviews.llvm.org/D25998

llvm-svn: 285479
2016-10-28 23:53:48 +00:00
Saleem Abdulrasool 2678d023ca build: give aliases the same visibility
ARM EABI also uses function aliases.  Ensure that those aliased functions are
given proper visibility annotations.

llvm-svn: 285478
2016-10-28 23:37:50 +00:00
Saleem Abdulrasool 2594717436 builtins: ensure that VISIBILITY_HIDDEN is defined properly
The CMake build system had missed this macro as part of the build of the
builtins.  This would result in the builtins exporting symbols which are
implemented in assembly with global visibility.  Ensure that the assembly
optimized routines are given the same visibility as the C routines.

llvm-svn: 285477
2016-10-28 23:19:03 +00:00
Matt Arsenault 4e9c1e3a79 AMDGPU: Fix instruction flags for s_endpgm
Set isReturn, remove hasSideEffects. Also remove
hasCtrlDep, I'm not really sure what that does.

llvm-svn: 285476
2016-10-28 23:00:38 +00:00
Adrian Prantl 3cd37d0aeb Refactor DW_LNE_* into Dwarf.def
llvm-svn: 285475
2016-10-28 22:57:02 +00:00
Adrian Prantl 79deba6446 Refactor DW_LNS_* into Dwarf.def
llvm-svn: 285474
2016-10-28 22:56:59 +00:00
Adrian Prantl 8580d3f3d3 Refactor DW_APPLE_PROPERTY_* into Dwarf.def
llvm-svn: 285473
2016-10-28 22:56:56 +00:00
Adrian Prantl 44a4461b16 Refactor DW_CFA_* into Dwarf.def
llvm-svn: 285472
2016-10-28 22:56:53 +00:00
Adrian Prantl d50e3e0593 Remove whitespace
llvm-svn: 285471
2016-10-28 22:56:50 +00:00
Adrian Prantl 23865816d5 Refactor all DW_FORM_* constants into Dwarf.def
llvm-svn: 285470
2016-10-28 22:56:45 +00:00
Eric Fiselier d03a5ffcf6 Remove files missed in r285466
llvm-svn: 285469
2016-10-28 22:54:24 +00:00
Tim Shen b4991548c8 [APFloat] Fix memory bugs revealed by MSan
Reviewers: eugenis, hfinkel, kbarton, iteratee, echristo

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D26102

llvm-svn: 285468
2016-10-28 22:45:33 +00:00
Justin Bogner db6b6a7f0c SDAG: Make sure we use an allocatable reg class when we create this vreg
As per the discussion on r280783, if constrainRegClass fails we need
to call getAllocatableClass like we did before that commit.

llvm-svn: 285467
2016-10-28 22:42:54 +00:00
Eric Fiselier 0c3b87d925 Revert addition of __libcpp_library_version
llvm-svn: 285466
2016-10-28 22:37:24 +00:00
Kostya Serebryany 8550238f4a [libFuzzer] mention one more trophie
llvm-svn: 285465
2016-10-28 22:03:54 +00:00
Justin Lebar 1535a5e9df Add missing lit.local.cfg to llvm/test/Transforms/CodeGenPrepare/NVPTX.
llvm-svn: 285464
2016-10-28 21:56:07 +00:00
Matt Arsenault 7b6475568d AMDGPU: Add definitions for scalar store instructions
Also add glc bit to the scalar loads since they exist on VI
and change the caching behavior.

This currently has an assembler bug where the glc bit is incorrectly
accepted on SI/CI which do not have it.

llvm-svn: 285463
2016-10-28 21:55:15 +00:00
Matt Arsenault 4b6a6cc8e9 AMDGPU: Rename glc operand type
While trying to add the glc bit to SMEM instructions on VI
with the new refactoring I ran into some kind of shadowing
problem for the glc operand when using the pseudoinstruction
as a multiclass parameter.

Everywhere that currently uses it defines the operand to have the same
name as its type, i.e. glc:$glc which works. For some reason now it
conflicts, and its up evaluating to the wrong thing. For the
real encoding classes,

let Inst{16} = !if(ps.has_glc, glc, ?); was not being evaluated
and still visible in the Inst initializer in the expanded td file.
In other cases I got a a different error about an illegal operand
where this was using { 0 } initializer from the bits<1> glc initializer
instead of evaluating it as false in the if.

For consistency all of the operand types should probably
be captialized to avoid conflicting with the variable names
unless somebody has a better idea of how to fix this.

llvm-svn: 285462
2016-10-28 21:55:08 +00:00
Justin Lebar f0a80ba385 [NVPTX] Compute 'rem' using the result of 'div', if possible.
Summary:
In isel, transform

  Num % Den

into

  Num - (Num / Den) * Den

if the result of Num / Den is already available.

Reviewers: tra

Subscribers: hfinkel, llvm-commits, jholewinski

Differential Revision: https://reviews.llvm.org/D26090

llvm-svn: 285461
2016-10-28 21:44:00 +00:00