Commit Graph

554 Commits

Author SHA1 Message Date
Derek Schuff 5ec5128f64 update comment
llvm-svn: 240601
2015-06-24 22:36:38 +00:00
Derek Schuff 3c6a48d119 Relax assertion in x86_64 byval argument handling for 32-bit pointers
Summary:
Byval argument pair formation assumes that if a type is less than 8 bytes
it must be an integer and not a pointer, which is not true for x32 and NaCl.

Relax the assertion and add a test for a codegen case that triggered it.

Reviewers: jvoung

Subscribers: jfb, cfe-commits

Differential Revision: http://reviews.llvm.org/D10701

llvm-svn: 240600
2015-06-24 22:36:36 +00:00
Yaron Keren b76cb044f1 Silence VC warning C4715: '`anonymous namespace'::getNativeVectorSizeForA VXABI' :
not all control paths return a value.

llvm-svn: 240389
2015-06-23 09:45:42 +00:00
Alexander Kornienko ab9db51042 Revert r240270 ("Fixed/added namespace ending comments using clang-tidy").
llvm-svn: 240353
2015-06-22 23:07:51 +00:00
Ahmed Bougacha 0b938284da [CodeGen] Teach X86_64ABIInfo about AVX512.
As specified in the SysV AVX512 ABI drafts. It follows the same scheme
as AVX2: 

    Arguments of type __m512 are split into eight eightbyte chunks.
    The least significant one belongs to class SSE and all the others
    to class SSEUP.

This also means we change the OpenMP SIMD default alignment on AVX512.

Based on r240337.
Differential Revision: http://reviews.llvm.org/D9894

llvm-svn: 240338
2015-06-22 21:31:43 +00:00
Ahmed Bougacha d39a4151b3 [CodeGen] Use enum for AVX level in X86*TargetCodeGenInfo. NFCI.
Follow-up to r237989: expressing the AVX level as an enum makes it
simple to extend it with AVX512.

llvm-svn: 240337
2015-06-22 21:30:39 +00:00
Alexander Kornienko 3d9d929e42 Fixed/added namespace ending comments using clang-tidy. NFC
The patch is generated using this command:

  $ tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \
      -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \
      work/llvm/tools/clang

To reduce churn, not touching namespaces spanning less than 10 lines.

llvm-svn: 240270
2015-06-22 09:47:44 +00:00
Eric Christopher 162c91ccc4 Rename the single non-style conformant function in TargetCodeGenInfo
and update all callers.

llvm-svn: 239193
2015-06-05 22:03:00 +00:00
Andrea Di Biagio e7347c67cd [x86-64 ABI] Fix for PR23082: an assertion failure when passing/returning a wrapper union in a full YMM register.
This patch fixes an assertion failure in method
'X86_64ABIInfo::GetByteVectorType'.

Method 'GetByteVectorType' (in TargetInfo.cpp) is responsible
for mapping a QualType 'Ty' (for an argument or return value) to an LLVM IR
type that, according to the ABI, must be passed in a XMM/YMM vector register.

When selecting the IR vector type, method 'GetByteVectorType' always tries to
choose the "best" IR vector type for the 'Ty' in input. In particular, if Ty
is a wrapper structure, it keeps unwrapping it until it finds a vector type VTy.
That VTy is the "preferred IR type".

However, function 'isSingleElementStructure' (used to unwrap structures) does
not know how to look through union types. So, before this patch, if Ty was in
a nest of wrapper structures with at least two union types, we would have
triggered an assertion failure (added at revision 230971).

With this patch, if method 'GetByteVectorType' fails to find the preferred
vector type, we just return a valid (although potentially 'less friendly')
vector type based on the type size. So, rather than asserting on an 'unexpected'
'Ty' in input, we conservatively return vector type <2 x double> if Ty is 16
bytes, or <4 x double> if Ty is 32 bytes.

Differential Revision: http://reviews.llvm.org/D10190

llvm-svn: 238861
2015-06-02 19:34:40 +00:00
Eric Christopher 7565e0d102 Fix 80-column violations.
llvm-svn: 238630
2015-05-29 23:09:49 +00:00
Benjamin Kramer 3204b152b5 Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial types
If the type isn't trivially moveable emplace can skip a potentially
expensive move. It also saves a couple of characters.


Call sites were found with the ASTMatcher + some semi-automated cleanup.

memberCallExpr(
    argumentCountIs(1), callee(methodDecl(hasName("push_back"))),
    on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))),
    hasArgument(0, bindTemporaryExpr(
                       hasType(recordDecl(hasNonTrivialDestructor())),
                       has(constructExpr()))),
    unless(isInTemplateInstantiation()))

No functional change intended.

llvm-svn: 238601
2015-05-29 19:42:19 +00:00
Petar Jovanovic 1a3f965fe3 [MIPS] Re-land the change r238200 to fix extension of integer types
Re-land the change r238200, but with modifications in the tests that should
prevent new failures in some environments as reported with the original
change on the mailing list.

llvm-svn: 238253
2015-05-26 21:07:19 +00:00
Hans Wennborg 74df0df135 Revert r238200: "[MIPS] fix extension of integer types (function calls)"
mips-unsigned-ext-var.c and mips-unsigned-extend.c fail in some builds.

llvm-svn: 238237
2015-05-26 19:39:54 +00:00
Petar Jovanovic 9aa0f1657f [MIPS] fix extension of integer types (function calls)
On MIPS unsigned int type should not be zero extended but sign-extended.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D9198

llvm-svn: 238200
2015-05-26 13:30:54 +00:00
Ahmed Bougacha 1fca2edc48 [CodeGen] Use TargetInfo::getABI() throughout X86*TargetCodeGenInfo.
We already have the ABI, we don't need a "HasAVX" flag.
This will also makes it easier to add an AVX512 ABI.

No functional change intended.

llvm-svn: 237989
2015-05-22 02:25:58 +00:00
Reid Kleckner ac385068f9 Revert changes to DefaultABIInfo accidentally introduced in r208733
Also add trivial handling of transparent unions.

PPC32, MSP430, and XCore apparently all rely on DefaultABIInfo. This
should worry you, because DefaultABIInfo is not implementing the rules
of any particular ABI.

Fixes PR23097, patch by Andy Gibbs.

llvm-svn: 237630
2015-05-18 22:46:30 +00:00
Ulrich Weigand 66ff51b4ea [SystemZ] Add support for z13 and its vector facility
This patch adds support for the z13 architecture type.  For compatibility
with GCC, a pair of options -mvx / -mno-vx can be used to selectively
enable/disable use of the vector facility.

When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
  (except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.

The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.

However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.

These alignment rules are not only implemented at the C language level,
but also at the LLVM IR level.  This is done by selecting a different
DataLayout string depending on whether the vector ABI is in effect or not.

Based on a patch by Richard Sandiford.

llvm-svn: 236531
2015-05-05 19:35:52 +00:00
Artem Belevich 7093e40641 [cuda] Allow using integral non-type template parameters as launch_bounds attribute arguments.
- Changed CUDALaunchBounds arguments from integers to Expr* so they can
   be saved in AST for instantiation.
 - Added support for template instantiation of launch_bounds attrubute.
 - Moved evaluation of launch_bounds arguments to NVPTXTargetCodeGenInfo::
   SetTargetAttributes() where it can be done after template instantiation.
 - Added a warning on negative launch_bounds arguments.
 - Amended test cases.

Differential Revision: http://reviews.llvm.org/D8985

llvm-svn: 235452
2015-04-21 22:55:54 +00:00
Pete Cooper 635b509dee Change AArch64 i128 returns to use [2 x i64] when possible.
Something like { void*, void * } would be passed to a function as a [2 x i64], but returned as an i128.  This patch unifies the 2 behaviours so that we also return it as a [2 x i64].

This is better for the quality of the IR, and the size of the final LLVM binary as we tend to want to insert/extract values from these types and do so with the insert/extract instructions is less IR than shifting, truncating, and or'ing values.

Reviewed by Tim Northover.

llvm-svn: 235231
2015-04-17 22:16:24 +00:00
Alexander Kornienko 34eb20725d Use 'override/final' instead of 'virtual' for overridden methods
Summary:
The patch is generated using clang-tidy misc-use-override check.

This command was used:

  tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py \
    -checks='-*,misc-use-override' -header-filter='llvm|clang' -j=32 -fix

Reviewers: dblaikie

Reviewed By: dblaikie

Subscribers: klimek, cfe-commits

Differential Revision: http://reviews.llvm.org/D8926

llvm-svn: 234678
2015-04-11 02:00:23 +00:00
David Blaikie 2e80428dc5 clang-format my last commit
(sorry, keep forgetting that)

llvm-svn: 234129
2015-04-05 22:47:07 +00:00
David Blaikie 1ed728c499 [opaque pointer type] More GEP API migrations
Looks like the VTable code in particular will need some work to pass
around the pointee type explicitly.

llvm-svn: 234128
2015-04-05 22:45:47 +00:00
David Blaikie fb901c7abf [opaque pointer type] more GEP API migrations
llvm-svn: 234097
2015-04-04 15:12:29 +00:00
Manman Ren 2738278b7f [i386 ABI] expand small C like structs in C++, just like how we handle small
C structs.

This comes up when we have a function that takes a struct and is defined in a
C++ file and used in a C file.

Before this commit, we will generate byval for C++ and will expand the struct
for C, thus causing difference at IR level. We will use bitcast of function type
at the callsite, which causes the inliner to not inline the function.

This commit changes how we handle small C like structs at IR level, but at
backend, we should generate the same argument passing before and after the
commit.

Note that the condition for expanding is still over conservative. We should be
able to expand type that is spelled with “class” and types that are not C-like.
But this commit fixes the inconsistent argument passing between C/C++.

Reviewed by John.

rdar://20121030

llvm-svn: 234033
2015-04-03 18:10:29 +00:00
Ulrich Weigand 759449c76a [SystemZ] Fix some ABI corner cases
Running the GCC's inter-compiler ABI compatibility test suite uncovered
a couple of errors in clang's SystemZ ABI implementation.  These all
affect only rare corner cases:

- Short vector types

GCC synthetic vector types defined with __attribute__ ((vector_size ...))
are always passed and returned by reference.  (This is not documented in
the official ABI document, but is the de-facto ABI implemented by GCC.)
clang would do that only for vector sizes >= 16 bytes, but not for shorter
vector types.

- Float-like aggregates and empty bitfields

clang would consider any aggregate containing an empty bitfield as
first element to be a float-like aggregate.  That's obviously wrong.
According to the ABI doc, the presence of an empty bitfield makes
an aggregate to be *not* float-like.  However, due to a bug in GCC,
empty bitfields are ignored in C++; this patch changes clang to be
compatible with this "feature" of GCC.

- Float-like aggregates and va_arg

The va_arg implementation would mis-detect some aggregates as float-like
that aren't actually passed as such.  This applies to aggregates that
have only a single element of type float or double, but using an aligned
attribute that increases the total struct size to more than 8 bytes.

This error occurred because the va_arg implement used to have an copy
of the float-like aggregate detection logic (i.e. it would call the
isFPArgumentType routine, but not perform the size check).

To simplify the logic, this patch removes the duplicated logic and
instead simply checks the (possibly coerced) LLVM argument type as
already determined by classifyArgumentType.

llvm-svn: 233543
2015-03-30 13:49:01 +00:00
Joerg Sonnenberger 27173288c2 Under duress, move check for target support of __builtin_setjmp/
__builtin_longjmp to Sema as requested by John McCall.

llvm-svn: 231986
2015-03-11 23:46:32 +00:00
Hal Finkel 0d0a1a53e3 [PowerPC] ABI support for the QPX vector instruction set
Support for the QPX vector instruction set, used on the IBM BG/Q supercomputer,
has recently been added to the LLVM PowerPC backend. This vector instruction
set requires some ABI modifications because the ABI on the BG/Q expects
<4 x double> vectors to be provided with 32-byte stack alignment, and to be
handled as native vector types (similar to how Altivec vectors are handled on
mainline PPC systems). I've named this ABI variant elfv1-qpx, have made this
the default ABI when QPX is supported, and have updated the ABI handling code
to provide QPX vectors with the correct stack alignment and associated
register-assignment logic.

llvm-svn: 231960
2015-03-11 19:14:15 +00:00
Tim Northover d157e19562 ARM: use ABI-specified alignment for byval parameters.
When passing a type with large alignment byval, we were specifying the type's
alignment rather than the alignment that the backend is actually capable of
producing (ABIAlign).

This would be OK (if odd) assuming the backend dealt with it prooperly,
unfortunately it doesn't and trying to pass types with "byval align 16" can
cause it to set fp incorrectly and trash the stack during the prologue. I'll be
fixing that in a separate patch, but Clang should still be emitting IR that's
as close to its intent as possible.

rdar://20059039

llvm-svn: 231706
2015-03-09 21:40:42 +00:00
Reid Kleckner 533bd17268 Fix test/CodeGen/builtins.c for platforms that don't lower sjlj
Opt in Win64 to supporting sjlj lowering. We have the backend lowering,
so I think this was just an oversight because WinX86_64TargetCodeGenInfo
doesn't inherit from X86_64TargetCodeGenInfo.

llvm-svn: 231280
2015-03-04 19:24:16 +00:00
Benjamin Kramer 83b1bf3a27 CodeGen: Fix passing of classes with only one AVX vector member in AVX registers
isSingleElementStruct was a bit too tight in its definition of struct
so we got a mismatch between classify() and the actual code generation.
To make matters worse the code in GetByteVectorType still defaulted to
<2 x double> if it encountered a type it didn't know, making this a
silent miscompilation (PR22753).

Completely remove the "preferred type" stuff from GetByteVectorType and
make it fail an assertion if someone tries to use it with a type not
suitable for a vector register.

llvm-svn: 230971
2015-03-02 16:09:24 +00:00
Benjamin Kramer 39ccabe500 Replace loop with equivalent ArrayRef function. NFC.
llvm-svn: 230949
2015-03-02 11:57:06 +00:00
Peter Collingbourne 69b004d987 UBSan: Use the correct function prologue for x32.
llvm-svn: 230571
2015-02-25 23:18:42 +00:00
Tim Northover bc784d1caa ARM: Simplify PCS handling.
The backend should now be able to handle all AAPCS rules based on argument
type, which means Clang no longer has to duplicate the register-counting logic
and the CodeGen can be significantly simplified.

llvm-svn: 230349
2015-02-24 17:22:40 +00:00
Michael Kuperstein 4f818708a8 [WinX86_64 ABI] Treat C99 _Complex as a struct
MSVC does not support C99 _Complex.
ICC, however, does support it on windows x86_64, and treats it, for purposes of parameter passing, as equivalent to a struct containing two fields (for the real and imaginary part). 

Differential Revision: http://reviews.llvm.org/D7825

llvm-svn: 230315
2015-02-24 09:35:58 +00:00
Joerg Sonnenberger 096feeb741 Only lower __builtin_setjmp / __builtin_longjmp to
llvm.eh.sjlj.setjmp / llvm.eh.sjlj.longjmp, if the backend is known to
support them outside the Exception Handling context. The default
handling in LLVM codegen doesn't work and will create incorrect code.
The ARM backend on the other hand will assert if the intrinsics are
used.

llvm-svn: 230255
2015-02-23 20:23:47 +00:00
Sanjay Patel eb2af4e8b1 x86-64 ABI: unwrap single element structs / arrays of 256-bit vectors to pass and return in registers
This is a patch for PR22563 ( http://llvm.org/bugs/show_bug.cgi?id=22563 ).

We were not correctly unwrapping a single 256-bit AVX vector that was defined as an array of 1 inside a struct.

We would generate a <4 x float> param/return value instead of <8 x float> and lose half of the vector.

Differential Revision: http://reviews.llvm.org/D7614

llvm-svn: 229408
2015-02-16 17:26:51 +00:00
Michael Kuperstein f0e4ccffc5 Fix quoting of #pragma comment for MS compat, clang part.
For #pragma comment(linker, ...) MSVC expects the comment string to be quoted, but for #pragma comment(lib, ...) the compiler itself quotes the library name.
Since this distinction disappears by the time the directive reaches the backend, move quoting for the "lib" version to the frontend.

Differential Revision: http://reviews.llvm.org/D7653

llvm-svn: 229376
2015-02-16 11:57:43 +00:00
Saleem Abdulrasool 71d1dd1e0c CodeGen: create a WindowsARMTargetCodeGenInfo
Create a new TargetCodeGenInfo for Windows on ARM to permit annotating the
functions with stack-probe-size (for /Gs and -mstack-probe-support) for
generating the stack probe necessary for Windows targets.  This will be used by
the backend when lowering the frame to generate the stack probe appropriately.

llvm-svn: 227641
2015-01-30 23:29:19 +00:00
Derek Schuff 71658bd15e Remove NaClX86_64TargetCodeGenInfo and NaClARMTargetCodeGenInfo
Summary:
They just existed before to use NaCl's custom ABIInfos; now that those are gone,
the custom TargetCodeGenInfos are no longer needed either.

Test Plan: don't break the existing tests

Reviewers: jvoung

Subscribers: jfb, cfe-commits

Differential Revision: http://reviews.llvm.org/D7234

llvm-svn: 227406
2015-01-29 00:47:04 +00:00
Derek Schuff 3970a7ec9b Remove support for pnaclcall attribute
Summary:
It was used for interoperability with PNaCl's calling conventions, but
it's no longer needed.

Also Remove NaCl*ABIInfo which just existed to delegate to either the portable
or native ABIInfo, and remove checkCallingConvention which was now a no-op
override.

Reviewers: jvoung

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D7206

llvm-svn: 227362
2015-01-28 20:24:52 +00:00
Alex Rosenberg 12207fab78 Begin to teach clang about the PS4.
llvm-svn: 227194
2015-01-27 14:47:44 +00:00
Hans Wennborg 77dc236605 Implement command line options for stack probe space
This code adds the -mstack-probe-size command line option and implements the /Gs
compiler switch for clang-cl.

This should fix http://llvm.org/bugs/show_bug.cgi?id=21896

Patch by Andrew H!

Differential Revision: http://reviews.llvm.org/D6685

llvm-svn: 226601
2015-01-20 19:45:50 +00:00
Daniel Sanders 998c910262 [mips] Handle transparent unions correctly.
Summary:
This fixes MultiSource/Applications/lemon on big-endian N32 by correcting the
handling of the argument to wait(). glibc defines it as a transparent union of
void* and int*. Such unions are passed according to the rules of the first
member so the argument must be passed as if it were a void* (sign extended from
i32 to i64) and not as a union (shifted to the upper bits of an i64).

wait() already behaves correctly on big-endian O32 and N64 since the union is
already the same size as an argument slot.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D6963

llvm-svn: 225981
2015-01-14 12:00:12 +00:00
Chandler Carruth 0d9593ddec [cleanup] Re-sort *all* #include lines with llvm/utils/sort_includes.py
Sorry for the noise, I managed to miss a bunch of recent regressions of
include orderings here. This should actually sort all the includes for
Clang. Again, no functionality changed, this is just a mechanical
cleanup that I try to run periodically to keep the #include lines as
regular as possible across the project.

llvm-svn: 225979
2015-01-14 11:29:14 +00:00
Daniel Sanders cdcb580d4e [mips] Fix va_arg() for pointer types on big-endian N32.
Summary:
The Mips ABI's treat pointers in the same way as integers. They are
sign-extended to 32-bit for O32, and 64-bit for N32/N64. This doesn't matter
for O32 and N64 where pointers are already the correct width but it does matter
for big-endian N32, where pointers are 32-bit and need promoting.

The caller side is already passing pointers correctly. This patch corrects the
callee.

Reviewers: vmedic, atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D6812

llvm-svn: 225782
2015-01-13 10:47:00 +00:00
Tom Stellard d8e38a3206 R600: Handle amdgcn triple
For now there is no difference between amdgcn and r600.

llvm-svn: 225294
2015-01-06 20:34:47 +00:00
Peter Collingbourne f770683f14 Implement the __builtin_call_with_static_chain GNU extension.
The extension has the following syntax:

  __builtin_call_with_static_chain(Call, Chain)
  where Call must be a function call expression and Chain must be of pointer type

This extension performs a function call Call with a static chain pointer
Chain passed to the callee in a designated register. This is useful for
calling foreign language functions whose ABI uses static chain pointers
(e.g. to implement closures).

Differential Revision: http://reviews.llvm.org/D6332

llvm-svn: 224167
2014-12-12 23:41:25 +00:00
Duncan P. N. Exon Smith fb49491477 IR: Update clang for Metadata/Value split in r223802
Match LLVM API changes from r223802.

llvm-svn: 223803
2014-12-09 18:39:32 +00:00
Matt Arsenault 43fae6c855 Add attributes for AMDGPU register limits.
This is a performance hint that can be applied to kernels
to attempt to limit the number of used registers.

llvm-svn: 223384
2014-12-04 20:38:18 +00:00
Anton Korobeynikov d90dd7977e Fix invalid calling convention used for libcalls on ARM.
ARM ABI specifies that all the libcalls use soft FP ABI 
(even hard FP binaries). These days clang emits _mulsc3 / _muldc3
calls with default (C) calling convention which would be translated
into AAPCS_VFP LLVM calling and thus the result of complex
multiplication will be bogus.

Introduce a way for a target to specify explicitly calling
convention for libcalls. Right now this is temporary correctness
fix. Ultimately, we'll end with intrinsic for complex 
multiplication and all calling convention decisions for libcalls
will be put into backend.

llvm-svn: 223123
2014-12-02 16:04:58 +00:00
Reid Kleckner ee7cf84c8f Use nullptr to silence -Wsentinel when self-hosting on Windows
Richard rejected my Sema change to interpret an integer literal zero in
a varargs context as a null pointer, so -Wsentinel sees an integer
literal zero and fires off a warning. Only CodeGen currently knows that
it promotes integer literal zeroes in this context to pointer size on
Windows.  I didn't want to teach -Wsentinel about that compatibility
hack. Therefore, I'm migrating to C++11 nullptr.

llvm-svn: 223079
2014-12-01 22:02:27 +00:00
Tim Northover b047bfae32 AArch64: simplify PCS mapping.
Now that LLVM can count the registers needed to implement AAPCS rules, we don't
need to duplicate that logic here. This means we can drop the explicit padding
and also use more natural types in many cases (e.g. "struct { float arr[3]; }"
used to end up as "[2 x double]" to avoid holes on the stack.

The one wrinkle is that AAPCS va_arg was also using the register counting
machinery. But the local replacement isn't too bad.

llvm-svn: 222904
2014-11-27 21:02:49 +00:00
Reid Kleckner 2918fefd1c Remove unnecessary environment switch
All supported environments on x86 Windows return structs in EAX:EDX.
This removes code added in r204978 that had to get updated in r222680.
We should now have the same behavior we had before r204978.

llvm-svn: 222697
2014-11-24 22:05:42 +00:00
Saleem Abdulrasool aca550fdb5 CodeGen: make i686-windows-itanium more similar to msvc
The itanium environment follows the system calling convention for structures.
Pass small aggregates via registers.

llvm-svn: 222680
2014-11-24 20:14:29 +00:00
Saleem Abdulrasool ec5c624550 CodeGen: tweak struct ABI handling
Cygwin and MinGW fail to conform to the underlying system's structure passing
ABI.  Make the check more precise to ensure that we correctly generate code for
the itanium environment.

llvm-svn: 222626
2014-11-23 02:16:24 +00:00
Daniel Sanders 59229dcb29 Allow EmitVAArg() to promote types and use this to fix some N32/N64 vararg issues for Mips.
Summary:
With this patch, passing a va_list to another function and reading 10 int's from
it works correctly on a big-endian target.

Based on a pair of patches by David Chisnall, one of which I've reworked
for the current trunk.

Reviewers: theraven, atanasyan

Reviewed By: theraven, atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D6248

llvm-svn: 222339
2014-11-19 10:01:35 +00:00
Reid Kleckner b1be683074 Fix IRGen for passing transparent unions
We have had a test for this for a long time with a FIXME saying what we
should be doing. This just does it.

Fixes PR21573.

llvm-svn: 222074
2014-11-15 01:41:41 +00:00
David Blaikie 1cbb971c2d Remove some redundant virtual specifiers on overriden functions.
llvm-svn: 222024
2014-11-14 19:09:44 +00:00
Tim Northover 5a1558ec31 ARM ABI: simplify decisions on whether args can be expanded.
Homogeneous aggregates on AAPCS_VFP ARM need to be passed *without* being
flattened (e.g. [2 x float] rather than "float, float") for various weird ABI
reasons. However, this isn't the case for anything else; further, we know at
the ABIArgInfo::getDirect callsites whether this flattening is allowed.

So, we can get more unified ARM code, with a simpler Clang, by just using that
knowledge directly.

llvm-svn: 221559
2014-11-07 22:30:50 +00:00
Roman Divacky 8a12d84264 Implement vaarg lowering for ppc32. Lowering of scalars and aggregates
is supported. Complex numbers are not.

llvm-svn: 221170
2014-11-03 18:32:54 +00:00
NAKAMURA Takumi 8c89496d47 clang/lib/CodeGen/TargetInfo.cpp: Fix a couple of warnings. [-Winconsistent-missing-override]
llvm-svn: 221039
2014-11-01 01:32:27 +00:00
Reid Kleckner 80944df6f4 Implement IRGen for the x86 vectorcall convention
The most complex aspect of the convention is the handling of homogeneous
vector and floating point aggregates.  Reuse the homogeneous aggregate
classification code that we use on PPC64 and ARM for this.

This convention also has a C mangling, and we apparently implement that
in both Clang and LLVM.

Reviewed By: majnemer

Differential Revision: http://reviews.llvm.org/D6063

llvm-svn: 221006
2014-10-31 22:00:51 +00:00
Reid Kleckner e9f6a717dd Fix ARM HVA classification of classes with non-virtual bases
Reuse the PPC64 HVA detection algorithm for ARM and AArch64. This is a
nice code deduplication, since they are roughly identical. A few virtual
method extension points are needed to understand how big an HVA can be
and what element types it can have for a given architecture.

Also make the record expansion code work in the presence of non-virtual
bases.

Reviewed By: uweigand, asl

Differential Revision: http://reviews.llvm.org/D6045

llvm-svn: 220972
2014-10-31 17:10:41 +00:00
Eli Bendersky 95338a09c0 Pass aggregates on the stack without splitting in NVPTX.
Following the NVVM IR specifications, arguments of aggregate type should be
passed on the stack without splitting (byval).

http://reviews.llvm.org/D6020

Patch by Jacques Pienaar.

llvm-svn: 220854
2014-10-29 13:43:21 +00:00
Ulrich Weigand a094f0428b [PowerPC ABI] Bug 21398 - Consider C++ base classes in HA classification
As discussed in bug 21398, PowerPC ABI code needs to consider C++ base
classes when classifying a class as homogeneous aggregate (or not) for
ABI purposes.

llvm-svn: 220852
2014-10-29 13:23:20 +00:00
Daniel Sanders aa1b35590f [mips] Mark aggregate arguments passed in registers with the inreg attribute
Summary:
This allows us to easily identify them in the backend which in turn allows us
to handle them correctly for big-endian targets (where they must be shifted
into the upper bits of the register).

Depends on D5961

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits, theraven

Differential Revision: http://reviews.llvm.org/D5962

llvm-svn: 220566
2014-10-24 15:30:16 +00:00
Daniel Sanders 5b445b3844 [mips] Promote all integral/enumeration types to the GPR width
Summary:
Ensure all integral/enumeration types are appropriately annotated with
signext/zeroext. In particular, i32 now has these attributes when using the
N32/N64 ABI. This paves the way for accurately representing the way the
N32/N64 ABI's promotes integer arguments to i64.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits, theraven

Differential Revision: http://reviews.llvm.org/D5961

llvm-svn: 220563
2014-10-24 14:42:42 +00:00
David Majnemer ed68407c46 CodeGen: Update for LLVM API change
Callers of DataLayout::RoundUpAlignment should switch to
RoundUpToAlignment.

llvm-svn: 220188
2014-10-20 06:13:36 +00:00
Hal Finkel 92e31a5ead Add getOpenMPSimdDefaultAlignment for PowerPC
When the aligned clause of an OpenMP simd pragma is not provided with an
explicit alignment, a target-dependent default must be used. This adds such a
default of PPC targets.

This will become slightly more complicated when BG/Q support is added (because
then it will depend on the type). For now, 16 is a correct value for all
systems, and covers Altivec and VSX vectors.

llvm-svn: 218994
2014-10-03 17:45:20 +00:00
Jan Wen Voung 01c21e8f45 [x32/NaCl] Check if method pointers straddle an eightbyte to classify Hi
Summary:
Currently, with struct my_struct { int x; method_ptr y; };
a call to foo(my_struct s) may end up dropping the last 4 bytes
of the method pointer for x86_64 NaCl and x32.

When checking Has64BitPointers, also check if the method pointer
straddles an eightbyte boundary and classify Hi as well as Lo if needed.

Test Plan: test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp

Reviewers: dschuff, pavel.v.chupin

Subscribers: jfb

Differential Revision: http://reviews.llvm.org/D5555

llvm-svn: 218889
2014-10-02 16:56:57 +00:00
Alexander Musman 09184fedc0 [OPENMP] Codegen of the ‘aligned’ clause for the ‘omp simd’ directive.
Differential Revision: http://reviews.llvm.org/D5499

llvm-svn: 218660
2014-09-30 05:29:28 +00:00
Alexey Samsonov 34625dda07 Introduce CGFunctionInfo::getNumRequiredArgs(). NFC.
Save the callers from necessity to special-case on variadic functions.

llvm-svn: 218625
2014-09-29 21:21:48 +00:00
Reid Kleckner 739aa12b79 Revert "Don't use comdats for initializers on platforms that don't support it"
On further investigation, COMDATs should work with .ctors, and the issue
I was hitting probably reproduces with .init_array.

This reverts commit r218287.

llvm-svn: 218313
2014-09-23 16:20:01 +00:00
Reid Kleckner 6c03130542 Don't use comdats for initializers on platforms that don't support it
In particular, pre-.init_array ELF uses the .ctors section mechanism.
MinGW COFF also uses .ctors, now that I think about it. Therefore,
restrict this optimization to the two platforms that are currently known
to work: ELF with .init_array and COFF with .CRT$XCU.

llvm-svn: 218287
2014-09-23 00:00:14 +00:00
Daniel Sanders 8d36a61f52 [mips] Correct alignment of vectors passed in varargs for the O32 ABI.
Summary:
Vectors are normally 16-byte aligned, however the O32 ABI enforces a
maximum alignment of 8-bytes since the base of the stack is 8-byte aligned.
Previously, this was enforced on the caller side, but not on the callee side.

This fixes the output of OpenCL's printf when given vectors.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: llvm-commits, pekka.jaaskelainen

Differential Revision: http://reviews.llvm.org/D5433

llvm-svn: 218248
2014-09-22 13:27:06 +00:00
Rafael Espindola 9f834735cd Don't use the third field of llvm.global_ctors for MachO.
The field is defined as:

If the third field is present, non-null, and points to a global variable or function, the initializer function will only run if the associated data from the current module is not discarded.

And without COMDATs we can't implement that.

llvm-svn: 218097
2014-09-19 01:54:22 +00:00
Rafael Espindola 5b6fa2f85a Revert "Put more stuff in the comdat used for variables with static init."
This reverts commit r218089.
It looks like it was causing issues on COFF.

llvm-svn: 218094
2014-09-19 01:28:16 +00:00
Rafael Espindola c0ce9eca0b Put more stuff in the comdat used for variables with static init.
Clang can already handle

-------------------------------------------
struct S {
  static const int x;
};
template<typename T> struct U {
  static const int k;
};
template<typename T> const int U<T>::k = T::x;

const int S::x = 42;
extern const int *f();
const int *g() { return &U<S>::k; }
int main() {
  return *f() + U<S>::k;
}

const int *f() { return &U<S>::k; }
-------------------------------------------

since r217264 which puts the .inint_array section in the same COMDAT
as the variable.

This patch allows the linker to more easily delete some dead code and data by
putting the guard variable and init function in the same COMDAT.

llvm-svn: 218089
2014-09-18 23:41:44 +00:00
Reid Kleckner 9b3e3dfc54 MS inline asm: Allow __asm blocks to set a return value
If control falls off the end of a function after an __asm block, MSVC
assumes that the inline assembly filled the EAX and possibly EDX
registers with an appropriate return value. This functionality is used
in inline functions returning 64-bit integers in system headers, so we
need some amount of compatibility.

This is implemented in Clang by adding extra output constraints to every
inline asm block, and storing the resulting output registers into the
return value slot. If we see an asm block somewhere in the function
body, we emit a normal epilogue instead of marking the end of the
function with a return type unreachable.

Normal returns in functions not using this functionality will overwrite
the return value slot, and in most cases LLVM should be able to
eliminate the dead stores.

Fixes PR17201.

Reviewed By: majnemer

Differential Revision: http://reviews.llvm.org/D5177

llvm-svn: 217187
2014-09-04 20:04:38 +00:00
Daniel Sanders 00a56ffb8d Fix double full-stop that was accidentally added in r217160.
llvm-svn: 217161
2014-09-04 15:07:43 +00:00
Daniel Sanders e5018b6c00 [mips] Mark aggregates returned in registers with the 'inreg' attribute.
Summary:
This allows us to easily find them in the backend after the aggregates have
been lowered to other types. This is important on big-endian targets using
the N32/N64 ABI's since these ABI's must shift small structures into the
upper bits of the register.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5005

llvm-svn: 217160
2014-09-04 15:05:39 +00:00
Daniel Sanders ed39f58390 [mips] Zero-sized structs cannot be ignored in MipsABIInfo::classifyReturnType() for O32
Summary:
They are returned indirectly which causes the other arguments to move to
the next argument slot.

With this, utils/ABITest does not discover any failing cases in the first
500 attempts on big/little endian for O32. Previously some of these failed.
Also tested N32/N64 little endian (big endian has other known issues) with
no issues.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: atanasyan, cfe-commits

Differential Revision: http://reviews.llvm.org/D4811

llvm-svn: 217147
2014-09-04 13:28:14 +00:00
Oliver Stannard ed8ecc8429 Allow __fp16 as a function arg or return type for AArch64
ACLE 2.0 allows __fp16 to be used as a function argument or return
type. This enables this for AArch64.

This also fixes an existing bug that causes clang to not allow
homogeneous floating-point aggregates with a base type of __fp16. This
is valid for AAPCS64, but not for AAPCS-VFP.

llvm-svn: 216558
2014-08-27 16:31:57 +00:00
Oliver Stannard 2bfdc5b517 Move some ARM-specific code from CGCall.cpp to TargetInfo.cpp
This tidies up some ARM-specific code added by r208417 to move it out
of the target-independent parts of clang into TargetInfo.cpp. This
also has the advantage that we can now flatten struct arguments to
variadic AAPCS functions.

llvm-svn: 216535
2014-08-27 10:43:15 +00:00
Julien Lerouge 10dcff81be Re-apply r216491 (Win64 ABI shouldn't extend integer type arguments.)
This time though, preserve the extension for bool types since that's compatible
with what MSVC expects.

See http://reviews.llvm.org/D4380

llvm-svn: 216507
2014-08-27 00:36:55 +00:00
Julien Lerouge e8d34fa172 Revert 216491, it breaks CodeGenCXX/microsoft-abi-member-pointers.cpp
llvm-svn: 216496
2014-08-26 22:11:53 +00:00
Julien Lerouge 0056256b55 Win64 ABI shouldn't extend integer type arguments.
Summary:
MSVC doesn't extend integer types smaller than 64bit, so to preserve
binary compatibility, clang shouldn't either.

For example, the following C code built with MSVC:

unsigned test(unsigned v);
unsigned foobar(unsigned short);
int main() { return test(0xffffffff) + foobar(28); }

Produces the following:

  0000000000000004: B9 FF FF FF FF     mov         ecx,0FFFFFFFFh
  0000000000000009: E8 00 00 00 00     call        test
  000000000000000E: 89 44 24 20        mov         dword ptr [rsp+20h],eax
  0000000000000012: 66 B9 1C 00        mov         cx,1Ch
  0000000000000016: E8 00 00 00 00     call        foobar

And as you can see, when setting up the call to foobar, only cx is overwritten.

If foobar is compiled with clang, then the zero extension added by clang means
the rest of the register, which contains garbage, could be used.

For example if foobar is:

unsigned foobar(unsigned short v) {
    return v;
}

Compiled with clang -fomit-frame-pointer -O3 gives the following assembly:

foobar:
  0000000000000000: 89 C8              mov         eax,ecx
  0000000000000002: C3                 ret

And that function would return garbage because the 16 most significant bits of
ecx still contain garbage from the first call.

With this change, the code for that function is now:

foobar:
  0000000000000000: 0F B7 C1           movzx       eax,cx
  0000000000000003: C3                 ret

Reviewers: chapuni, rnk

Reviewed By: rnk

Subscribers: majnemer, cfe-commits

Differential Revision: http://reviews.llvm.org/D4380

llvm-svn: 216491
2014-08-26 21:52:27 +00:00
Hans Wennborg a302cd9a5e Range'ify some for loops over RecordDecl::fields()
No functionality change.

llvm-svn: 216183
2014-08-21 16:06:57 +00:00
Rafael Espindola 764837431a Delete support for AuroraUX.
auroraux.org is not resolving.

llvm-svn: 215644
2014-08-14 15:14:51 +00:00
Daniel Sanders 2ef3cdd3d5 Revert r214497: [mips] Defer va_arg expansion to the backend.
It appears that the backend does not handle all cases that were handled by clang.
In particular, it does not handle structs as used in
SingleSource/UnitTests/2003-05-07-VarArgs.

llvm-svn: 214512
2014-08-01 13:26:28 +00:00
Daniel Sanders cd8ba86990 [mips] Defer va_arg expansion to the backend.
Summary:
This patch causes clang to emit va_arg instructions to the backend instead of
expanding them into an implementation itself. The backend already implements
va_arg since this is necessary for NaCl so this patch is removing redundant
code.

Together with the llvm patch (D4556) that accounts for the effect of endianness
on the expansion of va_arg, this fixes PR19612.

Depends on D4556

Reviewers: sstankovic, dsanders

Reviewed By: dsanders

Subscribers: rnk, cfe-commits

Differential Revision: http://reviews.llvm.org/D4742

llvm-svn: 214497
2014-08-01 10:29:21 +00:00
Ulrich Weigand 8afad61a93 [PowerPC] Support ELFv1/ELFv2 ABI selection via -mabi= option
While Clang now supports both ELFv1 and ELFv2 ABIs, their use is currently
hard-coded via the target triple: powerpc64-linux is always ELFv1, while
powerpc64le-linux is always ELFv2.

These are of course the most common scenarios, but in principle it is
possible to support the ELFv2 ABI on big-endian or the ELFv1 ABI on
little-endian systems (and GCC does support that), and there are some
special use cases for that (e.g. certain Linux kernel versions could
only be built using ELFv1 on LE).

This patch implements the Clang side of supporting this, based on the
LLVM commit 214072.  The command line options -mabi=elfv1 or -mabi=elfv2
select the desired ABI if present.  (If not, Clang uses the same default
rules as now.)

Specifically, the patch implements the following changes based on the
presence of the -mabi= option:

In the driver:
- Pass the appropiate -target-abi flag to the back-end
- Select the correct dynamic loader version (/lib64/ld64.so.[12])

In the preprocessor:
- Define _CALL_ELF to the appropriate value (1 or 2)

In the compiler back-end:
- Select the correct ABI in TargetInfo.cpp
- Select the desired ABI for LLVM via feature (elfv1/elfv2)

llvm-svn: 214074
2014-07-28 13:17:52 +00:00
Reid Kleckner 852361d217 MS ABI: Ensure 'this' is first for byval+sret methods
Previously we were building up the inalloca struct in the usual pattern
of return type followed by arguments.  However, on Windows, 'this'
always precedes the 'sret' parameter, so we need to insert it into the
struct first as a special case.

llvm-svn: 213990
2014-07-26 00:12:26 +00:00
Tim Northover 40956e64f2 AArch64: update Clang for merged arm64/aarch64 triples.
The main subtlety here is that the Darwin tools still need to be given "-arch
arm64" rather than "-arch aarch64". Fortunately this already goes via a custom
function to handle weird edge-cases in other architectures, and it tested.

I removed a few arm64_be tests because that really isn't an interesting thing
to worry about. No-one using big-endian is also referring to the target as
arm64 (at least as far as toolchains go). Mostly they date from when arm64 was
a separate target and we *did* need a parallel name simply to test it at all.
Now aarch64_be is sufficient.

llvm-svn: 213744
2014-07-23 12:32:58 +00:00
Ulrich Weigand 601957fa23 [PowerPC] Optimize passing certain aggregates by value
In addition to enabling ELFv2 homogeneous aggregate handling,
LLVM support to pass array types directly also enables a performance
enhancement.  We can now pass (non-homogeneous) aggregates that fit
fully in registers as direct integer arrays, using an element type
to encode the alignment requirement (that would otherwise go to the
"byval align" field).

This is preferable since "byval" forces the back-end to write the
aggregate out to the stack, even if it could be passed fully in
registers.  This is particularly annoying on ELFv2, if there is
no parameter save area available, since we then need to allocate
space on the callee's stack just to hold those aggregates.

Note that to implement this optimization, this patch does not attempt
to fully anticipate register allocation rules as (defined in the
ABI and) implemented in the back-end.  Instead, the patch is simply
passing *any* aggregate passed by value using the array mechanism
if its size is up to 64 bytes.   This means that some of those will
end up being passed in stack slots anyway, but the generated code
shouldn't be any worse either.  (*Large* aggregates remain passed
using "byval" to enable optimized copying via memcpy etc.)

llvm-svn: 213495
2014-07-21 00:56:36 +00:00
Ulrich Weigand b712237da6 [PowerPC] Support the ELFv2 ABI
This patch implements clang support for the PowerPC ELFv2 ABI.
Together with a series of companion patches in LLVM, this makes
clang/LLVM fully usable on powerpc64le-linux.

Most of the ELFv2 ABI changes are fully implemented on the LLVM side.
On the clang side, we only need to implement some changes in how
aggregate types are passed by value.   Specifically, we need to:
- pass (and return) "homogeneous" floating-point or vector aggregates in
  FPRs and VRs (this is similar to the ARM homogeneous aggregate ABI)
- return aggregates of up to 16 bytes in one or two GPRs

The second piece is trivial to implement in any case.  To implement
the first piece, this patch makes use of infrastructure recently
enabled in the LLVM PowerPC back-end to support passing array types
directly, where the array element type encodes properties needed to
handle homogeneous aggregates correctly.

Specifically, the array element type encodes:
- whether the parameter should be passed in FPRs, VRs, or just
  GPRs/stack slots  (for float / vector / integer element types,
  respectively)
- what the alignment requirements of the parameter are when passed in
  GPRs/stack slots  (8 for float / 16 for vector / the element type
  size for integer element types) -- this corresponds to the
  "byval align" field

With this support in place, the clang part simply needs to *detect*
whether an aggregate type implements a float / vector homogeneous
aggregate as defined by the ELFv2 ABI, and if so, pass/return it
as array type using the appropriate float / vector element type.

llvm-svn: 213494
2014-07-21 00:48:09 +00:00
Oliver Stannard e022851f3b [ARM] Fix AAPCS regression caused by r211898
r211898 introduced a regression where a large struct, which would
normally be passed ByVal, was causing padding to be inserted to
prevent the backend from using some GPRs, in order to follow the
AAPCS. However, the type of the argument was not being set correctly,
so the backend cannot align 8-byte aligned struct types on the stack.

The fix is to not insert the padding arguments when the argument is
being passed ByVal.

llvm-svn: 213359
2014-07-18 09:09:31 +00:00
Ulrich Weigand 581badce4b [PowerPC] ABI support for aligned by-value aggregates
This patch adds support for respecting the ABI and type alignment
of aggregates passed by value.  Currently, all aggregates are aligned
at 8 bytes in the parameter save area.  This is incorrect for two
reasons:

- Aggregates that need alignment of 16 bytes or more should be aligned
  at 16 bytes in the parameter save area.  This is implemented by
  using an appropriate "byval align" attribute in the IR.

- Aggregates that need alignment beyond 16 bytes need to be dynamically
  realigned by the caller.  This is implemented by setting the Realign
  flag of the ABIArgInfo::getIndirect call.

In addition, when expanding a va_arg call accessing a type that is
aligned at 16 bytes in the argument save area (either one of the
aggregate types as above, or a vector type which is already aligned
at 16 bytes), code needs to align the va_list pointer accordingly.

Reviewed by Hal Finkel.

llvm-svn: 212743
2014-07-10 17:20:07 +00:00
Ulrich Weigand f4eba98853 [PowerPC] ABI support for non-Altivec vector types
This patch adds support for passing arguments of non-Altivec vector type
(i.e. defined via attribute ((vector_size (...)))) on powerpc64-linux.

While such types are not mentioned in the formal ABI document, this
patch implements a calling convention compatible with GCC:

- Vectors of size < 16 bytes are passed in a GPR
- Vectors of size > 16 bytes are passed via reference

Note that vector types with a number of elements that is not a power
of 2 are not supported by GCC, so there is no pre-existing ABI to
follow.  We choose to pass those (of size < 16) as if widened to the
next power of two, so they might end up in a vector register or
in a GPR.  (Sizes > 16 are always passed via reference as well.)

Reviewed by Hal Finkel.

llvm-svn: 212734
2014-07-10 16:39:01 +00:00
Reid Kleckner 677539d0af MS ABI: Fix __fastcall methods that return structs
The sret paramater consumes the register after the implicit 'this'
parameter, as with other calling conventions.

Fixes PR20278, which turned out to be very easy.

llvm-svn: 212669
2014-07-10 01:58:55 +00:00