Commit Graph

322189 Commits

Author SHA1 Message Date
Roman Lebedev cd9b19484b [Codegen][SelectionDAG] X u% C == 0 fold: non-splat vector improvements
Summary:
Four things here:
1. Generalize the fold to handle non-splat divisors. Reasonably trivial.
2. Unban power-of-two divisors. I don't see any reason why they should
   be illegal.
   * There is no ban in Hacker's Delight
   * I think the ban came from the same bug that caused the miscompile
      in the base patch - in `floor((2^W - 1) / D)` we were dividing by
      `D0` instead of `D`, and we **were** ensuring that `D0` is not `1`,
      which made sense.
3. Unban `1` divisors. I no longer believe Hacker's Delight actually says
   that the fold is invalid for `D = 0`. Further considerations:
   * We know that
     * `(X u% 1) == 0`  can be constant-folded to `1`,
     * `(X u% 1) != 0`  can be constant-folded to `0`,
   *  Also, we know that
     * `X u<= -1` can be constant-folded to `1`,
     * `X u>  -1` can be constant-folded to `0`,
   * https://godbolt.org/z/7jnZJX https://rise4fun.com/Alive/oF6p
   * We know will end up with the following:
       `(setule/setugt (rotr (mul N, P), K), Q)`
   * Therefore, for given new DAG nodes and comparison predicates
     (`ule`/`ugt`), we will still produce the correct answer if:
     `Q` is a all-ones constant; and both `P` and `K` are *anything*
     other than `undef`.
   * The fold will indeed produce `Q = all-ones`.
4. Try to re-splat the `P` and `K` vectors - we don't care about
   their values for the lanes where divisor was `1`.

Reviewers: RKSimon, hermord, craig.topper, spatel, xbolva00

Reviewed By: RKSimon

Subscribers: hiraditya, javed.absar, dexonsmith, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D63963

llvm-svn: 366637
2019-07-20 16:33:15 +00:00
Simon Pilgrim adec0f2252 [X86][SSE] Use PSADBW to improve vXi8 sum reduction (PR42674)
As detailed on PR42674, we can reduce a vXi8 down until we have the final <8 x i8>, and then use PSADBW with zero, to sum those values. We then extract the bottom i8, discarding any overflow from the upper bits of the i16 result.

llvm-svn: 366636
2019-07-20 15:20:11 +00:00
Simon Pilgrim 12b48b1607 Fix cppcheck reduce scope variable warnings. NFCI
Move a couple of variables inside the block where they are actually needed.

llvm-svn: 366635
2019-07-20 13:01:16 +00:00
Serge Guelton 7a3d4c15a7 Revert "Fix asan infinite loop on undefined symbol"
This reverts commit cbd28cd05b.

Buildbot fail: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/22434/steps/64-bit%20check-asan-dynamic/

llvm-svn: 366634
2019-07-20 13:00:12 +00:00
Florian Hahn 0a7faa4e3d [Local] Zap blockaddress without users in ConstantFoldTerminator.
If the blockaddress is not destoryed, the destination block will still
be marked as having its address taken, limiting further transformations.

I think there are other places where the dead blockaddress constants are kept
around, I'll look into that as follow up.

Reviewers: craig.topper, brzycki, davide

Reviewed By: brzycki, davide

Differential Revision: https://reviews.llvm.org/D64936

llvm-svn: 366633
2019-07-20 12:25:47 +00:00
Serge Guelton cbd28cd05b Fix asan infinite loop on undefined symbol
Fix llvm#39641

Recommit of r366413

Differential Revision: https://reviews.llvm.org/D63877

llvm-svn: 366632
2019-07-20 12:01:18 +00:00
Stefan Granitz fc0d766511 [CMake] Align debugserver with lldb-server on Darwin
Summary: Make debugserver a tool like lldb-server, so it can be included/excluded via `LLDB_TOOL_DEBUGSERVER_BUILD`. This replaces the old `LLDB_NO_DEBUGSERVER` flag. Doing the same for darwin-debug while I am here.

Reviewers: xiaobai, JDevlieghere, davide

Reviewed By: xiaobai, JDevlieghere

Subscribers: mgorny, lldb-commits, #lldb

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D64994

llvm-svn: 366631
2019-07-20 11:18:31 +00:00
Richard Smith 6a38205039 [c++20] P1161R3: a[b,c] is deprecated.
llvm-svn: 366630
2019-07-20 09:32:27 +00:00
Aaron Ballman 7017a6d3a3 Mark P1301R4 in C++2a as being SVN instead.
llvm-svn: 366629
2019-07-20 08:57:08 +00:00
Aaron Ballman 1358af27c0 We support P1301R4 in C++2a as of r366626.
llvm-svn: 366628
2019-07-20 08:24:56 +00:00
Richard Smith 1f8aa536f3 [cxx_status] Update status page for WG21 Cologne meeting motions.
Note that many of the paper links will be dead until the post-meeting
mailing is released.

llvm-svn: 366627
2019-07-20 08:20:54 +00:00
Aaron Ballman 3bef014e7d Implement P1301R4, which allows specifying an optional message on the [[nodiscard]] attribute.
This also bumps the attribute feature test value and introduces the notion of a C++2a extension warning.

llvm-svn: 366626
2019-07-20 07:56:34 +00:00
Jessica Paquette 41affad967 [GlobalISel][AArch64] Contract trivial same-size cross-bank copies into G_STOREs
Sometimes, you can end up with cross-bank copies between same-sized GPRs and
FPRs, which feed into G_STOREs. When these copies feed only into stores, they
aren't necessary; we can just store using the original register bank.

This provides some minor code size savings for some floating point SPEC
benchmarks. (Around 0.2% for 453.povray and 450.soplex)

This issue doesn't seem to show up due to regbankselect or anything similar. So,
this patch introduces an early select function, `contractCrossBankCopyIntoStore`
which performs the contraction when possible. The selector then continues
normally and selects the correct store opcode, eliminating needless copies
along the way.

Differential Revision: https://reviews.llvm.org/D65024

llvm-svn: 366625
2019-07-20 01:55:35 +00:00
Guanzhong Chen 5204f7611f [WebAssembly] Compute and export TLS block alignment
Summary:
Add immutable WASM global `__tls_align` which stores the alignment
requirements of the TLS segment.

Add `__builtin_wasm_tls_align()` intrinsic to get this alignment in Clang.

The expected usage has now changed to:

    __wasm_init_tls(memalign(__builtin_wasm_tls_align(),
                             __builtin_wasm_tls_size()));

Reviewers: tlively, aheejin, sbc100, sunfish, alexcrichton

Reviewed By: tlively

Subscribers: dschuff, jgravelle-google, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D65028

llvm-svn: 366624
2019-07-19 23:34:16 +00:00
Teresa Johnson 604f802fd3 [LTO] Always mark regular LTO units with EnableSplitLTOUnit=1
Summary:
Regular LTO modules do not need LTO Unit splitting, only ThinLTO does
(they must be consistently split into regular and Thin units for
optimizations such as whole program devirtualization and lower type
tests). In order to avoid spurious errors from LTO when combining with
split ThinLTO modules, always set this flag for regular LTO modules.

Reviewers: pcc

Subscribers: mehdi_amini, Prazek, inglorion, steven_wu, dexonsmith, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D65009

llvm-svn: 366623
2019-07-19 23:02:58 +00:00
Daniel Sanders 578e8fa833 Re-commit: r366610 and r366612: Expand pseudo-components before embedding in llvm-config
There were two main problems:
* The 'nativecodegen' pseudo-component was unconditionally adding
  ${native_tgt}CodeGen even though it conditionally added ${native_tgt}Info and
  ${native_tgt}Desc. This has been fixed by making ${native_tgt}CodeGen
  conditional too
* The 'all' pseudo-component was causing library names like LLVMLLVMDemangle as
  the expansion was to a library name and not a component. There doesn't seem to
  be a list of available components anywhere so this has been fixed by moving the
  expansion of 'all' back where it was before. This manifested in different ways
  on different builders but it was the same root cause

llvm-svn: 366622
2019-07-19 22:46:47 +00:00
Matt Arsenault f3bfb85bce AMDGPU/GlobalISel: Legalize GEP for other 32-bit address spaces
llvm-svn: 366621
2019-07-19 22:28:44 +00:00
Denis Bakhvalov a29002e59b [NFC] Remove unused variable
Change-Id: I5aee24dcdf6eebfbf788e52be22463387f23d927
llvm-svn: 366620
2019-07-19 21:59:42 +00:00
Stanislav Mekhanoshin 05d9e6a2a3 [AMDGPU] Autogenerate register sequences in tuples
Differential Revision: https://reviews.llvm.org/D65007

llvm-svn: 366619
2019-07-19 21:43:42 +00:00
Matthew Voss 407e837540 Revert "Fix asan infinite loop on undefined symbol"
This reverts commit 8e46275488.

This was failing on sanitizer-x86_64-linux and our internal CI.

llvm-svn: 366618
2019-07-19 21:41:07 +00:00
Sunil Srivastava f4038e75d2 Disallow most calling convention attributes on PS4
PS4 now only allows "cdecl", and its equivalent on PS4, "sysv_abi".

Differential Revision: https://reviews.llvm.org/D64780

llvm-svn: 366617
2019-07-19 21:38:34 +00:00
Stanislav Mekhanoshin 7b5a54e369 [AMDGPU] Fixed occupancy calculation for gfx10
Differential Revision: https://reviews.llvm.org/D65010

llvm-svn: 366616
2019-07-19 21:29:51 +00:00
Daniel Sanders 34da8dfba0 Revert r366610 and r366612: Expand pseudo-components before embedding in llvm-config
Some targets are missing LLVMDemangle, one is adding the LLVM prefix twice, and two
are hitting the very error this patch fixes for my target. Reverting while I work
through the reports.

llvm-svn: 366615
2019-07-19 21:11:05 +00:00
Craig Topper 3a3c58f045 [InstCombine] Fix copy/paste mistake in the test cases I added for PR42691. NFC
llvm-svn: 366614
2019-07-19 21:09:21 +00:00
Matt Arsenault 5e23f42820 AMDGPU: Avoid custom predicates for stores with glue
llvm-svn: 366613
2019-07-19 21:01:30 +00:00
Daniel Sanders 4933c717ec Fix a latent bug discovered by r366610: nativecodegen includes X86CodeGen when X86 is not compiled
I believe this to have been a latent bug as the same expansion checks for the
existence of ${native_tgt}Info and ${native_tgt}Desc and only adds them if
they were compiled but unconditionally adds ${native_tgt}CodeGen.

This should fix llvm-clang-x86_64-win-fast which builds ARM only on an X86 host and similar builders.

llvm-svn: 366612
2019-07-19 20:58:11 +00:00
Craig Topper 18230ecf7e [InstCombine] Add test cases for PR42691. NFC
llvm-svn: 366611
2019-07-19 20:48:52 +00:00
Daniel Sanders e664319e7a Expand pseudo-components before embedding in llvm-config
Summary:
If you use pseudo-targets like AllTargetsCodeGens in LLVM_DYLIB_COMPONENTS
then a test will fail because `./bin/llvm-config --shared-mode` can't
handle these targets. We can fix this by expanding them before embedding
the string into llvm-config

Reviewers: bogner

Reviewed By: bogner

Subscribers: mgorny, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65011

llvm-svn: 366610
2019-07-19 20:38:05 +00:00
Matt Arsenault e3401a9b86 AMDGPU: Redefine setcc condition PatLeafs
Avoid using custom code predicates.

llvm-svn: 366609
2019-07-19 20:24:40 +00:00
Matt Arsenault 48c0df5d46 AMDGPU: Don't rely on m0 being -1 for GWS offsets
This only works if the high bits of m0 are also 0, so m0 would have to
be set to 0xffff.

llvm-svn: 366608
2019-07-19 20:01:24 +00:00
Matt Arsenault 85f3890126 AMDGPU: Force s_waitcnt after GWS instructions
This is apparently required to be the immediately following
instruction, so force it into a bundle with a waitcnt.

llvm-svn: 366607
2019-07-19 19:47:30 +00:00
Louis Dionne 4e8c8aa959 [libc++] Mark libcpp_deallocate.sh.cpp as UNSUPPORTED instead of XFAIL on AppleClang 9
Some minor versions of AppleClang 9 appear not to fail the test. It's
such a mess that the only sane thing to do is to mark the test as
UNSUPPORTED.

llvm-svn: 366606
2019-07-19 19:41:40 +00:00
Matt Arsenault c14334e959 LiveIntervals: Fix handleMove asserting on BUNDLE
The top-level BUNDLE instruction should behave as an ordinary
instruction. It is supposed to have all relevant registers as implicit
operands. Moving it should work as any other instruction. I believe
the assert intended to avoid moving instructions inside bundles.

llvm-svn: 366605
2019-07-19 19:32:00 +00:00
Louis Dionne a3c83b7511 Revert "[libc++] Integrate the PSTL into libc++"
This reverts r366593, which caused unforeseen breakage on the build bots.
I'm reverting until the problems have been figured out and fixed.

llvm-svn: 366603
2019-07-19 18:52:46 +00:00
Michael Liao ff9c9e644d [AMDGPU] Add test case on crashing of `si-lower-sgpr-spills` pass
Reviewers: arsenm

Subscribers: qcolombet, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64273

llvm-svn: 366602
2019-07-19 18:50:53 +00:00
Louis Dionne 3b1ef58128 [libc++] Allow passing additional CMake arguments in macOS trunk CI script
llvm-svn: 366601
2019-07-19 18:47:00 +00:00
Nick Desaulniers 4e9196ebcb Revert "Use the MachineBasicBlock symbol for a callbr target"
This reverts commit r366523/ccbffefccaff42b0d094c9ef0f49fc3e8c8456ea.

Two regressions were immediately reported:
- https://github.com/ClangBuiltLinux/linux/issues/614
- https://github.com/ClangBuiltLinux/linux/issues/615

Reported-by: nathanchance
llvm-svn: 366600
2019-07-19 18:18:02 +00:00
Matt Morehouse 2272be94f2 [RISCV] Disable tests failing on buildbots.
r366399 enabled a couple tests that are failing on a few buildbots.

llvm-svn: 366599
2019-07-19 18:05:12 +00:00
Stanislav Mekhanoshin 01fcf9238f [AMDGPU] Allow register tuples to set asm names
This change reverts most of the previous register name generation.
The real problem is that RegisterTuple does not generate asm names.
Added optional operand to RegisterTuple. This way we can simplify
register name access and dramatically reduce the size of static
tables for the backend.

Differential Revision: https://reviews.llvm.org/D64967

llvm-svn: 366598
2019-07-19 18:05:01 +00:00
Matt Arsenault 7df225dfc2 AMDGPU/GlobalISel: Fix MMO flags for kernel argument loads
The DAG lowering sets dereferencable and invariant, not nontemporal.

llvm-svn: 366597
2019-07-19 17:52:56 +00:00
Matt Arsenault 318a655369 GlobalISel: Add GINodeEquiv for fcopysign
I don't need this at the moment, but it should be here.

llvm-svn: 366596
2019-07-19 17:32:19 +00:00
Shoaib Meenai b50f10875b [llvm-lipo] Remove trailing whitespace. NFC
llvm-svn: 366595
2019-07-19 17:19:57 +00:00
Louis Dionne a5bd48939c [libc++] Use _EnableIf instead of std::enable_if in deduction guides for map and set
llvm-svn: 366594
2019-07-19 17:13:39 +00:00
Louis Dionne 910323e667 [libc++] Integrate the PSTL into libc++
Summary:
This commit allows specifying LIBCXX_ENABLE_PARALLEL_ALGORITHMS when
configuring libc++ in CMake. When that option is enabled, libc++ will
assume that the PSTL can be found somewhere on the CMake module path,
and it will provide the C++17 parallel algorithms based on the PSTL
(that is assumed to be available).

The commit also adds support for running the PSTL tests as part of
the libc++ test suite.

Reviewers: rodgert, EricWF

Subscribers: mgorny, christof, jkorous, dexonsmith, libcxx-commits, mclow.lists, EricWF

Tags: #libc

Differential Revision: https://reviews.llvm.org/D60480

llvm-svn: 366593
2019-07-19 17:02:42 +00:00
Ben Hamilton 86383e6626 [Format/ObjC] Avoid breaking between unary operators and operands
Summary:
Test Plan:
  New tests added. Ran tests with:
  % ninja FormatTests && ./tools/clang/unittests/Format/FormatTests
  Confirmed tests failed before change and passed after change.

Reviewers: krasimir, djasper, sammccall, klimek

Reviewed By: sammccall

Subscribers: klimek, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64775

llvm-svn: 366592
2019-07-19 16:50:24 +00:00
Matt Arsenault 870f49e690 AMDGPU: Add some function return test cases
llvm-svn: 366591
2019-07-19 16:45:48 +00:00
Raphael Isemann b45853f173 [lldb][NFC] Cleanup mentions and code related to lldb-mi
Summary: lldb-mi has been removed, but there are still a bunch of references in the code base. This patch removes all of them.

Reviewers: JDevlieghere, jfb

Reviewed By: JDevlieghere

Subscribers: dexonsmith, ki.stfu, mgorny, abidh, jfb, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D64992

llvm-svn: 366590
2019-07-19 15:55:23 +00:00
Simon Pilgrim 0054230181 [AMDGPU] Regenerate test file for upcoming patch. NFCI.
llvm-svn: 366589
2019-07-19 15:43:56 +00:00
Serge Guelton 8e46275488 Fix asan infinite loop on undefined symbol
Fix llvm#39641

Recommit of r366413

Differential Revision: https://reviews.llvm.org/D63877

llvm-svn: 366588
2019-07-19 15:20:36 +00:00
Mikhail Maltsev f41e627157 [libunwind][ARM] Fix loading FP registers on big-endian targets
Summary:
The function Unwind-EHABI.cpp:_Unwind_VRS_Pop loads the saved values of
64-bit FP registers as two 32-bit words because they might not be
8-byte aligned. Combining these words into a 64-bit value has to be
done differently on big-endian platforms.

Reviewers: ostannard, john.brawn, dmgreen

Reviewed By: ostannard

Subscribers: kristof.beyls, christof, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D64996

llvm-svn: 366587
2019-07-19 15:20:32 +00:00