3e2c6f380c
ARM VLDR/VSTR instructions don't need a size suffix.
...
Canonicallize on the non-suffixed form, but continue to accept assembly that
has any correctly sized type suffix.
llvm-svn: 144583
2011-11-14 23:03:21 +00:00
edf722add3
Add alignment arguments to all the NEON load/store intrinsics.
...
Update all the tests using those intrinsics and add support for
auto-upgrading bitcode files with the old versions of the intrinsics.
llvm-svn: 112271
2010-08-27 17:13:24 +00:00
29dda21e96
Remove arm_apcscc from the test files. It is the default and doing this
...
matches what llvm-gcc and clang now produce.
llvm-svn: 106221
2010-06-17 15:18:27 +00:00
91fdf68516
Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented by
...
copying VFP subregs. This exposed a bunch of dead code in the *spill-q.ll
tests, so I tweaked those tests to keep that code from being optimized away.
Radar 7872877.
llvm-svn: 104415
2010-05-22 00:23:12 +00:00
Jim Grosbach