Commit Graph

290890 Commits

Author SHA1 Message Date
Ilya Biryukov cd16e559d2 [clangd] Attempt the fix the buildbots after r333737
llvm-svn: 333742
2018-06-01 12:03:16 +00:00
Simon Dardis 351aa594f6 [mips] Guard more aliases correctly.
Also, duplicate an alias for microMIPS.

llvm-svn: 333741
2018-06-01 10:57:13 +00:00
Florian Hahn f4df554f32 Recommit r333268: [IPSCCP] Use PredicateInfo to propagate facts from cmp instructions.
This patch updates IPSCCP to use PredicateInfo to propagate
facts to true branches predicated by EQ and to false branches
predicated by NE.

As a follow up, we should be able to extend it to also propagate additional
facts about nonnull.

Reviewers: davide, mssimpso, dberlin, efriedma

Reviewed By: davide, dberlin

Differential Revision: https://reviews.llvm.org/D45330

llvm-svn: 333740
2018-06-01 10:48:54 +00:00
Simon Dardis 54217598b6 [mips] Guard 'nop' properly and add mips16's nop instruction
Reviewers: smaksimovic, atanasyan, abeserminji

Differential Revision: https://reviews.llvm.org/D47583

llvm-svn: 333739
2018-06-01 10:46:00 +00:00
Pavel Labath d6ca063907 DWARFAcceleratorTable: Add an iterator-based api for accessing names in the index
Summary:
Back when we were introducing the DWARF v5 name index, there was a
short discussion whether we shouldn't have a nicer api for iterating
over the index. At that time, I did not find it necessary since the
iteration over names was done only from within the index itself (and I
figured the internal implementation can deal with a slightly rough
interface).

However, now I ran into a use for this kind of API in LLDB (for finding
all names matching a regular expression), so it looked like a nice
opportunity to introduce one. To make the API more useful, I've made the
NameTableEntry class a bit smarter: it now stores the string section
reference (so it can return its name) and its position in the name index
(mainly useful for dumping/logging).

I also convert the internal users to use the new API, which also gives
test coverage for the added code.

Reviewers: JDevlieghere, aprantl, dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47590

llvm-svn: 333738
2018-06-01 10:33:11 +00:00
Ilya Biryukov 823b056f58 [clangd] Keep only a limited number of idle ASTs in memory
Summary:
After this commit, clangd will only keep the last 3 accessed ASTs in
memory. Preambles for each of the opened files are still kept in
memory to make completion and AST rebuilds fast.

AST rebuilds are usually fast enough, but having the last ASTs in
memory still considerably improves latency of operations like
findDefinition and documeneHighlight, which are often sent multiple
times a second when moving around the code. So keeping some of the last
accessed ASTs in memory seems like a reasonable tradeoff.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: malaperle, arphaman, klimek, javed.absar, ioeric, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D47063

llvm-svn: 333737
2018-06-01 10:08:43 +00:00
Simon Dardis ee67dcb837 [mips] Select the correct instruction for computing frameindexes
Reviewers: smaksimovic, atanasyan, abeserminji

Differential Revision: https://reviews.llvm.org/D47582

llvm-svn: 333736
2018-06-01 10:07:10 +00:00
Ilya Biryukov 82ebdd7929 [CodeComplete] Add a few extra tests for r333538. NFC
From a follow-up discussion in D44480.
New tests check that function bodies are not skipped:
- In presence of ptr declarators, e.g. `auto**`.
- When `decltype(auto)` is used in return type, only `auto` was checked before.

llvm-svn: 333735
2018-06-01 09:49:53 +00:00
Martin Storsjo cad7a5f1aa [X86] Remove leftover semicolons at end of macros
This was missed in a few places in SVN r333613, causing compilation
errors if these macros are used e.g. as parameter to a function.

llvm-svn: 333734
2018-06-01 09:40:50 +00:00
David Carlier 45cdbdac06 [XRay] Fix supposely failing test for FreeBSD
One test was marked as XFAIL for FreeBSD however still running when launching make check-xray

Reviewers: krytarowski, vitalybuka

Reviewed By: dberris

Differential Revision: https://reviews.llvm.org/D47622

llvm-svn: 333733
2018-06-01 09:15:44 +00:00
Gabor Buella 27c96d3d20 NFC Avoid a warning in WasmEHPrepare.cpp
```
../lib/CodeGen/WasmEHPrepare.cpp:166:30: warning: extra ‘;’ [-Wpedantic]
                 false, false);
                              ^
```

llvm-svn: 333732
2018-06-01 07:47:46 +00:00
Sander de Smalen 97ca6b9e09 [AArch64][SVE] Asm: Support for DUPM (masked immediate) instruction.
Unpredicated copy of repeating immediate pattern to SVE vector, along
with MOV-aliases.

Reviewers: rengolin, fhahn, samparker, SjoerdMeijer, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D47328

llvm-svn: 333731
2018-06-01 07:25:46 +00:00
Matt Arsenault 72a9f52c87 AMDGPU: Switch some half using-tests to use amdhsa
The default clover ABI weirdly promotes half to float,
which should probably be fixed.

llvm-svn: 333730
2018-06-01 07:06:03 +00:00
Yvan Roux 3b480d1858 [ASAN] Sanitize testsuite for ARM.
Address failures exhibited by ARMv8 bot in Thumb mode:

- Fix logic for fast unwinding support (i.e feature is not available for Thumb)
- Fix Unsupported and Requires rules to handle armv8 as well as soft and hard
  float targets
- Un-xfail passing tests

Differential Revision: https://reviews.llvm.org/D47575

llvm-svn: 333729
2018-06-01 06:23:36 +00:00
Craig Topper c3cf55b935 [X86][Disassembler] Make it an error to set EVEX.R' to 0 when modrm.reg encodes a GPR.
This is different than the behavior of EVEX.X extending modrm.rm to 5 bits.

llvm-svn: 333728
2018-06-01 06:11:29 +00:00
Craig Topper 0838c4d6bc [X86][Disassembler] Ignore EVEX.X extension of modrm.rm to 5-bits when modrm.rm encodes a k-register.
llvm-svn: 333727
2018-06-01 05:36:08 +00:00
Daniel Cederman d72b9fd141 Implemented sane default for llvm-objdump's relocation Value format
Summary:
"Unknown" for platforms that were not manually added into the switch
did not make sense at all. Now it prints Target + addend for all
elf-machines that were not explicitly mentioned.

Addresses PR21059 and PR25124.

Original author: fedor.sergeev

Reviewers: jyknight, espindola, fedor.sergeev

Reviewed By: jyknight

Subscribers: eraman, dcederman, jfb, dschuff, aheejin, llvm-commits

Differential Revision: https://reviews.llvm.org/D36464

llvm-svn: 333726
2018-06-01 05:31:58 +00:00
Craig Topper 74a61b02e0 [X86][Disassembler] Clamp index to 4-bits when decoding GPR registers.
A 5-bit value can occur when EVEX.X is 0 due to it being used to extend modrm.rm to encode XMM16-31. But if modrm.rm instead encodes a GPR, the Intel documentation says EVEX.X should be ignored so just mask it to 4 bits once we know its a GPR.

llvm-svn: 333725
2018-06-01 05:12:44 +00:00
Craig Topper 1a00b0ac27 [X86] Add a test case showing a bad disassembling of an EVEX instruction with EVEX.X=0 and a GPR encoded in modrm.rm.
EVEX.X is used to extended modrm.rm when the instruction encodes a XMM/YMM/ZMM register. But we aren't properly ignoring it when it encodes a GPR and we end up printing whatever registers exist in X86 register enum after the GPRs.

llvm-svn: 333724
2018-06-01 05:12:43 +00:00
JF Bastien 766128e697 Filesystem tests: un-confuse write time
Summary:
The filesystem test was confused about access versus write / modification time. The spec says:

  file_time_type last_write_time(const path& p, error_code& ec) noexcept;
  Returns: The time of last data modification of p, determined as if by the value of the POSIX stat structure member st_mtime obtained as if by POSIX stat(). The signature with argument ec returns file_time_type::min() if an error occurs.

The test was looking at st_atime, not st_mtime, when comparing the result from last_write_time. That was probably due to using a pair instead of naming things nicely or using types. I opted to rename things so it's clearer.

This used to cause test bot failures.

<rdar://problem/40648859>

Reviewers: EricWF, mclow.lists, aemerson

Subscribers: christof, cfe-commits

Differential Revision: https://reviews.llvm.org/D47557

llvm-svn: 333723
2018-06-01 04:59:48 +00:00
Craig Topper 5b1dd01e57 [X86][Disassembler] Make sure EVEX.X is not used to extend base registers of memory operations.
This was an accidental side effect of EVEX.X being used to encode XMM16-XMM31 using modrm.rm with modrm.mod==0x3.

I think there are still more bugs related to this.

llvm-svn: 333722
2018-06-01 04:29:34 +00:00
Craig Topper c6b2c2bb70 [X86][Disassembler] Use a local variable instead of using a field in the instruction object. NFC
llvm-svn: 333721
2018-06-01 04:29:30 +00:00
Tom Stellard e43778895c AMDGPU/R600: Move intrinsics to IntrinsicsAMDGPU.td
Reviewers: arsenm, nhaehnle, jvesely

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D47487

llvm-svn: 333720
2018-06-01 02:19:46 +00:00
Artem Dergachev f83d547989 [analyzer] NFC: Track all constructed objects in a single state trait.
ExprEngine already maintains three internal program state traits to track
path-sensitive information related to object construction: pointer returned by
operator new, and pointer to temporary object for two different purposes - for
destruction and for lifetime extension. We'll need to add 2-3 more in a few
follow-up commits.

Merge these traits into one because they all essentially serve one purpose and
work similarly.

Differential Revision: https://reviews.llvm.org/D47303

llvm-svn: 333719
2018-06-01 01:59:48 +00:00
Bruno Cardoso Lopes 9f6020bcc5 [Modules] Warning for module declarations lacking 'framework' qualifier
When a module declaration for a framework lacks the 'framework'
qualifier, the listed headers aren't found (because there's no
trigger for the special framework style path lookup) and the module
is silently not built. This leads to frameworks not being modularized
by accident, which is pretty bad.

Add a warning and suggest the user to add the 'framework' qualifier
when we can prove that it's the case.

rdar://problem/39193062

llvm-svn: 333718
2018-06-01 01:26:18 +00:00
Craig Topper dc5ba1e495 [X86] Make sure the check for VEX.vvvv being all ones on instructions that don't use it doesn't ignore a bit in 32-bit mode.
llvm-svn: 333717
2018-06-01 01:23:52 +00:00
Heejin Ahn 1eb074d76e [WebAssembly] Hide new Wasm EH behind its feature flag
Summary:
clang's current wasm EH implementation is a non-MVP feature in progress.
We had a `-mexception-handling` wasm feature but were not using it. This
patch hides the non-MVP wasm EH behind a flag, so it does not affect
other code for now.

Reviewers: dschuff

Subscribers: sbc100, jgravelle-google, sunfish, cfe-commits

Differential Revision: https://reviews.llvm.org/D47614

llvm-svn: 333716
2018-06-01 01:01:37 +00:00
Vedant Kumar d781d97ed4 [Coverage] End deferred regions before labels, fixes PR35867
A deferred region should end before the start of a label, and should not
extend to the start of the label sub-statement.

Fixes llvm.org/PR35867.

llvm-svn: 333715
2018-06-01 00:37:13 +00:00
Craig Topper 0179c6d0e5 [X86][Disassembler] Suppress reading of EVEX.V' and EVEX.R' in 32-bit mode.
llvm-svn: 333714
2018-06-01 00:10:36 +00:00
Craig Topper b9c2e8cc01 [X86] Add test cases showing the disassembler producing an xmm16-xmm31 register in 32-bit mode.
We aren't properly suppressing the reading of VEX.R' and VEX.V' in 32-bit mode.

llvm-svn: 333713
2018-06-01 00:10:32 +00:00
Dan Gohman 9f8ee03772 [WebAssembly] Update to the new names for the memory builtin functions.
The WebAssembly committee has decided on the names `memory.size` and
`memory.grow` for the memory intrinsics, so update the clang builtin
functions to follow those names, keeping both sets of old names in place
for compatibility.

llvm-svn: 333712
2018-06-01 00:05:51 +00:00
Heejin Ahn d69acf3b4c Change ambiguous uses of term 'funclet' to 'EH scopes'. NFC.
Summary:
`getEHScopeMembership()` function is used not only for funclet-based
EHs; they apply to all EH schemes that use the scoped IR
(catchpad/cleanuppad/...). D47005 (rL333045) changed some of the uses of
the term 'funclet' to 'EH scopes' in case they apply to all scoped EH,
and this fixes more of them. For `FuncletLayout` pass, I left it as is
because the pass is only used for funclet-based EH.

Reviewers: majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D47611

llvm-svn: 333711
2018-06-01 00:03:21 +00:00
Michael Kruse d51fbfca46 [ZoneAlgo] Make ZoneAlgorithm::isNormalized out-of-quota safe.
The aosp-O3-polly-before-vectorizer-unprofitable buildbot currently
fails in ZoneAlgorithm::isNormalized, presumably because an
out-of-quota happens in that function.

Modify ZoneAlgorithm::isNormalized to return an isl::boolean such
it can report an error.

In the failing case, it was called in an assertion in ForwardOpTree.
Allow to pass the assertion in an out-of-quota event, a condition that
is later checked before forwarding an operand tree.

llvm-svn: 333709
2018-05-31 22:44:23 +00:00
Dan Gohman 91ab25bbe3 [WebAssembly] Update to the new names for the memory intrinsics.
The WebAssembly committee has decided on the names `memory.size` and
`memory.grow` for the memory intrinsics, so update the LLVM intrinsics to
follow those names, keeping both sets of old names in place for
compatibility.

llvm-svn: 333708
2018-05-31 22:35:25 +00:00
Sanjay Patel affe450db7 [LoopVectorize, x86] add tests to show missing SVML transforms; NFC
llvm-svn: 333707
2018-05-31 22:31:02 +00:00
Dan Gohman b17de645ea [WebAssembly] Fix the signatures for the __mulo* libcalls.
The __mulo* libcalls have an extra i32* to return the overflow value.

Fixes PR37401.

llvm-svn: 333706
2018-05-31 22:27:24 +00:00
Heejin Ahn 5ef4d5f9c1 [WebAssembly] Support instruction selection for catching exceptions
Summary:
This lowers exception catching-related instructions:
1. Lowers `wasm.catch` intrinsic to `catch` instruction
2. Removes `catchpad` and `cleanuppad` instructions; they are not
necessary after isel phase. (`MachineBasicBlock::isEHFuncletEntry()` or
`MachineBasicBlock::isEHPad()` can be used instead.)
3. Lowers `catchret` and `cleanupret` instructions to pseudo `catchret`
and `cleanupret` instructions in isel, which will be replaced with other
instructions in `WebAssemblyExceptionPrepare` pass.
4. Adds 'WebAssemblyExceptionPrepare` pass, which is for running various
transformation for EH. Currently this pass only replaces `catchret` and
`cleanupret` instructions into appropriate wasm instructions to make
this patch successfully run until the end.

Currently this does not handle lowering of intrinsics related to LSDA
info generation (`wasm.landingpad.index` and `wasm.lsda`), because they
cannot be tested without implementing `EHStreamer`'s wasm-specific
handlers. They are marked as TODO, which is needed to make isel pass.
Also this does not generate `try` and `end_try` markers yet, which will
be handled in later patches.

This patch is based on the first wasm EH proposal.
(https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md)

Reviewers: dschuff, majnemer

Subscribers: jfb, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D44090

llvm-svn: 333705
2018-05-31 22:25:54 +00:00
Dominic Chen cd81614e8b [analyzer] fix bug with 1-bit APSInt types in Z3ConstraintManager
Summary: Clang does not have a corresponding QualType for a 1-bit APSInt, so use the BoolTy and extend the APSInt. Split from D35450. Fixes PR37622.

Reviewers: george.karpenkov, NoQ

Subscribers: mikhail.ramalho, xazax.hun, szepet, rnkovacs, cfe-commits, a.sidorin

Differential Revision: https://reviews.llvm.org/D47603

llvm-svn: 333704
2018-05-31 22:23:07 +00:00
Heejin Ahn c647919933 [WebAssembly] Use Windows EH instructions for Wasm EH
Summary:
Because wasm control flow needs to be structured, using WinEH
instructions to support wasm EH brings several benefits. This patch
makes wasm EH uses Windows EH instructions, with some changes:
1. Because wasm uses a single catch block to catch all C++ exceptions,
   this merges all catch clauses into a single catchpad, within which we
   test the EH selector as in Itanium EH.
2. Generates a call to `__clang_call_terminate` in case a cleanup
   throws. Wasm does not have a runtime to handle this.
3. In case there is no catch-all clause, inserts a call to
   `__cxa_rethrow` at the end of a catchpad in order to unwind to an
   enclosing EH scope.

Reviewers: majnemer, dschuff

Subscribers: jfb, sbc100, jgravelle-google, sunfish, cfe-commits

Differential Revision: https://reviews.llvm.org/D44931

llvm-svn: 333703
2018-05-31 22:18:13 +00:00
Craig Topper 9a6c0bdcbd [LoopIdiomRecognize] Only convert loops to ctlz if we can prove that the input is non-negative.
Summary:
Loop idiom recognize tries to convert loops like

```
int foo(int x) {
  int cnt = 0;
  while (x) {
    x >>= 1;
    ++cnt;
  }
  return cnt;
}
```

into calls to ctlz, but if x is initially negative this loop should be infinite.

It happens that the cases that motivated this change have an absolute value of x before the loop. So this patch restricts the transform to cases where we know x is positive. Note: We are relying on the absolute value of INT_MIN to be undefined so we can assume that the result is always positive.

Fixes PR37479

Reviewers: spatel, hfinkel, efriedma, javed.absar

Reviewed By: efriedma

Subscribers: dmgreen, llvm-commits

Differential Revision: https://reviews.llvm.org/D47348

llvm-svn: 333702
2018-05-31 22:16:55 +00:00
Vedant Kumar 38671237a6 [lit] Remove the *.test suffix from two test inputs
This prevents the test inputs from being marked as unsupported tests,
due to their lack of RUN lines.

llvm-svn: 333701
2018-05-31 22:09:01 +00:00
Vedant Kumar cc5a6163a4 [IRMemoryMap] Test interleaved Mallocs and Frees
This adds a new command to the ir-memory-map tester:

  free <allocation-index>

The argument to free is an index which identifies which live allocation
to free. Index 0 identifies the first live allocation in the address
space, index 1 identifies the second, etc. where the allocations are
sorted in increasing order.

For illustrative purposes, assume malloc returns monotonically
increasing addresses. Here are some examples of how free would work:

Example 1
---------

malloc 16 1
malloc 32 1
free 1      //< Free the 32-byte allocation.
free 0      //< Next, free the 16-byte allocation.

Example 2
---------

malloc 16 1
malloc 32 1
free 0      //< Free the 16-byte allocation.
free 0      //< Next, free the 32-byte allocation.

llvm-svn: 333700
2018-05-31 22:09:01 +00:00
Vedant Kumar 7e4c84a78c [lldb-test] Make logging available to all subcommands
llvm-svn: 333699
2018-05-31 22:09:00 +00:00
Vedant Kumar f616b9db7d [IRMemoryMap] Test host-side allocations
r333583 introduced testing for IRMemoryMap's process-side allocations
(eAllocationPolicyProcessOnly). This adds support for the host-side
variety (eAllocationPolicyHostOnly).

llvm-svn: 333698
2018-05-31 22:09:00 +00:00
Vedant Kumar 5b71e75ed3 [IRMemoryMap] Fix the alignment adjustment in Malloc
This prevents Malloc from allocating the same chunk of memory twice, as
a byproduct of an alignment adjustment which gave the client access to
unallocated memory.

Prior to this patch, the newly-added test failed with:

$ lldb-test ir-memory-map ... ir-memory-map-overlap1.test
...
Command: malloc(size=64, alignment=32)
Malloc: address = 0x1000cd080
Command: malloc(size=64, alignment=8)
Malloc: address = 0x1000cd0b0
Malloc error: overlapping allocation detected, previous allocation at [0x1000cd080, 0x1000cd0c0)

Differential Revision: https://reviews.llvm.org/D47551

llvm-svn: 333697
2018-05-31 22:08:59 +00:00
Heejin Ahn 99d60e0dab [WebAssembly] Add Wasm exception handling prepare pass
Summary:
This adds a pass that transforms a program to be prepared for Wasm
exception handling. This is using Windows EH instructions and based on
the previous Wasm EH proposal.
(https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md)

Reviewers: dschuff, majnemer

Subscribers: jfb, mgorny, sbc100, jgravelle-google, JDevlieghere, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D43746

llvm-svn: 333696
2018-05-31 22:02:34 +00:00
Sanjay Patel 2ae1ab30e3 [LoopVectorize, x86] regenerate checks; NFC
I removed the 'fast' flag from the calls because that's not required.

llvm-svn: 333695
2018-05-31 21:30:36 +00:00
Rui Ueyama a3e5d4982e Print out "Alias for -foo" instead of repeating the same help message for -foo.
Since aliases don't actually need name, I removed it from Options.td
to keep the definitions concise.

Before:

  -(                      Ignored for compatibility with GNU unless you pass --warn-backrefs
  -)                      Ignored for compatibility with GNU unless you pass --warn-backrefs
  --allow-multiple-definition Allow multiple definitions
  --apply-dynamic-relocs  Apply dynamic relocations to place
  --as-needed             Only set DT_NEEDED for shared libraries if used
  --auxiliary=<value>     Set DT_AUXILIARY field to the specified name
  --Bdynamic              Link against shared libraries
  --Bshareable            Build a shared object
  ...

After:

  -(                      Alias for --start-group
  -)                      Alias for --end-group
  --allow-multiple-definition Allow multiple definitions
  --apply-dynamic-relocs  Apply dynamic relocations to place
  --as-needed             Only set DT_NEEDED for shared libraries if used
  --auxiliary=<value>     Set DT_AUXILIARY field to the specified name
  --Bdynamic              Link against shared libraries (default)
  --Bshareable            Alias for --shared
  ...

Differential Revision: https://reviews.llvm.org/D47588

llvm-svn: 333694
2018-05-31 20:46:22 +00:00
Alexander Shaposhnikov ecc84834b7 [llvm-strip] Add -o option to llvm-strip
This diff implements the option -o 
for specifying a file to write the output to.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D47505

llvm-svn: 333693
2018-05-31 20:42:13 +00:00
Andrea Di Biagio 4037011404 [llvm-mca] Fixed a problem caused by an invalid use of a processor resource mask in the Scheduler.
The lambda functions used by method ResourceManager::mustIssueImmediately() was
incorrectly truncating masks of buffered processor resources to 32-bit quantities.
The invalid mask values were then used to access a map of processor
resource descriptors.

Fixes PR37643.

llvm-svn: 333692
2018-05-31 20:27:46 +00:00