cc8a564cb1
Emit code that matches the incoming DAG pattern and checks predicates.
...
This does not check that types match yet, but PPC only has one integer type
;-).
This also doesn't have the code to build the resultant dag.
llvm-svn: 23414
2005-09-23 21:33:23 +00:00
323a47970e
emit information about the order patterns are to be matched.
...
llvm-svn: 23413
2005-09-23 20:52:47 +00:00
abb430bad2
start filling in the switch stmt
...
llvm-svn: 23412
2005-09-23 19:36:15 +00:00
499e33646e
remove some debugging code
...
llvm-svn: 23411
2005-09-23 18:49:09 +00:00
c59a371d45
Fold two consequtive branches that share a common destination between them.
...
This implements SimplifyCFG/branch-fold.ll, and is useful on ?:/min/max heavy
code
llvm-svn: 23410
2005-09-23 18:47:20 +00:00
62f565d198
new testcase
...
llvm-svn: 23409
2005-09-23 18:43:57 +00:00
3a978bf66d
simplify some logic further
...
llvm-svn: 23408
2005-09-23 07:23:18 +00:00
cc14ebc17b
pull a bunch of logic out of SimplifyCFG into a helper fn
...
llvm-svn: 23407
2005-09-23 06:39:30 +00:00
1e3d3148bb
speed up Archive::isBytecodeArchive in the case when the archive doesn't have
...
an llvm-ranlib symtab. This speeds up gccld -native on an almost empty .o file
from 1.63s to 0.18s.
llvm-svn: 23406
2005-09-23 06:22:58 +00:00
f20941116b
Speed up isBytecodeLPath from 20s to .01s in common cases. This makes -native
...
not completely painful to use. Once we decide a directory has a bytecode
library, we know it this function returns true, no need to scan entire directories.
llvm-svn: 23405
2005-09-23 06:11:24 +00:00
9b9b510084
1. Do not use .c_str() to keep a persistent handle on a temporary string.
...
2. Concatenate -lfoo and -L/bar options into a single option instead of
passing "-L /bar" (for example) which doesn't work on Darwin.
3. Send -v output to stderr instead of stdout
llvm-svn: 23404
2005-09-23 06:05:46 +00:00
59a05bdde6
Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0 (and move a function)
...
This happens all the time on PPC for bool values, e.g. eliminating a xori
in inverted-bool-compares.ll.
This should be added to the dag combiner as well.
llvm-svn: 23403
2005-09-23 00:55:52 +00:00
c619d43155
new testcase
...
llvm-svn: 23402
2005-09-23 00:53:06 +00:00
5ff606401b
Testcase for PR629
...
llvm-svn: 23401
2005-09-21 06:53:56 +00:00
b1f8982ff0
Expose the LiveInterval interfaces as public headers.
...
llvm-svn: 23400
2005-09-21 04:19:09 +00:00
993a2ec38c
Recommend what I actually test
...
llvm-svn: 23398
2005-09-21 03:56:26 +00:00
6c70106053
Start threading across blocks with code in them, so long as the code does
...
not define a value that is used outside of it's block. This catches many
more simplifications, e.g. 854 in 176.gcc, 137 in vpr, etc.
This implements branch-phi-thread.ll:test3.ll
llvm-svn: 23397
2005-09-20 01:48:40 +00:00
cb6d8173d2
make this test harder: add a case where instructions are in the bb to be
...
threaded over
llvm-svn: 23396
2005-09-20 01:43:41 +00:00
f0bd8d0107
Implement merging of blocks with the same condition if the block has multiple
...
predecessors. This implements branch-phi-thread.ll::test1
llvm-svn: 23395
2005-09-20 00:43:16 +00:00
168d2e5343
new testcase
...
llvm-svn: 23394
2005-09-20 00:41:55 +00:00
049cb4482f
Reject a case we don't handle yet
...
llvm-svn: 23393
2005-09-19 23:57:04 +00:00
a160924d57
remove debugging code :-/
...
llvm-svn: 23392
2005-09-19 23:50:15 +00:00
748f903046
Implement SimplifyCFG/branch-phi-thread.ll, the most trivial case of threading
...
control across branches with determined outcomes. More generality to follow.
This triggers a couple thousand times in specint.
llvm-svn: 23391
2005-09-19 23:49:37 +00:00
b2a9e8115b
new testcase.
...
llvm-svn: 23390
2005-09-19 23:48:04 +00:00
c760f80fed
Stub out the rest of the DAG Combiner. Just need to fill in the
...
select_cc bits and then wrap it in a convenience function for use with
regular select.
llvm-svn: 23389
2005-09-19 22:34:01 +00:00
2f838f2192
Teach the local spiller to turn stack slot loads into register-register copies
...
when possible, avoiding the load (and avoiding the copy if the value is already
in the right register).
This patch came about when I noticed code like the following being generated:
store R17 -> [SS1]
...blah...
R4 = load [SS1]
This was causing an LSU reject on the G5. This problem was due to the register
allocator folding spill code into a reg-reg copy (producing the load), which
prevented the spiller from being able to rewrite the load into a copy, despite
the fact that the value was already available in a register. In the case
above, we now rip out the R4 load and replace it with a R4 = R17 copy.
This speeds up several programs on X86 (which spills a lot :) ), e.g.
smg2k from 22.39->20.60s, povray from 12.93->12.66s, 168.wupwise from
68.54->53.83s (!), 197.parser from 7.33->6.62s (!), etc. This may have a larger
impact in some cases on the G5 (by avoiding LSU rejects), though it probably
won't trigger as often (less spilling in general).
Targets that implement folding of loads/stores into copies should implement
the isLoadFromStackSlot hook to get this.
llvm-svn: 23388
2005-09-19 06:56:21 +00:00
de3c87a2ab
Implement the isLoadFromStackSlot interface
...
llvm-svn: 23387
2005-09-19 05:23:44 +00:00
b4b2530a1a
Refactor this code a bit and make it more general. This now compiles:
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus2 (unsigned int x) { b.j += x; }
To:
_plus2:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
slwi r3, r3, 6
add r3, r4, r3
rlwimi r3, r4, 0, 26, 14
stw r3, 0(r2)
blr
instead of:
_plus2:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
rlwinm r5, r4, 26, 21, 31
add r3, r5, r3
rlwimi r4, r3, 6, 15, 25
stw r4, 0(r2)
blr
by eliminating an 'and'.
I'm pretty sure this is as small as we can go :)
llvm-svn: 23386
2005-09-18 07:22:02 +00:00
797dee7705
Compile
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus2 (unsigned int x) {
b.j += x;
}
to:
plus2:
mov %EAX, DWORD PTR [b]
mov %ECX, %EAX
and %ECX, 131008
mov %EDX, DWORD PTR [%ESP + 4]
shl %EDX, 6
add %EDX, %ECX
and %EDX, 131008
and %EAX, -131009
or %EDX, %EAX
mov DWORD PTR [b], %EDX
ret
instead of:
plus2:
mov %EAX, DWORD PTR [b]
mov %ECX, %EAX
shr %ECX, 6
and %ECX, 2047
add %ECX, DWORD PTR [%ESP + 4]
shl %ECX, 6
and %ECX, 131008
and %EAX, -131009
or %ECX, %EAX
mov DWORD PTR [b], %ECX
ret
llvm-svn: 23385
2005-09-18 06:30:59 +00:00
01f56c68e9
Generalize this transform, using MaskedValueIsZero, allowing us to compile:
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus3 (unsigned int x) { b.k += x; }
To:
plus3:
mov %EAX, DWORD PTR [%ESP + 4]
shl %EAX, 17
add DWORD PTR [b], %EAX
ret
instead of:
plus3:
mov %EAX, DWORD PTR [%ESP + 4]
shl %EAX, 17
mov %ECX, DWORD PTR [b]
add %EAX, %ECX
and %EAX, -131072
and %ECX, 131071
or %ECX, %EAX
mov DWORD PTR [b], %ECX
ret
llvm-svn: 23384
2005-09-18 06:02:59 +00:00
4ebc8ab4e0
fix typeo
...
llvm-svn: 23383
2005-09-18 05:25:20 +00:00
e5b23a6d67
Remove unintentionally committed code
...
llvm-svn: 23382
2005-09-18 05:12:51 +00:00
27cb9dbd35
implement shift.ll:test25. This compiles:
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus3 (unsigned int x) {
b.k += x;
}
to:
_plus3:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r3, 0(r2)
rlwinm r4, r3, 0, 0, 14
add r4, r4, r3
rlwimi r4, r3, 0, 15, 31
stw r4, 0(r2)
blr
instead of:
_plus3:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
srwi r5, r4, 17
add r3, r5, r3
slwi r3, r3, 17
rlwimi r3, r4, 0, 15, 31
stw r3, 0(r2)
blr
llvm-svn: 23381
2005-09-18 05:12:10 +00:00
1813aabcf2
new testcase
...
llvm-svn: 23380
2005-09-18 05:10:39 +00:00
af517574ce
Implement add.ll:test29. Codegening:
...
struct S { unsigned int i : 6, j : 11, k : 15; } b;
void plus1 (unsigned int x) {
b.i += x;
}
as:
_plus1:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
add r3, r4, r3
rlwimi r3, r4, 0, 0, 25
stw r3, 0(r2)
blr
instead of:
_plus1:
lis r2, ha16(L_b$non_lazy_ptr)
lwz r2, lo16(L_b$non_lazy_ptr)(r2)
lwz r4, 0(r2)
rlwinm r5, r4, 0, 26, 31
add r3, r5, r3
rlwimi r3, r4, 0, 0, 25
stw r3, 0(r2)
blr
llvm-svn: 23379
2005-09-18 04:24:45 +00:00
9136c832c4
new testcase
...
llvm-svn: 23378
2005-09-18 04:22:59 +00:00
027eaf01cf
remove debug output
...
llvm-svn: 23377
2005-09-18 03:50:25 +00:00
1521298993
Implement or.ll:test21. This teaches instcombine to be able to turn this:
...
struct {
unsigned int bit0:1;
unsigned int ubyte:31;
} sdata;
void foo() {
sdata.ubyte++;
}
into this:
foo:
add DWORD PTR [sdata], 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [sdata]
mov %ECX, %EAX
add %ECX, 2
and %ECX, -2
and %EAX, 1
or %EAX, %ECX
mov DWORD PTR [sdata], %EAX
ret
llvm-svn: 23376
2005-09-18 03:42:07 +00:00
c6d63a9832
new testcase
...
llvm-svn: 23375
2005-09-18 03:39:02 +00:00
4d9cf68023
Implement hook for ppc
...
llvm-svn: 23374
2005-09-17 01:03:26 +00:00
6db5887db5
add a new callback
...
llvm-svn: 23373
2005-09-17 01:02:45 +00:00
24a7eca282
More DAG combining. Still need the branch instructions, and select_cc
...
llvm-svn: 23371
2005-09-16 00:54:12 +00:00
7884fffb00
Fix a minor bug, add comments
...
llvm-svn: 23370
2005-09-16 00:29:46 +00:00
59e96143a2
teach the type inference code how to infer types for instructions and node
...
xforms. Run type inference on result patterns, so we always have fully typed
results (and to catch errors in .td files).
llvm-svn: 23369
2005-09-15 22:23:50 +00:00
fedd9a5e1d
put instructions into a map instead of a vector for quick lookup
...
llvm-svn: 23368
2005-09-15 21:57:35 +00:00
f38ce8f756
when parsing instructions remember information about the types taken and
...
returned.
llvm-svn: 23367
2005-09-15 21:51:12 +00:00
0ebec06671
disable this for now
...
llvm-svn: 23366
2005-09-15 21:44:00 +00:00
a0a986c9ae
Start parsing "Pattern" nodes
...
llvm-svn: 23365
2005-09-15 21:42:00 +00:00
f79ad4cb32
rename a couple of methods, add structure for pattern parsing
...
llvm-svn: 23364
2005-09-15 02:38:02 +00:00
a155256a71
Verify that xform functions only occur in logical places
...
llvm-svn: 23363
2005-09-14 23:05:13 +00:00
Chris Lattner