Commit Graph

266599 Commits

Author SHA1 Message Date
Krzysztof Parzyszek 40df124eda [Hexagon] Remove unused ISD opcodes, NFC
llvm-svn: 307580
2017-07-10 20:13:44 +00:00
Tobias Grosser 153a508349 [IslAst] Print memory accesses in AST dump
When providing the option "-polly-ast-print-accesses" Polly also prints the
memory accesses that are generated:

    #pragma known-parallel
    for (int c0 = 0; c0 <= 1023; c0 += 4)
      #pragma simd
      for (int c1 = c0; c1 <= c0 + 3; c1 += 1)
        Stmt_for_body(
          /* read  */ &MemRef_B[0]
          /* write */  MemRef_A[c1]
        );

This makes writing and debugging memory layout transformations easier.

Based on a patch contributed by Thomas Lang (ETH Zurich)

llvm-svn: 307579
2017-07-10 20:13:06 +00:00
Dehao Chen 5d96ee4fab Use DenseMap instead std::map for GVSummaryMapTy.
Summary: This speeds-up thin-link by ~47% for large programs.

Reviewers: tejohnson

Reviewed By: tejohnson

Subscribers: sanjoy, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D35148

llvm-svn: 307578
2017-07-10 20:12:54 +00:00
George Karpenkov 0b4ebb1d0b Do not crash with missing symbolication when running in DEDUP mode
Printing stacktrace from ASAN crashes with a segfault in DEDUP mode when
symbolication is missing.

Differential Revision: https://reviews.llvm.org/D34914

llvm-svn: 307577
2017-07-10 20:06:06 +00:00
Matt Arsenault 9cff06f37b AMDGPU: Allow SIShrinkInstructions to fold FrameIndexes
llvm-svn: 307576
2017-07-10 20:04:35 +00:00
Matt Arsenault 6c29c5acfe AMDGPU: Allow SIShrinkInstructions to work in non-SSA
Immediates can be folded as long as the immediate is a vreg.

Also undo commuting instructions if it didn't fold an immediate.

llvm-svn: 307575
2017-07-10 19:53:57 +00:00
Matt Arsenault fda5318204 AMDGPU: Remove unnecessary check for constant operands
An instruction that has an immediate operand can't reach
this point. This is only called for a freshly shrunk instruction,
which prevously couldn't have had a literal constant operand.
This was also not conservative enough since it woudl also have
had to filter other constant-like inputs like frame indexes.

llvm-svn: 307574
2017-07-10 19:33:38 +00:00
Konstantin Zhuravlyov a46241909a AMDGPU: Do not test for SI in getIsaVersion
SI is being tested by isa version in the first two if statements of the function.

llvm-svn: 307573
2017-07-10 19:24:05 +00:00
George Karpenkov 4a4525ba13 [CMake] Dependencies for tests in "runtimes"
Many of the test cases in the runtimes require LLVM's testing tools, to
facilitate this working as expected we need to have all the test targets
in the runtimes depend on all LLVM testing tools used in the runtimes.

Differential Revision: https://reviews.llvm.org/D33048

llvm-svn: 307572
2017-07-10 19:23:28 +00:00
Zachary Turner a9d944fd6f Resubmit "Add pdb-diff test."
This was originally reverted because of two issues.
  1) Printing ANSI color escape codes even when outputting to
     a file
  2) Module name comparisons were failing when comparing a PDB
     generated on one machine to a PDB generated on another
     machine.

I attempted to fix #2 by adding command line options which let
you specify prefixes to strip from the beginning of embedded
paths, which effectively lets us specify a path to "base" each
PDB from and only compare the parts under the base.  But this is
tricky because PDB paths always use Windows path syntax, even
when they are created on non-Windows hosts.  A problem still
existed when constructing the prefix to strip, where we were
accidentally using a host-specific path separator instead of
a Windows path separator.

This resubmission fixes the issue on Linux (and I have verified
that the test now passes on Linux).

llvm-svn: 307571
2017-07-10 19:16:49 +00:00
George Karpenkov fd7b1c0a56 [cmake] Remove obsolete unset in CMake.
Differential Revision: https://reviews.llvm.org/D35024

llvm-svn: 307569
2017-07-10 18:58:05 +00:00
George Karpenkov 184e7183c3 [docs] Remove obsolete section in CMake documentation.
Differential Revision: https://reviews.llvm.org/D35023

llvm-svn: 307568
2017-07-10 18:56:51 +00:00
Kuba Mracek 7fa20ac847 Add an #if SANITIZER_MAC and a comment to lsan_common's suppression for "_os_trace".
llvm-svn: 307567
2017-07-10 18:55:33 +00:00
Krzysztof Parzyszek df4a05d6fb [Hexagon] Fix check for HMOTF_ConstExtend operand flag
This fixes https://llvm.org/PR33718.

llvm-svn: 307566
2017-07-10 18:38:52 +00:00
Sam Clegg b03c2b4b09 [WebAssembly] Use the correct size for MCFillFragment
Summary: When implementing MCFillFragment, use the size of the fragment,
rather than the size of the section.

Patch by Dan Gohman

Differential Revision: https://reviews.llvm.org/D35090

llvm-svn: 307565
2017-07-10 18:36:34 +00:00
Krzysztof Parzyszek 0ac065f318 [Hexagon] Handle Hexagon-specific machine operand target flags in MIR
llvm-svn: 307564
2017-07-10 18:31:02 +00:00
Tony Jiang acefbcf38e [PPC CodeGen] Expand the bitreverse.i64 intrinsic.
Differential Revision: https://reviews.llvm.org/D34908
Fix PR: https://bugs.llvm.org/show_bug.cgi?id=33093

llvm-svn: 307563
2017-07-10 18:11:23 +00:00
Craig Topper 76ac813790 [X86] Sync a few more things from llvm's Host.cpp to cpu_model.
This syncs the cpuid functions and adds breaks to the appropriate spots in the CPU decoding switches. Also a few formatting tweaks.

llvm-svn: 307561
2017-07-10 17:47:23 +00:00
Mandeep Singh Grang 4250a47e90 [Docs] Updating CMake docs to include LLVM_REVERSE_ITERATION
Reviewers: beanz, mehdi_amini

Reviewed By: beanz

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D35080

llvm-svn: 307560
2017-07-10 17:37:36 +00:00
Zachary Turner ba3836bc78 Revert "Build fixes for pdb-diff test."
This reverts commit 180af3fdbdb17ec35b45ec1f925fd743b28d37e1.

This is still breaking due to linux-specific path differences.

llvm-svn: 307559
2017-07-10 17:32:47 +00:00
Craig Topper 61d8450277 [X86] Resync cpu_model.c with llvm's Host.cpp in preparation for making it compatible with newer gcc.
llvm-svn: 307558
2017-07-10 17:30:20 +00:00
Kuba Mracek 21ad3fd3c5 Fix-up for r307537: We need to #include stdint.h to get int32_t.
llvm-svn: 307557
2017-07-10 17:11:52 +00:00
Zachary Turner e80c0bf6d7 Build fixes for pdb-diff test.
llvm-svn: 307556
2017-07-10 17:01:28 +00:00
Zachary Turner 6da7a3058e Fix pdb-diff test.
A test was checked in on Friday that worked by checking in an
object file and PDB generated locally by MSVC, and then having
the test run lld-link on the object file and diffing LLD's PDB
against the checked in PDB.

This failed because part of the diffing algorithm involves
determining if two modules are the same, and if so drilling into
the module and diffing individual fields of the module.  The
only thing we can use to make this determination though is the
"name" of the module, which is a path to where the module (obj
file) was read from on the machine where it was linked.  This
fails for obvious reasons when comparing a PDB generated on one
machine to a PDB on another machine.

The fix employed here is to add two command line options to the
diff subcommand, which allow the user to specify a "binary root
path".  The bin root path, if specified, is stripped from the
beginning of any embedded PDB paths.  The test is updated to
specify the user's local test output directory for the left
PDB, and is hardcoded to the location where the original PDB
was created for the right PDB.  This way all the equivalence
comparisons should succeed.

llvm-svn: 307555
2017-07-10 16:52:15 +00:00
Serge Guelton f6329ec2e9 Fix invalid cast in instcombine UMul/ZExt idiom
Fixes https://bugs.llvm.org/show_bug.cgi?id=25454

Do not assume IRBuilder creates Instruction where it can create Value.
Do not assume idiom operands are constant, leave generalisation ot the IRBuilder.

Differential Revision: https://reviews.llvm.org/D35114

llvm-svn: 307554
2017-07-10 16:51:40 +00:00
Lei Huang 168d14b143 [PowerPC] Reduce register pressure by not materializing a constant just for use as an index register for X-Form loads/stores.
For this example:
float test (int *arr) {
    return arr[2];
}

We currently generate the following code:
  li r4, 8
  lxsiwax f0, r3, r4
  xscvsxdsp f1, f0

With this patch, we will now generate:
  addi r3, r3, 8
  lxsiwax f0, 0, r3
  xscvsxdsp f1, f0

Originally reported in: https://bugs.llvm.org/show_bug.cgi?id=27204
Differential Revision: https://reviews.llvm.org/D35027

llvm-svn: 307553
2017-07-10 16:44:45 +00:00
Andrew V. Tischenko ae9d6db769 [X86] Model 256-bit AVX instructions in the AMD Jaguar scheduler Part-1 (PR28573).
The new version of the model is definitely faster.

Differential Revision:
https://reviews.llvm.org/D35198

llvm-svn: 307552
2017-07-10 16:36:03 +00:00
Eric Liu 159094a2db Avoid white spaces in file names. NFC
Summary: White spaces in file names are causing Phabricator/SVN to crash.

Reviewers: bkramer

Subscribers: bogner, cfe-commits

Differential Revision: https://reviews.llvm.org/D35203

llvm-svn: 307551
2017-07-10 16:05:48 +00:00
Eric Liu ada3a1506e [LLVM] Get rid of white spaces in file names in a DebugInfo test. NFC
Summary: White spaces in file names are causing Phabricator/SVN to crash.

Reviewers: bkramer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D35206

llvm-svn: 307550
2017-07-10 16:05:18 +00:00
Kuba Mracek dbfd7f35ff Fix a build failure due to r307541 (tsan_rtl_aarch64.S:54: Error: unknown pseudo-op: `.').
llvm-svn: 307549
2017-07-10 15:58:22 +00:00
Kuba Mracek 6496d92dd2 [lsan] Add _os_trace into LSan's suppression list
Differential Revision: https://reviews.llvm.org/D35173

llvm-svn: 307548
2017-07-10 15:55:25 +00:00
Kuba Mracek 9ae34c2d3f Fix-up for r307540.
llvm-svn: 307547
2017-07-10 15:52:30 +00:00
Nirav Dave 163e1ad9dc [DAG] Improve Aliasing of operations to static alloca
Memory accesses offset from frame indices may alias, e.g., we
may merge write from function arguments passed on the stack when they
are contiguous. As a result, when checking aliasing, we consider the
underlying frame index's offset from the stack pointer.

Static allocs are realized as stack objects in SelectionDAG, but its
offset is not set until post-DAG causing DAGCombiner's alias check to
consider access to static allocas to frequently alias. Modify isAlias
to consider access between static allocas and access from other frame
objects to be considered aliasing.

Many test changes are included here. Most are fixes for tests which
indirectly relied on our aliasing ability and needed to be modified to
preserve their original intent.

The remaining tests have minor improvements due to relaxed
ordering. The exception is CodeGen/X86/2011-10-19-widen_vselect.ll
which has a minor degradation dispite though the pre-legalized DAG is
improved.

Reviewers: rnk, mkuper, jonpa, hfinkel, uweigand

Reviewed By: rnk

Subscribers: sdardis, nemanjai, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D33345

llvm-svn: 307546
2017-07-10 15:39:41 +00:00
Kuba Mracek 7cd7c1a7b5 [tsan] Add comments for the bool argument of ThreadIgnoreBegin/ThreadIgnoreSyncBegin, NFC.
Differential Revision: https://reviews.llvm.org/D35134

llvm-svn: 307545
2017-07-10 15:37:13 +00:00
Kuba Mracek f20cb690b5 [tsan] Add a mapping for Darwin/AArch64
This patch defines the TSan memory map and offsets for Darwin on AArch64.

Differential Revision: https://reviews.llvm.org/D35147

llvm-svn: 307544
2017-07-10 15:35:04 +00:00
Dehao Chen 396f62444d Use emplace_back to replace size() and resize().
Summary: This speeds-up thin-link for ~29% for large programs.

Reviewers: tejohnson

Reviewed By: tejohnson

Subscribers: grandinj, sanjoy, llvm-commits

Differential Revision: https://reviews.llvm.org/D35145

llvm-svn: 307543
2017-07-10 15:31:53 +00:00
Anna Thomas 70ffd65ca9 [LoopUnrollRuntime] Remove strict assert about VMap requirement
When unrolling under multiple exits which is under off-by-default option,
the assert that checks for VMap entry in loop exit values is too strong.
(assert if VMap entry did not exist, the value should be a
constant). However, values derived from
constants or from values outside loop, does not have a VMap entry too.

Removed the assert and added a testcase showcasing the property for
non-constant values.

llvm-svn: 307542
2017-07-10 15:29:38 +00:00
Kuba Mracek 8bd2cca391 [tsan] Port setjmp/longjmp assembly to Darwin/AArch64
This patch ports the assembly file implementing TSan's setjmp support to AArch64 on Darwin.

Differential Revision: https://reviews.llvm.org/D35143

llvm-svn: 307541
2017-07-10 15:28:16 +00:00
Kuba Mracek 8b225456c2 [tsan] Add a max VM address check for Darwin/AArch64
Differential Revision: https://reviews.llvm.org/D35154

llvm-svn: 307540
2017-07-10 15:24:48 +00:00
Kuba Mracek 989513be94 Reverting an accidentally landed change.
llvm-svn: 307539
2017-07-10 15:20:50 +00:00
Kuba Mracek 872cb7086c Fixup whitespace.
llvm-svn: 307538
2017-07-10 15:19:14 +00:00
Kuba Mracek 91f3fa5f31 [tsan] Add support for running TSan tests on iOS simulator and devices
Differential Revision: https://reviews.llvm.org/D35157

llvm-svn: 307537
2017-07-10 15:00:55 +00:00
Philip Pfaffe 8c84699f28 [PM] Fix a warning.
The DebugLogging argument was unused in the EP callbacks registration.

llvm-svn: 307536
2017-07-10 13:54:23 +00:00
Philipp Stephani 7ac5d59554 Improve error message when run from a buffer that doesn't visit a file
Summary: In this case, users currently get a confusing type error.  Make the error message more obvious.

Reviewers: klimek

Reviewed By: klimek

Differential Revision: https://reviews.llvm.org/D35197

llvm-svn: 307535
2017-07-10 13:49:18 +00:00
Philip Pfaffe a3b8416880 [PM] Fix r307532: Get rid of a dangling reference.
Escaping lambda by-reference capture of local variable caused a dangling
reference.

llvm-svn: 307534
2017-07-10 12:48:51 +00:00
Hiroshi Inoue a86c920b1e fix typos in comments and error messages; NFC
llvm-svn: 307533
2017-07-10 12:44:25 +00:00
Philip Pfaffe 730f2f9bb6 [PM] Enable registration of out-of-tree passes with PassBuilder
Summary:
This patch adds a callback registration API to the PassBuilder,
enabling registering out-of-tree passes with it.

Through the Callback API, callers may register callbacks with the
various stages at which passes are added into pass managers, including
parsing of a pass pipeline as well as at extension points within the
default -O pipelines.

Registering utilities like `require<>` and `invalidate<>` needs to be
handled manually by the caller, but a helper is provided.

Additionally, adding passes at pipeline extension points is exposed
through the opt tool. This patch adds a `-passes-ep-X` commandline
option for every extension point X, which opt parses into pipelines
inserted into that extension point.

Reviewers: chandlerc

Reviewed By: chandlerc

Subscribers: lksbhm, grosser, davide, mehdi_amini, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D33464

llvm-svn: 307532
2017-07-10 10:57:55 +00:00
Javed Absar fb3210aa05 [ARM] Tidy up ARMBaseRegisterInfo implementation. NFC
Clean up ARMBaseRegisterInfo implementation a bit.
Differential Revision: https://reviews.llvm.org/D35116

llvm-svn: 307531
2017-07-10 10:42:55 +00:00
George Rimar c7147b368a [DWARF] - Rename variable. NFC.
Variable was called 'Name' and contained text
name of relocation type. Problem was that
outside of this error handling scope we already
have different 'Name' variable that contains
section name.

Change helps to avoid confusion. 

llvm-svn: 307530
2017-07-10 10:04:51 +00:00
Gadi Haber f4d154c089 This patch completely replaces the scheduling information for the SandyBridge architecture target by modifying the file X86SchedSandyBridge.td located under the X86 Target.
The SandyBridge architects have provided us with a more accurate information about each instruction latency, number of uOPs and used ports and I used it to replace the existing estimated SNB instructions scheduling and to add missing scheduling information.

Please note that the patch extensively affects the X86 MC instr scheduling for SNB.

Also note that this patch will be followed by additional patches for the remaining target architectures HSW, IVB, BDW, SKL and SKX.

The updated and extended information about each instruction includes the following details:
•static latency of the instruction
•number of uOps from which the instruction consists of
•all ports used by the instruction's' uOPs

For example, the following code dictates that instructions, ADC64mr, ADC8mr, SBB64mr, SBB8mr have a static latency of 9 cycles. Each of these instructions is decoded into 6 micro operations which use ports 4, ports 2 or 3 and port 0 and ports 0 or 1 or 5:

def SBWriteResGroup94 : SchedWriteRes<[SBPort4,SBPort23,SBPort0,SBPort015]> {
let Latency = 9;
let NumMicroOps = 6;
let ResourceCycles = [1,2,2,1];

}
def: InstRW<[SBWriteResGroup94], (instregex "ADC64mr")>;
def: InstRW<[SBWriteResGroup94], (instregex "ADC8mr")>;
def: InstRW<[SBWriteResGroup94], (instregex "SBB64mr")>;
def: InstRW<[SBWriteResGroup94], (instregex "SBB8mr")>;

Note that apart for the header, most of the X86SchedSandyBridge.td file was generated by a script.

Reviewers: zvi, chandlerc, RKSimon, m_zuckerman, craig.topper, igorb

Differential Revision:  https://reviews.llvm.org/D35019#inline-304691

llvm-svn: 307529
2017-07-10 09:53:16 +00:00