Commit Graph

190004 Commits

Author SHA1 Message Date
Teresa Johnson 31441a3e00 [ThinLTO/WPD] Fix index-based WPD for alias vtables
Summary:
A recent fix in D69452 fixed index based WPD in the presence of
available_externally vtables. It added a cast of the vtable def
summary to a GlobalVarSummary. However, in some cases one def may be an
alias, in which case we need to get the base object before casting,
otherwise we will crash.

Reviewers: evgeny777, steven_wu, aganea

Subscribers: mehdi_amini, inglorion, hiraditya, dexonsmith, arphaman, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71040
2020-01-13 13:38:26 -08:00
Sanjay Patel 80a094e134 [InstCombine] add FMF to tests for more coverage; NFC 2020-01-13 16:29:20 -05:00
Craig Topper 26c7a4ed10 [LegalizeIntegerTypes][X86] Add support for expanding input of STRICT_SINT_TO_FP/STRICT_UINT_TO_FP into a libcall.
Needed to support i128->fp128 on 32-bit X86.

Add full set of strict sint_to_fp/uint_to_fp conversion tests for fp128.
2020-01-13 13:11:12 -08:00
Sanjay Patel 69f4cea413 [InstCombine] add tests for select --> copysign; NFC
This is testing for another (possibly final) transform suggested in:
https://bugs.llvm.org/show_bug.cgi?id=44153
2020-01-13 15:39:24 -05:00
Alexey Lapshin f163755eb0 [Dsymutil][Debuginfo][NFC] #3 Refactor dsymutil to separate DWARF optimizing part.
Summary:
This is the next portion of patches for dsymutil.

Create DwarfEmitter interface to generate all debug info tables.
Put DwarfEmitter into DwarfLinker library and make tools/dsymutil/DwarfStreamer
to be child of DwarfEmitter.

It passes check-all testing. MD5 checksum for clang .dSYM bundle matches
for the dsymutil with/without that patch.

Reviewers: JDevlieghere, friss, dblaikie, aprantl

Reviewed By: JDevlieghere

Subscribers: merge_guards_bot, hiraditya, thegameg, probinson, llvm-commits

Tags: #llvm, #debug-info

Differential Revision: https://reviews.llvm.org/D72476
2020-01-13 23:33:25 +03:00
Teresa Johnson d0aad9f56e [LTO] Constify lto::Config reference passed to backends (NFC)
The lto::Config object saved on the global LTO object should not be
updated by any of the LTO backends. Otherwise we could run into
interference between threads utilizing it. Motivated by some proposed
changes that would have caused it to get modified in the ThinLTO
backends.
2020-01-13 12:26:17 -08:00
Daniel Sanders a0f4600f4f Rework be15dfa88f such that it works with GlobalISel which doesn't use EVT
Summary:
be15dfa88f broke GlobalISel's usage of getSetCCInverse() which currently
appears to be limited to our out-of-tree backend. GlobalISel doesn't use
EVT's and isn't able to derive them from the information it has as it
doesn't distinguish between integer and floating point types (that
distinction is made by operations rather than values). Bring back the
bool version of getSetCCInverse() in a way that doesn't break the intent
of be15dfa88f but also allows GlobalISel to continue using it.

Reviewers: spatel, bogner, arichardson

Reviewed By: arichardson

Subscribers: rovka, hiraditya, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72309
2020-01-13 12:19:37 -08:00
Nico Weber 2b530053e9 [gn build] (manually) port b4a99a061f 2020-01-13 14:13:35 -05:00
Teresa Johnson 6288f86e87 Revert "[ThinLTO] Add additional ThinLTO pipeline testing with new PM"
This reverts commit 2af97be802.

After attempting to fix bot failures from matching issues (mostly due to
inconsistent printing of "llvm::" prefixes on objects, and
AnalysisManager objects being printed differntly, I am now seeing some
differences I don't understand (real differences in the passes being
printed). Giving up at this point to allow the bots to recover. Will
revisit later.
2020-01-13 11:01:48 -08:00
Teresa Johnson cb988a858a Add a couple of missed wildcards in debug-pass-manager output checking
Along with the previous fix for bot failures from
2af97be802, need to add a wildcard in a
couple of places where my local output did not print "llvm::" but the
bot is.
2020-01-13 10:49:40 -08:00
Fangrui Song 64a93afc3c [X86][Disassembler] Fix a bug when disassembling an empty string
readPrefixes() assumes insn->bytes is non-empty. The code path is not
exercised in llvm-mc because llvm-mc does not feed empty input to
MCDisassembler::getInstruction().

This bug is uncovered by a5994c789a.
An empty string did not crash before because the deleted regionReader()
allowed UINT64_C(-1) as insn->readerCursor.

  Bytes.size() <= Address -> R->Base
  0 <= UINT64_C(-1) - UINT32_C(-1)
2020-01-13 10:42:21 -08:00
Puyan Lotfi 484a7472f1 [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands.
This patch makes it so that cases where multiple instructions that differ only
in their FrameIndex MachineOperand values no longer collide. For instance:

%1:_(p0) = G_FRAME_INDEX %stack.0
%2:_(p0) = G_FRAME_INDEX %stack.1

Prior to this patch these instructions would collide together.

Differential Revision: https://reviews.llvm.org/D71583
2020-01-13 13:39:54 -05:00
Teresa Johnson 7aed43b607 Hopefully last fix for bot failures
Hopefully final bot fix for last few failures from
2af97be802.

Looks like sometimes the "llvm::" preceeding objects get printed in the
debug pass manager output and sometimes they don't. Replace with
wildcard matching.
2020-01-13 10:34:54 -08:00
Teresa Johnson 292562c004 Try number 2 for fixing bot failures
Additional fixes for bot failures from 2af97be802.
Remove more exact matching on AnalyisManagers, as they can vary.
Also allow different orders between LoopAnalysis and
BranchProbabilityAnalysis as that can vary due to both being accessed in
the parameter list of a call.
2020-01-13 10:12:35 -08:00
Matt Arsenault 203801425d AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap} 2020-01-13 13:09:38 -05:00
Simon Pilgrim c6fcd5d115 [SelectionDAG] ComputeNumSignBits add getValidMaximumShiftAmountConstant() for ISD::SHL support
Allows us to handle non-uniform SHL shifts to determine the minimum number of sign bits remaining (based off the maximum shift amount value)
2020-01-13 18:02:37 +00:00
Matt Arsenault 3d8f1b2d22 AMDGPU/GlobalISel: Set insert point after waterfall loop
The current users of the waterfall loop utility functions do not make
use of the restored original insert point. The insertion is either
done, or they set the insert point somewhere else. A future change
will want to insert instructions after the waterfall loop, but
figuring out the point after the loop is more difficult than ensuring
the insert point is there after the loop.
2020-01-13 12:51:05 -05:00
Matt Arsenault 2f090cc8f1 AMDGPU/GlobalISel: Add some baseline tests for vector extract
A future change will try to fold constant offsets into the loop which
these will stress.
2020-01-13 12:51:05 -05:00
Matt Arsenault ca19d7a399 AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF
The branch target needs to be changed depending on whether there is an
unconditional branch or not.

Loops also need to be similarly fixed, but compiling a simple testcase
end to end requires another set of patches that aren't upstream yet.
2020-01-13 12:51:05 -05:00
Matt Arsenault 7d9b0a61c3 AMDGPU/GlobalISel: Simplify assert 2020-01-13 12:51:05 -05:00
Simon Pilgrim ffc05d0dbc [X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift value
Shows that for non-uniform SHL shifts we fail to determine the minimum number of sign bits remaining (based off the maximum shift amount value)
2020-01-13 17:34:40 +00:00
Teresa Johnson bb2e5f5e45 Fix tests for builtbot failures
Should fix most of the buildbot failures from
2af97be802, by loosening up the matching
on the AnalysisProxy output.

Added in --dump-input=fail on the one test that appears to be something
different, so I can hopefully debug it better.
2020-01-13 09:28:13 -08:00
Andrew Wei 05366870ee [LegalizeTypes] Add SoftenFloatResult support for STRICT_SINT_TO_FP/STRICT_UINT_TO_FP
Some target like arm/riscv with soft-float will have compiling crash when using -fno-unsafe-math-optimization option.
This patch will add the missing strict FP support to SoftenFloatRes_XINT_TO_FP.

Differential Revision: https://reviews.llvm.org/D72277
2020-01-14 01:01:56 +08:00
Simon Pilgrim 38e2c01221 [SelectionDAG] ComputeNumSignBits add getValidMinimumShiftAmountConstant() ISD::SRA support
Allows us to handle more non-uniform SRA sign bits cases
2020-01-13 16:55:02 +00:00
Simon Pilgrim 7afaa0099b [X86][SSE] Add sitofp(ashr(x,y)) test case with non-uniform shift value 2020-01-13 16:55:02 +00:00
Simon Pilgrim ee4aa1a228 [X86] Add AVX2 known signbits codegen tests 2020-01-13 16:55:01 +00:00
David Green 90555d9253 [Scheduler] Remove superfluous casts. NFC 2020-01-13 16:34:13 +00:00
Danilo Carvalho Grael 2d7e757a83 [AArch64][SVE] Add patterns for some arith SVE instructions.
Summary: Add patterns for the following instructions:
- smax, smin, umax, umin

Reviewers: sdesmalen, huntergr, rengolin, efriedma, c-rhodes, mgudim, kmclaughlin

Subscribers: amehsan

Differential Revision: https://reviews.llvm.org/D71779
2020-01-13 11:39:42 -05:00
Teresa Johnson 2af97be802 [ThinLTO] Add additional ThinLTO pipeline testing with new PM
Summary:
I've added some more extensive ThinLTO pipeline testing with the new PM,
motivated by the bug fixed in D72386.

I beefed up llvm/test/Other/new-pm-pgo.ll a little so that it tests
ThinLTO pre and post link with PGO, similar to the testing for the
default pipelines with PGO.

Added new pre and post link PGO tests for both instrumentation and
sample PGO that exhaustively test the pipelines at different
optimization levels via opt.

Added a clang test to exhaustively test the post link pipeline invoked for
distributed builds. I am currently only testing O2 and O3 since these
are the most important for performance.

It would be nice to add similar exhaustive testing for full LTO, and for
the old PM, but I don't have the bandwidth now and this is a start to
cover some of the situations that are not currently default and were
under tested.

Reviewers: wmi

Subscribers: mehdi_amini, inglorion, hiraditya, steven_wu, dexonsmith, jfb, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D72538
2020-01-13 08:29:56 -08:00
James Henderson 07804f75a6 [DebugInfo] Make debug line address size mismatch non-fatal to parsing
Reasonable assumptions can be made when a parsed address length does not
match the expected length, so there's no need for this to be fatal.

Reviewed by: ikudrin

Differential Revision: https://reviews.llvm.org/D72154
2020-01-13 16:27:05 +00:00
Kazu Hirata 6b686703e6 [Inlining] Add PreInlineThreshold for the new pass manager
Summary:
This patch makes it easy to try out different preinlining thresholds
with a command-line switch just like -preinline-threshold for the
legacy pass manager.

Reviewers: davidxl

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72618
2020-01-13 07:59:42 -08:00
Luís Marques 043c5eafa8 [RISCV] Handle globals and block addresses in asm operands
Summary: These seem to be the machine operand types currently needed by the
RISC-V target.

Reviewers: asb, lenary
Reviewed By: lenary
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72275
2020-01-13 15:34:56 +00:00
Sam McCall 0b91e78a71 Add missing triples to tests in 0c29d3ff22 so they target the right arch. 2020-01-13 15:58:49 +01:00
Pablo Barrio da33762de8 [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below
Summary:
The Pointer Authentication Extension (PAC) was added in Armv8.3-A. Some
instructions are implemented in the HINT space to allow compiling code
common to CPUs regardless of whether they feature PAC or not, and still
benefit from PAC protection in the PAC-enabled CPUs.

The 8.3-specific mnemonics were currently enabled in any architecture, and
LLVM was emitting them in assembly files when PAC code generation was
enabled. This was ok for compilations where both LLVM codegen and the
integrated assembler were used. However, the LLVM codegen was not
compatible with other assemblers (e.g. GAS). Given the fact that the
approach from these assemblers (i.e. to disallow Armv8.3-A mnemonics if
compiling for Armv8.2-A or lower) is entirely reasonable, this patch makes
LLVM to emit HINT when building for Armv8.2-A and below, instead of
PACIASP, AUTIASP and friends. Then, LLVM assembly should be compatible
with other assemblers.

Reviewers: samparker, chill, LukeCheeseman

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D71658
2020-01-13 14:14:48 +00:00
Alex Richardson 8e8ccf4712 [MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against data symbols
The R_(MICRO)MIPS_JALR optimization only works when used against functions.
Using the relocation against a data symbol (e.g. function pointer) will
cause some linkers that don't ignore the hint in this case (e.g. LLD prior
to commit 5bab291b7b) to generate a relative branch to the data symbol
which crashes at run time. Before this patch, LLVM was erroneously emitting
these relocations against local-dynamic TLS function pointers and global
function pointers with internal visibility.

Reviewers: atanasyan, jrtc27, vstefanovic
Reviewed By: atanasyan
Differential Revision: https://reviews.llvm.org/D72571
2020-01-13 14:14:03 +00:00
Alex Richardson 894f742acb [MIPS][ELF] Use PC-relative relocations in .eh_frame when possible
When compiling position-independent executables, we now use
DW_EH_PE_pcrel | DW_EH_PE_sdata4. However, the MIPS ABI does not define a
64-bit PC-relative ELF relocation so we cannot use sdata8 for the large
code model case. When using the large code model, we fall back to the
previous behaviour of generating absolute relocations.

With this change clang-generated .o files can be linked by LLD without
having to pass -Wl,-z,notext (which creates text relocations).
This is simpler than the approach used by ld.bfd, which rewrites the
.eh_frame section to convert absolute relocations into relative references.

I saw in D13104 that apparently ld.bfd did not accept pc-relative relocations
for MIPS ouput at some point. However, I also checked that recent ld.bfd
can process the clang-generated .o files so this no longer seems true.

Reviewed By: atanasyan
Differential Revision: https://reviews.llvm.org/D72228
2020-01-13 14:14:03 +00:00
Sanjay Patel 26d2ace9e2 [InstSimplify] move tests for select from InstCombine; NFC
InstCombine has transforms that would enable these simplifications
in an indirect way, but those transforms are unsafe and likely to
be removed.
2020-01-13 09:13:21 -05:00
Simon Pilgrim 376bc39c82 [SelectionDAG] ComputeNumSignBits - Use getValidShiftAmountConstant for shift opcodes
getValidShiftAmountConstant handles out of bounds shift amounts for us, allowing us to remove the local handling.
2020-01-13 14:12:12 +00:00
Simon Pilgrim 6d1a8fd447 [SelectionDAG] ComputeKnownBits - Add DemandedElts support to getValidShiftAmountConstant/getValidMinimumShiftAmountConstant() 2020-01-13 14:12:12 +00:00
Simon Pilgrim 89ba150240 [X86] Add knownbits tests showing missing shift amount demanded elts handling. 2020-01-13 14:12:12 +00:00
Ulrich Weigand 04a86966fb [FPEnv] Fix chain handling for fpexcept.strict nodes
We need to ensure that fpexcept.strict nodes are not optimized away even if
the result is unused. To do that, we need to chain them into the block's
terminator nodes, like already done for PendingExcepts.

This patch adds two new lists of pending chains, PendingConstrainedFP and
PendingConstrainedFPStrict to hold constrained FP intrinsic nodes without
and with fpexcept.strict markers. This allows not only to solve the above
problem, but also to relax chains a bit further by no longer flushing all
FP nodes before a store or other memory access. (They are still flushed
before nodes with other side effects.)

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D72341
2020-01-13 14:38:49 +01:00
Matt Arsenault d7d88b9d8b GlobalISel: Fix assertion on wide G_ZEXT sources
It's possible to have a type that needs a mask greater than 64-bits.
2020-01-13 08:29:45 -05:00
Miloš Stojanović a70b993239 [llvm-exegesis] Remove unneeded std::move()
Caught by buildbot breakage:

/home/docker/worker_env/ppc64le-clang-rhel-test/clang-ppc64le-rhel/llvm/llvm/tools/llvm-exegesis/lib/Mips/Target.cpp:89:12: error: moving a local object in a return statement prevents copy elision [-Werror,-Wpessimizing-move]
    return std::move(Instructions);
           ^
/home/docker/worker_env/ppc64le-clang-rhel-test/clang-ppc64le-rhel/llvm/llvm/tools/llvm-exegesis/lib/Mips/Target.cpp:89:12: note: remove std::move call here
    return std::move(Instructions);
           ^~~~~~~~~~            ~
2020-01-13 14:19:17 +01:00
Simon Pilgrim ef5debac43 [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant() ISD::SHL support
As mentioned on D72573
2020-01-13 12:02:13 +00:00
Simon Pilgrim 7efc7ca8ed [X86][SSE] Add knownbits test showing missing getValidMinimumShiftAmountConstant() ISD::SHL support
As mentioned on D72573
2020-01-13 12:02:13 +00:00
Miloš Stojanović 804dd67227 [llvm-exegesis][mips] Expand loadImmediate()
Add support for loading 32-bit immediates and enable the use of GPR64
registers.

Differential Revision: https://reviews.llvm.org/D71873
2020-01-13 12:32:13 +01:00
Simon Pilgrim 8f49204f26 [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/SHL (PR44526)
As detailed in https://blog.regehr.org/archives/1709 we don't make use of the known leading/trailing zeros for shifted values in cases where we don't know the shift amount value.

This patch adds support to SelectionDAG::ComputeKnownBits to use KnownBits::countMinTrailingZeros and countMinLeadingZeros to set the minimum guaranteed leading/trailing known zero bits.

Differential Revision: https://reviews.llvm.org/D72573
2020-01-13 11:08:12 +00:00
Simon Pilgrim 7f1cf7d5f6 [X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI. 2020-01-13 11:08:12 +00:00
James Henderson b6ffa2fe12 [DebugInfo][Support] Replace DWARFDataExtractor size function
This patch adds a new size function to the base DataExtractor class,
which removes the need for the DWARFDataExtractor size function.

It is unclear why DWARFDataExtractor's size function returned zero in
some circumstances (i.e. when it is constructed without a section, and
with a different data source instead), so that behaviour has changed.
The old behaviour could cause an assertion in the debug line parser, as
the size did not reflect the actual data available, and could be lower
than the current offset being parsed.

Reviewed by: dblaikie

Differential Revision: https://reviews.llvm.org/D72337
2020-01-13 10:53:00 +00:00
Sjoerd Meijer add04b9653 ARMLowOverheadLoops: return earlier to avoid printing irrelevant dbg msg. NFC 2020-01-13 10:24:10 +00:00