Commit Graph

287629 Commits

Author SHA1 Message Date
Bob Haarman cb80a3fce0 Fix data race in X86FloatingPoint.cpp ASSERT_SORTED
Summary:
ASSERT_SORTED checks if a table is sorted, and uses a boolean to
prevent the check from being run again if it was earlier determined
that the table is in fact sorted. Unsynchronized reads and writes of
that boolean triggered ThreadSanitizer's data race detection. This
change rewrites the code to use std::atomic<bool> instead.

Fixes PR36922.

Reviewers: rnk

Reviewed By: rnk

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D45742

llvm-svn: 330301
2018-04-18 23:04:09 +00:00
Reid Kleckner 8f1a28f190 [COFF] Mark images with no exception handlers for /safeseh
Summary:
DLLs and executables with no exception handlers need to be marked with
IMAGE_DLL_CHARACTERISTICS_NO_SEH, even if they have a load config.

Discovered here when building Chromium with LLD on Windows:
https://crbug.com/833951

Reviewers: ruiu, mstorsjo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D45778

llvm-svn: 330300
2018-04-18 22:37:10 +00:00
Heejin Ahn f78a493528 [OpenMP] Compilation error fix on const char*
Summary:
This line
(0ed912c7a7/runtime/src/kmp_gsupport.cpp (L1459))
added in D45327 (rL330282) causes a compilation failure.

Reviewers: jlpeyton

Subscribers: guansong, openmp-commits

Differential Revision: https://reviews.llvm.org/D45786

llvm-svn: 330299
2018-04-18 22:23:31 +00:00
Craig Topper ebf52e80c1 [X86] Correct the Defs, Uses, hasSideEffects, mayLoad, mayStore for XCHG and XADD instructions.
I don't think we emit any of these from codegen except for using XCHG16ar as 2 byte NOP.

llvm-svn: 330298
2018-04-18 22:07:53 +00:00
Alex Shlyapnikov 02f7841e4a [HWASan] Add "N" suffix to generic __hwasan_load/store.
Summary:
"N" suffix is added by the instrumentation and interface functions
are expected to be exported from the library as __hwasan_loadN* and
__hwasan_storeN*.

Reviewers: eugenis

Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D45739

llvm-svn: 330297
2018-04-18 22:05:18 +00:00
Artem Belevich 0ae8590354 [NVPTX, CUDA] Added support for m8n32k16 and m32n8k16 variants of wmma instructions.
The new instructions were added added for sm_70+ GPUs in CUDA-9.1.

Differential Revision: https://reviews.llvm.org/D45068

llvm-svn: 330296
2018-04-18 21:51:48 +00:00
Simon Pilgrim c310bfa193 [llvm-mca][X86] Add mmx versions of SSSE3 instructions
Move PABS instructions incorrectly tested under SSE2 

llvm-svn: 330295
2018-04-18 20:47:48 +00:00
Alex Bradbury 9891ba3476 [RISCV] Add test changes missed from rL330293
llvm-svn: 330294
2018-04-18 20:36:12 +00:00
Alex Bradbury 3ff2022bb9 [RISCV] Introduce pattern for materialising immediates with 0 for lower 12 bits
These immediates can be materialised with just an lui, rather than an lui+addi 
pair.

llvm-svn: 330293
2018-04-18 20:34:23 +00:00
Tobias Grosser f4a3ff008d [RuntimeDebugBuilder] Print vectors passed without withspaces
Originally the RuntimeDebugBuilder printed vectors with withspaces
between the elements. This historic use is meanwhile gone, but the
functionality is still available.

We now change the behavior to print elements just one after the other
without adding white spaces in between. This is useful for D45743, an
upcoming commmit, which also adds test coverage for this feature.

In general, printing elements of a vector directly is more generic as
it allows uses where no white-spaces are desired. Specifically, it
allows the user to build vectors of items to be printed where their
length is only known at run-time.

llvm-svn: 330292
2018-04-18 20:28:26 +00:00
Alex Bradbury 792547b348 [RISCV] Add imm-cse.ll test case
This test case demonstrates that common subexpression elimination takes place 
between code sequences for materialising constants. In particular, it 
demonstrates that redundant lui aren't generated. This would capture a 
regression if applying a patch such as D41949.

llvm-svn: 330291
2018-04-18 20:25:07 +00:00
Lei Huang 829cd8e263 [NFC] test case clean up
1. remove redundant tests
2. update XForm_tests to generated expected code gen

llvm-svn: 330290
2018-04-18 20:22:26 +00:00
Tobias Grosser b20ae44ed0 [RuntimeDebugBuilder] Turn assert into an unreachable
llvm-svn: 330289
2018-04-18 20:18:43 +00:00
Alex Bradbury c0464d9271 [RISCV] Expand codegen -> compression sanity checks and move to a single file
The objdump tests interfere with update_llc_test_checks.py and can't be
automatically update them. Put the sanitify check for compression on the
codegen codepath into a separate file, and expand it to also include tests of
integer materialisation. This would catch changes such as those triggered by 
D41949.

llvm-svn: 330288
2018-04-18 20:17:29 +00:00
Craig Topper 04244cbf45 [X86] Fix the Uses/Defs,mayLoad,mayStore,hasSideEffects flags for the CMPXCHG instructions.
The compiler only emits the locked version of these which use different instruction definitions. The versions fixed here are only used by the assembler/disassembler.

llvm-svn: 330287
2018-04-18 20:15:00 +00:00
Yan Zhang 0313614f4d add extra acronyms for objc property names
Summary: This is to support general acronyms in Objective-C like 2G/3G/4G/... and coordinates X, Y, Z and W.

Reviewers: benhamilton

Reviewed By: benhamilton

Subscribers: klimek, cfe-commits

Differential Revision: https://reviews.llvm.org/D45750

llvm-svn: 330286
2018-04-18 20:09:10 +00:00
Tobias Grosser fcc3ad5d3c [ScopDetect / ScopInfo] Get statistics for scops without any loop correctly
Make sure we also counts scops not containing any loops.

llvm-svn: 330285
2018-04-18 20:03:36 +00:00
Fangrui Song 16fe49a951 [OPENMP] Fix -Wunused-lambda-capture. NFC
llvm-svn: 330284
2018-04-18 19:32:01 +00:00
Jonathan Peyton 1482db9e03 [OpenMP] Fix affinity API for KMP_AFFINITY=none|compact|scatter
Currently, the affinity API reports garbage for the initial place list and any
thread's place lists when using KMP_AFFINITY=none|compact|scatter.
This patch does two things:

for KMP_AFFINITY=none, Creates a one entry table for the places, this way, the
initial place list is just a single place with all the proc ids in it. We also
set the initial place of any thread to 0 instead of KMP_PLACE_ALL so that the
thread reports that single place (place 0) instead of garbage (-1) when using
the affinity API.

When non-OMP_PROC_BIND affinity is used
(including KMP_AFFINITY=compact|scatter), a thread's place list is populated
correctly. We assume that each thread is assigned to a single place. This is
implemented in two of the affinity API functions

Differential Revision: https://reviews.llvm.org/D45527

llvm-svn: 330283
2018-04-18 19:25:48 +00:00
Jonathan Peyton 27a677fc95 Introduce GOMP_taskloop API
This patch introduces GOMP_taskloop to our API. It adds GOMP_4.5 to our
version symbols. Being a wrapper around __kmpc_taskloop, the function
creates a task with the loop bounds properly nested in the shareds so that
the GOMP task thunk will work properly. Also, the firstprivate copy constructors
are properly handled using the __kmp_gomp_task_dup() auxiliary function.

Currently, only linear spawning of tasks is supported
for the GOMP_taskloop interface.

Differential Revision: https://reviews.llvm.org/D45327

llvm-svn: 330282
2018-04-18 19:23:54 +00:00
Alex Bradbury 099c720426 Revert "[RISCV] implement li pseudo instruction"
Reverts rL330224, while issues with the C extension and missed common
subexpression elimination opportunities are addressed. Neither of these issues
are visible in current RISC-V backend unit tests, which clearly need
expanding.

llvm-svn: 330281
2018-04-18 19:02:31 +00:00
Artem Belevich 5832eb4cfd [CUDA] added missing __ldg(const signed char *)
Differential Revision: https://reviews.llvm.org/D45780

llvm-svn: 330280
2018-04-18 18:33:43 +00:00
Yaxun Liu 9809db703a [HIP] Add driver input type for HIP
Patch by Greg Rodgers.
Revised by Yaxun Liu.

Differential Revision: https://reviews.llvm.org/D45489

llvm-svn: 330279
2018-04-18 18:25:03 +00:00
Lei Huang 192c6ccf6d [Power9]Legalize and emit code for converting Unsigned HWord/Char to Quad-Precision
Legalize and emit code for converting unsigned HWord/Char to QP:

xscvsdqp
xscvudqp

Only covering patterns for unsigned forms cause we don't have part-word
sign-extending integer loads into VSX registers.

Differential Revision: https://reviews.llvm.org/D45494

llvm-svn: 330278
2018-04-18 17:41:46 +00:00
Martin Storsjo 3a83c5c9f7 [MinGW] Try to fix asan testing after r330244
Twines shouldn't be stored as they can refer to temporaries.

llvm-svn: 330277
2018-04-18 17:34:29 +00:00
Amara Emerson 9de072f8ae [AArch64] Add isel pattern for v8i8->v2f32 NVCASTs.
rdar://39454635

llvm-svn: 330276
2018-04-18 17:10:19 +00:00
Jonas Devlieghere 1a928f3fc7 [LIT] Have lit run the lldb test suite
This is the first in what will hopefully become a series of patches to
replace the driver logic in dotest.py with LIT. The motivation for this
change is that there's no point in maintaining two driver
implementations. Since all of the LLVM projects are using lit, this is
the obvious choice.

Obviously the goal is maintain full compatibility with the functionality
offered by dotest. As such we won't be removing anything until that
point has been reached.

This patch is the initial attempt (referred to as v1) to run the lldb
test suite with lit. To do so we introduced a custom LLDB test format
that invokes dotest.py with a single test file.

Differential revision: https://reviews.llvm.org/D45333

llvm-svn: 330275
2018-04-18 17:08:49 +00:00
Alex Bradbury 75a4e52580 [RISCV] Add specific tests for materialising imm32hi20 constants
i.e. constants that can be materialised with a single lui, as the lower 12 
bits are zero.

llvm-svn: 330274
2018-04-18 16:43:03 +00:00
Lei Huang 198e678576 [Power9]Legalize and emit code for converting (Un)Signed Word to Quad-Precision
Legalize and emit code for converting (Un)Signed Word to quad-precision via:

xscvsdqp
xscvudqp

Differential Revision: https://reviews.llvm.org/D45389

llvm-svn: 330273
2018-04-18 16:34:22 +00:00
Alexey Bataev e36c67b35c [NVPTX] Emit debug info in DWARF-2 by default for Cuda devices.
Summary:
NVPTX target supports debug info in DWARF-2 format. Patch adds emission
of debug info in DWARF-2 by default.

Reviewers: tra, jlebar

Subscribers: aprantl, JDevlieghere, cfe-commits

Differential Revision: https://reviews.llvm.org/D42581

llvm-svn: 330272
2018-04-18 16:31:09 +00:00
Alexey Bataev 242706b8d1 [DEBUG] Initial adaptation of NVPTX target for debug info emission.
Summary:
Patch adds initial emission of the debug info for NVPTX target.
Currently, only .file and .loc directives are emitted, everything else is
commented out to not break the compilation of Cuda.

Reviewers: echristo, jlebar, tra, jholewinski

Subscribers: mgorny, aprantl, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D41827

llvm-svn: 330271
2018-04-18 16:13:41 +00:00
Alexey Bataev e372710d30 [OPENMP] Code cleanup and code improvements.
llvm-svn: 330270
2018-04-18 15:57:46 +00:00
Chandler Carruth ccd3ecb95a [x86] Switch EFLAGS copy lowering to use reg-reg form of testing for
a zero register.

Previously I tried this and saw LLVM unable to transform this to fold
with memory operands such as spill slot rematerialization. However, it
clearly works as shown in this patch. We turn these into `cmpb $0,
<mem>` when useful for folding a memory operand without issue. This form
has no disadvantage compared to `testb $-1, <mem>`. So overall, this is
likely no worse and may be slightly smaller in some cases due to the
`testb %reg, %reg` form.

Differential Revision: https://reviews.llvm.org/D45475

llvm-svn: 330269
2018-04-18 15:52:50 +00:00
Kostya Kortchinsky eaeb64a814 [sanitizer] Minor refactor of ThreadDescriptorSize
Summary:
While I was sifting through dead code findings, I stumbled on this function.

First, for `__s390__` it always returned 0 for the 1st call, which doesn't seem
right. 2nd call & beyond would return the correct value though.
Then it duplicated the `atomic_store` multiple times, sometimes with a `if`,
sometimes without. Finally it used a capitalized variable name starting with `k`
which indicates a constant, and it is not.

So:
- rename the static global variable;
- change the atomic functions to their relaxed version;
- move the store to the end, and make sure we return `val` all the time.

Reviewers: alekseyshl, eugenis, koriakin

Reviewed By: alekseyshl

Subscribers: kubamracek, delcypher, llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D45725

llvm-svn: 330268
2018-04-18 15:30:08 +00:00
Jonas Devlieghere 6adef09891 [llvm-mca] Use WithColor for printing errors
Use convenience helpers in WithColor to print errors and notes.

Differential revision: https://reviews.llvm.org/D45666

llvm-svn: 330267
2018-04-18 15:26:51 +00:00
Aaron Smith 02caafd7e5 [support] Revert the changes made to Path.inc for the default Windows code page
Path.inc/widenPath tries to decode the path using both UTF-8 and the default Windows code page.
This is no longer necessary with the new InitLLVM method which ensures that the command line
arguemnts are already UTF-8 on Windows.
 

llvm-svn: 330266
2018-04-18 15:26:26 +00:00
Pavel Labath 10831f594a Fix macosx build broken by r330249
It seems llc crashes when targetting darwin with split-dwarf (pr37164).
This happens on all inputs, not just the one I added in the above
commit. Work around the issue by hardcoding the target triple to linux,
which is what all split-dwarf tests seem to be doing.

As I don't know of a way to specify the os part of the triple without
spelling out the architecture as well, I move the new test to the X86
folder.

llvm-svn: 330265
2018-04-18 15:23:21 +00:00
Chandler Carruth 1f87618f8f [x86] Fix PR37100 by teaching the EFLAGS copy lowering to rewrite uses
across basic blocks in the limited cases where it is very straight
forward to do so.

This will also be useful for other places where we do some limited
EFLAGS propagation across CFG edges and need to handle copy rewrites
afterward. I think this is rapidly approaching the maximum we can and
should be doing here. Everything else begins to require either heroic
analysis to prove how to do PHI insertion manually, or somehow managing
arbitrary PHI-ing of EFLAGS with general PHI insertion. Neither of these
seem at all promising so if those cases come up, we'll almost certainly
need to rewrite the parts of LLVM that produce those patterns.

We do now require dominator trees in order to reliably diagnose patterns
that would require PHI nodes. This is a bit unfortunate but it seems
better than the completely mysterious crash we would get otherwise.

Differential Revision: https://reviews.llvm.org/D45673

llvm-svn: 330264
2018-04-18 15:13:16 +00:00
Simon Pilgrim 656444bf33 [llvm-exegesis] Early out if the scheduler models have no extra info.
We were calling getExtraProcessorInfo() without checking hasExtraProcessorInfo(), resulting in an assertion.

llvm-svn: 330263
2018-04-18 14:46:54 +00:00
Jonas Devlieghere e46b7565bb [llvm-profdata] Use WithColor for printing errors
Use convenience helpers in WithColor to print errors and warnings.

Differential revision: https://reviews.llvm.org/D45658

llvm-svn: 330262
2018-04-18 14:42:33 +00:00
Jonas Devlieghere fef7adae1d [llvm-link] Use WithColor for printing errors
Use convenience helpers in WithColor to print errors and warnings.

Differential revision: https://reviews.llvm.org/D45667

llvm-svn: 330261
2018-04-18 14:41:47 +00:00
Simon Pilgrim 01e8c4e8c1 [llvm-exegesis] Use LLVMTargetMachine pointer everywhere. NFCI.
Avoid calling the unique_ptr multiple times.

llvm-svn: 330260
2018-04-18 14:22:33 +00:00
Sanjay Patel b2ab3f28d5 [SimplifyLibcalls] Realloc(null, N) -> Malloc(N)
Patch by Dávid Bolvanský!

Differential Revision: https://reviews.llvm.org/D45413

llvm-svn: 330259
2018-04-18 14:21:31 +00:00
Simon Pilgrim dcfa908b51 [llvm-exegesis] Put a newline at the end of each error report.
Makes multiple error messages much easier to read. 

llvm-svn: 330258
2018-04-18 13:58:41 +00:00
David Stuttard 31f482c26b [AMDGPU] Fix issues for backend divergence tracking
Summary:
A change to use divergence analysis in the AMDGPU backend was getting formal
arguments incorrect (not tagged as divergent) unless they were VGPR0, VGPR1 or
VGPR2

For graphics shaders it is possible to have more than these passed in as VGPR

Modified the checking code to check for any VGPR registers passed in as formal
arguments.

Also, some intrinsics that are sources of divergence may have been lowered
during instruction selection and are missed on subsequent calls to
isSDNodeSourceOfDivergence - added the relevant AMDGPUISD checks as well.

Finally, the FunctionLoweringInfo tracks virtual registers that are live across
basic block boundaries. This is used to check for divergence of CopyFromRegister
registers using the DivergenceAnalysis analysis. For multiple blocks the lazily
evaluated inverted map VirtReg2Value was not cleared when the ValueMap map was.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D45372

Change-Id: I112f3bd6dfe0f62e63ce9b43b893982778e4bee3
llvm-svn: 330257
2018-04-18 13:53:31 +00:00
Sam Parker 3c19051bf0 [IRCE] Only check for NSW on equality predicates
After investigation discussed in D45439, it would seem that the nsw
flag restriction is unnecessary in most cases. So the IsInductionVar
lambda has been removed, the functionality extracted, and now only
require nsw when using eq/ne predicates.

Differential Revision: https://reviews.llvm.org/D45617

llvm-svn: 330256
2018-04-18 13:50:28 +00:00
Simon Pilgrim 715596df1f [llvm-exegesis] Pull out LLVMTargetMachine to simplify debugging. NFCI.
Has been useful while trying to get around all the error reporting issues mentioned on PR37049.

llvm-svn: 330255
2018-04-18 13:39:03 +00:00
Jan Korous 536d2e3072 [Sema] Disable built-in increment operator for bool in overload resolution in C++17
Following: https://llvm.org/svn/llvm-project/cfe/trunk@329804

For C++17 the wording of [over.built] p4 excluded bool:

For every pair (T , vq), where T is an arithmetic type other than bool, there exist
candidate operator functions of the form
  vq T & operator++(vq T &);
  T operator++(vq T &, int);

Differential Revision: https://reviews.llvm.org/D45569

llvm-svn: 330254
2018-04-18 13:38:39 +00:00
Momchil Velikov d501a609c4 Add tests for shrink wrapping and VLAs
Differential revision: https://reviews.llvm.org/D45727

llvm-svn: 330253
2018-04-18 13:37:12 +00:00
Teresa Johnson b214af26b3 [gold] Add support for optimization remarks
Summary:
Adds support for LTO opt remarks (optionally with hotness) to
gold-plugin.

Reviewers: anemet

Subscribers: fhahn, mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D45752

llvm-svn: 330252
2018-04-18 13:25:23 +00:00