Commit Graph

401858 Commits

Author SHA1 Message Date
Roman Lebedev 18eef13dad
[X86][Costmodel] Fix `X86TTIImpl::getGSScalarCost()`
`X86TTIImpl::getGSScalarCost()` has (at least) two issues:
* it naively computes the cost of sequence of `insertelement`/`extractelement`.
  If we are operating not on the XMM (but YMM/ZMM),
  this widely overestimates the cost of subvector insertions/extractions.
* Gather/scatter takes a vector of pointers, and scalarization results in us performing
  scalar memory operation for each of these pointers, but we never account for the cost
  of extracting these pointers out of the vector of pointers.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111222
2021-10-13 22:35:39 +03:00
Vitaly Buka 43bae7ae26 [sanitizer] Add trivial StackDepot benchmark 2021-10-13 12:03:13 -07:00
Yaxun (Sam) Liu 1439df00fc [HIP] Fix test rcom-detect.hip
This patches fixes https://bugs.llvm.org/show_bug.cgi?id=51404

Some builds use custom resource directory for clang, therefore the test
cannot assume default resource directory for clang. Use -resource-dir
to force it.

Differential Revision: https://reviews.llvm.org/D111726
2021-10-13 15:01:07 -04:00
Craig Topper d2e6f471b0 [Builtins] Remove stale comment. NFC
The header name was made a separate string more than 12.5 years ago.
I think it was part of the attribute string for less than a week.
2021-10-13 11:47:13 -07:00
Nico Weber 1bef22950a [clang] Delete unused class DiagsUninitializedSeveretyRAII 2021-10-13 14:27:26 -04:00
Sjoerd Meijer 67a58fa3a6 [FuncSpec] Don't run the solver if there's nothing to do
Even if there are no interesting functions, the SCCP solver would still run
before bailing. Now bail earlier, avoid running the solver for nothing.

Differential Revision: https://reviews.llvm.org/D111645
2021-10-13 19:05:19 +01:00
AndreyChurbanov 621d7a75b1 [OpenMP] libomp: add atomic functions for new OpenMP 5.1 atomics.
Added functions those implement "atomic compare".
Though clang does not use library interfaces to implement OpenMP atomics,
the functions added for consistency.
Also added missed functions for 80-bit floating min/max atomics.

Differential Revision: https://reviews.llvm.org/D110109
2021-10-13 21:02:18 +03:00
Noah Shutty 2de43d4202 [CMake] Add optional libCURL dependency to llvm build configuration
This finds the curl libraries if LLVM_ENABLE_CURL is set. This is needed
to implement the debuginfod client library in LLVM.

Patch By: noajshu

Differential Revision: https://reviews.llvm.org/D111238
2021-10-13 10:58:10 -07:00
AndreyChurbanov 6e98ec9b20 [OpenMP] libomp: fix ittnotify usage.
Replaced storing of ittnotify domain array index into
location info structure (which is now read-only) with storing of
(location info address + ittnotify domain + team size) into hash map.
Replaced __kmp_itt_barrier_domains and __kmp_itt_imbalance_domains arrays with
__kmp_itt_barrier_domains hash map; __kmp_itt_region_domains and
__kmp_itt_region_team_size arrays with __kmp_itt_region_domains hash map.
Basic functionality did not change (at least tried to not change).

The patch fixes https://bugs.llvm.org/show_bug.cgi?id=48644.

Differential Revision: https://reviews.llvm.org/D111580
2021-10-13 20:49:05 +03:00
Arthur Eubanks 3628bb7436 Make various assume bundle data structures use uint64_t
Following D110451, we need to make sure to support 64 bit values.
2021-10-13 10:38:41 -07:00
Aart Bik a652e5b53a [mlir][sparse] emergency fix after constant -> arith.constant change
Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D111743
2021-10-13 10:26:17 -07:00
Lang Hames 92bec0e970 [llvm-jitlink] Don't use thread pool task dispatch when LLVM_ENABLE_THREADS=Off
This should fix compile errors in llvm-jitlink.cpp in LLVM_ENABLE_THREADS=Off
builds due to f341161689.
2021-10-13 10:19:55 -07:00
AndreyChurbanov 5e58b63b28 [OpenMP] libomp: fix warning on comparison of integer expressions of different signedness
Replaced macro with global variable of correspondent type.

Differential Revision: https://reviews.llvm.org/D111562
2021-10-13 20:11:47 +03:00
Joe Nash b44eac1b85 [AMDGPU] Remove unneeded emit literal check
NFC. This check does not verify any functional property since size 8
was added. Remove it for simplicity.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D111737

Change-Id: Ifd7cbd324a137f939d8dc04acb8fbd54c9527a42
2021-10-13 12:46:22 -04:00
Kai Nacke 0a950a2e94 [SystemZ/z/OS] Implement save of non-volatile registers on z/OS XPLINK
This PR implements the save of the XPLINK callee-saved registers
on z/OS.

Reviewed By: uweigand, Kai

Differential Revision: https://reviews.llvm.org/D111653
2021-10-13 12:57:57 -04:00
Aart Bik 35517a251d [mlir][sparse] add init sparse tensor operation
This is the first step towards supporting general sparse tensors as output
of operations. The init sparse tensor is used to materialize an empty sparse
tensor of given shape and sparsity into a subsequent computation (similar to
the dense tensor init operation counterpart).

Example:
  %c = sparse_tensor.init %d1, %d2 : tensor<?x?xf32, #SparseMatrix>
  %0 = linalg.matmul
    ins(%a, %b: tensor<?x?xf32>, tensor<?x?xf32>)
    outs(%c: tensor<?x?xf32, #SparseMatrix>) -> tensor<?x?xf32, #SparseMatrix>

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D111684
2021-10-13 09:47:56 -07:00
Stella Stamenova 58917054c2 [lldb] Skip several lldb tests that are flaky on Windows
These tests fail every 10 or so runs on Windows causing both local failures as well as buildbot failures.

Differential Revision: https://reviews.llvm.org/D111659
2021-10-13 09:46:41 -07:00
Mike Rice fb4c451001 [OPENMP51]Initial parsing/sema for adjust_args clause for 'declare variant'
Adds initial parsing and sema for the 'adjust_args' clause.

Note that an AST clause is not created as it instead adds its expressions
to the OMPDeclareVariantAttr.

Differential Revision: https://reviews.llvm.org/D99905
2021-10-13 09:34:09 -07:00
liuke ea72b55b5c bugprone-argument-comment: SourceLocation valid judgment avoid emitting coredump in isInSystemHeader
If the Node has an invalid location, it will trigger assert in
isInSystemHeader(...).

void test() {
  __builtin_va_list __args;
  // __builtin_va_list has no defination in any source file and its
  // CXXConstructorDecl has invalid sourcelocation
}
coredump with "Assertion `Loc.isValid() && "Can't get file
characteristic of invalid loc!"' failed." in
getFileCharacteristic(SourceLocation).
2021-10-13 12:31:02 -04:00
Philip Reames 24c9016574 [instcombine] propagate single use freeze(gep inbounds X)
This is a follow on for D111675 which implements the gep case. I'd originally left it out because I was hoping to actually implement the inrange todo, but after a bit of staring at the code, decided to leave it as is since it doesn't effect this use case (i.e. instcombine requires the op to freeze to be an instruction).

Differential Revision: https://reviews.llvm.org/D111691
2021-10-13 09:25:00 -07:00
Florian Hahn 4cd6cc64ed [SCEV] Add test for propagating poison through select condition.
Precommit a test for D111643.
2021-10-13 17:14:35 +01:00
Jay Foad c885857e9d [AMDGPU] Enable load clustering in the post-RA scheduler
This has a couple of benefits:
1. It can sometimes fix clusters that got broken apart when the register
   allocator inserted a copy.
2. Post-RA scheduling does not have to worry about increasing register
   pressure, which in some cases gives it more freedom to reorder
   instructions.

Testing on a collection of 10,000 graphics shaders compiled for gfx1010
showed:
- The average length of each run of one or more load instructions
  increased by about 1%.
- The number of runs of two or more load instructions increased by
  about 4%.

Differential Revision: https://reviews.llvm.org/D111646
2021-10-13 17:12:26 +01:00
Jan Svoboda 08c8016cfb [clang][modules] Cache loads of modules imported by PCH
During explicit modular build, PCM files are typically specified via the `-fmodule-file=<path>` command-line option. Early during the compilation, Clang uses the `ASTReader` to read their contents and caches the result so that the module isn't loaded implicitly later on. A listener is attached to the `ASTReader` to collect names of the modules read from the PCM files. However, if the PCM has already been loaded previously via PCH:
1. the `ASTReader` doesn't do anything for the second time,
2. the listener is not invoked at all,
3. the module load result is not cached,
4. the compilation fails when attempting to load the module implicitly later on.

This patch solves this problem by attaching the listener to the `ASTReader` for PCH reading as well.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D111560
2021-10-13 18:09:52 +02:00
Jan Svoboda aae776a534 [clang] NFC: Move class to make it reusable
This is a prep patch for D111560.
2021-10-13 18:09:52 +02:00
xndcn 8c1553f0d7 [mlir][spirv] Add memory semantics verify for atomic operations
Differential Revision: https://reviews.llvm.org/D111510
2021-10-14 00:00:55 +08:00
Valentin Clement b2169992aa
[fir][NFC] Add disclaimer to affine promotion/demotion passes
AffinePromotion and AffineDemotion passes where upstreamed
in their current status from fir-dev. In order to make sure everybody
is on the same page, this patch add some comments to state that.

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D111629
2021-10-13 17:47:14 +02:00
Alex Zinenko 2b55e14384 [mlir] fix python bindings cmake 2021-10-13 17:29:45 +02:00
Raphael Isemann 4019699fa5 [lldb] Add a test for CRTP 2021-10-13 17:15:02 +02:00
Alex Zinenko 7fd6f40dbd [mlir][python] Add custom constructor for memref load
The type can be inferred trivially, but it is currently done as string
stitching between ODS and C++ and is not easily exposed to Python.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D111712
2021-10-13 17:11:02 +02:00
thomasraoux cc83c2444f [mlir][vector] Add canonicalization extract + splat
Make canonicalization working on broadcast also work on splat op.

Differential Revision: https://reviews.llvm.org/D111690
2021-10-13 08:08:46 -07:00
Jeremy Morse fbf269c71e [DebugInfo][InstrRef] Only calculate IDF for reg units
In D110173 we start using the existing LLVM IDF calculator to place PHIs as
we reconstruct an SSA form of machine-code program. Sadly that's slower
than the old (but broken) way, this patch attempts to recover some of that
performance.

The key observation: every time we def a register, we also have to def it's
register units. If we def'd $rax, in the current implementation we
independently calculate PHI locations for {al, ah, ax, eax, hax, rax}, and
they will all have the same PHI positions. Instead of doing that, we can
calculate the PHI positions for {al, ah} and place PHIs for any aliasing
registers in the same positions. Any def of a super-register has to def
the unit, and vice versa, so this is sound. It cuts down the SSA placement
we need to do significantly.

This doesn't work for stack slots, or registers we only ever read, so place
PHIs normally for those. LiveDebugValues choses to ignore writes to SP at
calls, and now have to ignore writes to SP register units too.

Differential Revision: https://reviews.llvm.org/D111627
2021-10-13 16:08:18 +01:00
LLVM GN Syncbot 8a9faef30e [gn build] Port dd71b65ca8 2021-10-13 14:58:13 +00:00
Michael Kruse dd71b65ca8 [llvm-reduce] Introduce operands-to-args pass.
Instead of setting operands to undef as the "operands" pass does,
convert the operands to a function argument. This avoids having to
introduce undef values into the IR which have some unpredictability
during optimizations.

For instance,

    define void @func() {
    entry:
      %val = add i32 32, 21
      store i32 %val, i32* null
      ret void
    }

is reduced to

    define void @func(i32 %val) {
    entry:
      %val1 = add i32 32, 21
      store i32 %val, i32* null
      ret void
    }

(note that the instruction %val is renamed to %val1 when printing
the IR to avoid ambiguity; ideally %val1 would be removed by dce or the
instruction reduction pass)

Any call to @func is replaced with a call to the function with the
new signature and filled with undef. This is not ideal for IPA passes,
but those out-of-scope for now.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D111503
2021-10-13 09:54:03 -05:00
Sanjay Patel 02928fcb8c [InstCombine] improve code comments; NFC 2021-10-13 10:40:44 -04:00
Kamau Bridgeman 89ec99c778 [PowerPC][Builtin] Allowing __rlwnm to accept a variable as a shift parameter
The builtin __rlwnm is currently constrained to accept only constants
for the shift parameter but the instructions emitted for it have no such
constraint, this patch allows the builtins to accept variable shift.

Reviewed By: NeHuang, amyk

Differential Revision: https://reviews.llvm.org/D111229
2021-10-13 09:40:06 -05:00
Sanjay Patel 905d170803 [InstCombine] allow matching vector splat constants in foldLogOpOfMaskedICmps()
This is NFC-intended for scalar code. There are still unnecessary
m_ConstantInt restrictions in surrounding code, so this is not a
complete fix.

This prevents regressions seen with a planned follow-on to D111410.
2021-10-13 10:15:26 -04:00
Sanjay Patel d67022fba9 [InstCombine] add vector splat tests for foldLogOpOfMaskedICmps(); NFC
There's a substantial pile of scalar tests for transforms that
depend on this code, but zero vector coverage. This patch adds
a vector test next to the first scalar test in each file that
is affected by foldLogOpOfMaskedICmps.

The code that handles these transforms is artificially limited
from working with vector splat constants.
2021-10-13 09:53:59 -04:00
Raphael Isemann 0648b3c026 [lldb][NFC] for-range loop when iterating over delayed_properties 2021-10-13 15:27:23 +02:00
Alex Zinenko 90a6c3c2e4 [mlir] Fix typos in the Python bindings doc 2021-10-13 14:40:49 +02:00
Alex Zinenko 78f2dae00d [mlir][python] Provide some methods and properties for API completeness
When writing the user-facing documentation, I noticed several inconsistencies
and asymmetries in the Python API we provide. Fix them by adding:

- the `owner` property to regions, similarly to blocks;
- the `isinstance` method to any class derived from `PyConcreteAttr`,
  `PyConcreteValue` and `PyConreteAffineExpr`, similar to `PyConcreteType` to
  enable `isa`-like calls without having to handle exceptions;
- a mechanism to create the first block in the region as we could only create
  blocks relative to other blocks, with is impossible in an empty region.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D111556
2021-10-13 14:30:55 +02:00
Jeremy Morse e845ca2ff1 Follow up a3936a6c19 to work around an old compiler bug
Old versions of gcc want template specialisations to happen within the
namespace where the template lives; this is still present in gcc 5.1, which
we officially support, so it has to be worked around.
2021-10-13 13:27:25 +01:00
Louis Dionne d1e0f02e0b [libc++abi][ci] Add a from-scratch config for libc++abi on Apple/system
I came across an issue where since we build the library for Apple with
the install name directory being /usr/lib, which means that if we don't
run the tests with DYLD_LIBRARY_PATH, we'll end up loading the
system-provided libc++abi when running the tests. That wreaks havoc.

Instead of fixing it in the legacy config file, this commit introduces
an Apple libc++abi config file that does the right thing.

Differential Revision: https://reviews.llvm.org/D111279
2021-10-13 08:07:40 -04:00
Louis Dionne df3de7647e [libc++abi] Change LIBCXXABI_NO_TIMER to LIBCXXABI_USE_TIMER
Instead of always defining LIBCXXABI_NO_TIMER to run the tests, only
define LIBCXXABI_USE_TIMER when we want to enable the timer. This makes
the libc++abi testing configuration simpler.

As a fly-by fix, remove the unused LIBUNWIND_NO_TIMER macro from libunwind.

Differential Revision: https://reviews.llvm.org/D111667
2021-10-13 08:02:31 -04:00
Jeremy Morse a3936a6c19 [DebugInfo][InstrRef] Use PHI placement utilities for machine locations
InstrRefBasedLDV used to try and determine which values are in which
registers using a lattice approach; however this is hard to understand, and
broken in various ways. This patch replaces that approach with a standard
SSA approach using existing LLVM utilities. PHIs are placed at dominance
frontiers; value propagation then eliminates un-necessary PHIs.

This patch also adds a bunch of unit tests that should cover many of the
weirder forms of control flow.

Differential Revision: https://reviews.llvm.org/D110173
2021-10-13 12:49:04 +01:00
Hsiangkai Wang 5158cfef8b [RISCV] After reverting _mt builtins, add `ta` argument for LLVM IR.
Previous patch only reverts C builtins for tail policy. In order to keep
LLVM IR intact, add the `ta` argument in vector builtins.
2021-10-13 19:41:49 +08:00
Hsiangkai Wang 7ccd31c900 Revert "[RISCV] (2/2) Add the tail policy argument to builtins/intrinsics."
This reverts commit 7afa61e718.
2021-10-13 19:41:48 +08:00
Nathan Sidwell b8ff780f20 [clang][NFC] Correct doc markup
Spotted when implementing an extension.
2021-10-13 04:20:15 -07:00
Adam Czachorowski fba563e92b [clangd] TargetFinder: Fix assert-crash on TemplateExpansion args.
Previously we would call getAsTemplate() when kind == TemplateExpansion,
which triggers an assertion. The call is now replaced with
getAsTemplateOrTemplatePattern(), which is exactly the same as
getAsTemplate(), except it allows calls when kind == TemplateExpansion.

No change in behavior for no-assert builds.

Differential Revision: https://reviews.llvm.org/D111648
2021-10-13 13:15:36 +02:00
Raphael Isemann 7103753733 [lldb][NFC] Split out DW_TAG_inheritance parsing into own function
Just moving that block inside DWARFASTParserClang::ParseChildMembers into
its own function. Also early-exiting instead of a large if when
num_attributes is 0.
2021-10-13 13:14:57 +02:00
Nathan Sidwell d45526e6c3 [doc][clang] correct version for p0388 implementation
The p0388 patch series took so long, the clang version was incorrect,
and I failed to realize that.
2021-10-13 04:12:07 -07:00