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Author SHA1 Message Date
Simon Atanasyan 242c5a70d4 [Mips][Codegen] Fix fast-isel mixing of FGR64 and AFGR64 registers 
Fast-isel was picking AFGR64 register class for processing call
arguments when +fp64 options was used. We simply check is option +fp64
is used and pick appropriate register.

Patch by Mirko Brkusanin.

Differential Revision: https://reviews.llvm.org/D65886

llvm-svn: 368433
 2019-08-09 12:02:32 +00:00