5 Commits

Author	SHA1	Message	Date
Scott Douglass	69bf1ce03a	[ARM] Handle commutativity when converting to tADDhirr in Thumb2 ... Also, run thumb_rewrite.s tests in Thumb2 now that they pass. Differential Revision: http://reviews.llvm.org/D11132 llvm-svn: 242036	2015-07-13 15:31:48 +00:00
Scott Douglass	8143bc25ee	[ARM] Thumb1 3 to 2 operand convertion for commutative operations ... Differential Revision: http://reviews.llvm.org/D11057 llvm-svn: 241802	2015-07-09 14:13:55 +00:00
Scott Douglass	2740a63725	[ARM] Don't be overzealous converting Thumb1 3 to 2 operands ... Differential Revision: http://reviews.llvm.org/D11056 llvm-svn: 241801	2015-07-09 14:13:48 +00:00
Scott Douglass	8c7803f4c1	[ARM] Refactor converting Thumb1 from 3 to 2 operand (nfc) ... Also adds some test cases. Differential Revision: http://reviews.llvm.org/D11054 llvm-svn: 241799	2015-07-09 14:13:34 +00:00
Renato Golin	36c626e33f	Elide repeated register operand in Thumb1 instructions ... This patch makes the ARM backend transform 3 operand instructions such as 'adds/subs' to the 2 operand version of the same instruction if the first two register operands are the same. Example: 'adds r0, r0, #1' will is transformed to 'adds r0, #1'. Currently for some instructions such as 'adds' if you try to assemble 'adds r0, r0, #8' for thumb v6m the assembler would throw an error message because the immediate cannot be encoded using 3 bits. The backend should be smart enough to transform the instruction to 'adds r0, #8', which allows for larger immediate constants. Patch by Ranjeet Singh. llvm-svn: 218521	2014-09-26 16:14:29 +00:00