1fe76c385b
turn some templated inline functions into static functions.
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llvm-svn: 77873
2009-08-02 04:52:00 +00:00
fb53861ee0
remove the dead ELFTargetAsmInfo.h/cpp file. TargetAsmInfo
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defaults to being ELF.
llvm-svn: 77866
2009-08-02 04:33:09 +00:00
b25afe081c
remove TargetAsmInfo::TM, which is now dead. The basic TAI class now
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no longer depends on TM!
llvm-svn: 77863
2009-08-02 04:27:24 +00:00
4e7dfafc03
convert ctors/dtors section to be in TLOF instead of
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TAI.
llvm-svn: 77842
2009-08-02 00:34:36 +00:00
b2bbb61f33
REmove dead fields of TAI.
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llvm-svn: 77820
2009-08-01 22:40:22 +00:00
e64f48ba8b
Workaround a couple of Darwin assembler bugs.
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llvm-svn: 77781
2009-08-01 06:13:52 +00:00
e6e8289d72
Split t2MOVCCs since some assemblers do not recognize mov shifted register alias with predicate.
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llvm-svn: 77764
2009-08-01 01:43:45 +00:00
6ab54fdb0a
Fix Thumb2 function call isel. Thumb1 and Thumb2 should share the same
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instructions for calls since BL and BLX are always 32-bit long and BX is always
16-bit long.
Also, we should be using BLX to call external function stubs.
llvm-svn: 77756
2009-08-01 00:16:10 +00:00
95d6325859
t2BR_JT is mov pc, it's 2 byte long, not 4.
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llvm-svn: 77744
2009-07-31 22:22:22 +00:00
9eb3f88048
Thumb2 movcc need .w suffix.
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llvm-svn: 77743
2009-07-31 22:21:55 +00:00
4d2c0f9008
switch off of 'Section' onto MCSection. We're not properly using
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MCSection subclasses yet, but this is a step in the right direction.
llvm-svn: 77708
2009-07-31 18:48:30 +00:00
be8422e8e0
Until we have a "ALIGN" pseudo instruction, have asm printer emitted a .align
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to ensure the instruction that follows a TBB (when the number of table entries
is odd) is 2-byte aligned.
Patch by Sandeep Patel.
llvm-svn: 77705
2009-07-31 18:35:56 +00:00
f6d0fa3d33
- Teach TBB / TBH offset limits are 510 and 131070 respectively since the offset
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is scaled by two.
- Teach GetInstSizeInBytes about TBB and TBH.
llvm-svn: 77701
2009-07-31 18:28:05 +00:00
51d5b43cda
refactor section construction in TLOF to be through an explicit
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initialize method, which can be called when an MCContext is available.
llvm-svn: 77687
2009-07-31 17:42:42 +00:00
5811ab5cf3
When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot.
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llvm-svn: 77642
2009-07-30 23:29:25 +00:00
5aae45fb6f
Remove redundant match for frame index from imm8 addrmode, it is handled by the imm12 addrmode.
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llvm-svn: 77632
2009-07-30 22:45:52 +00:00
0bfc8312c2
Darwin assembler now recognizes "orn", so remove workaround.
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llvm-svn: 77627
2009-07-30 21:51:41 +00:00
ce774e2383
Darwin assembler now supports "rrx", so remove workaround.
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llvm-svn: 77625
2009-07-30 21:38:40 +00:00
79c079b478
Cleanup and include code selection for some frame index cases.
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llvm-svn: 77622
2009-07-30 18:56:48 +00:00
cab137d294
Add missing D* register clobbers for Thumb-2 call.
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llvm-svn: 77611
2009-07-30 18:01:09 +00:00
c667b60b93
add a random codegen deficiency.
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llvm-svn: 77598
2009-07-30 16:08:58 +00:00
6afdc5e694
Switch obvious clients to Twine instead of utostr (when they were already using
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a Twine, e.g., for names).
- I am a little ambivalent about this; we don't want the string conversion of
utostr, but using overload '+' mixed with string and integer arguments is
sketchy. On the other hand, this particular usage is something of an idiom.
llvm-svn: 77579
2009-07-30 04:20:37 +00:00
0dbdec8042
Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs.
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llvm-svn: 77557
2009-07-30 00:31:25 +00:00
e3493a91cc
tbb / tbh instructions only branch forward, not backwards.
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llvm-svn: 77522
2009-07-29 23:20:20 +00:00
1f58eed638
Add VFP3 D registers to the DPR register class.
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llvm-svn: 77521
2009-07-29 23:03:41 +00:00
175bd14967
Make sure Thumb2 uses the right call instructions.
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llvm-svn: 77507
2009-07-29 21:26:42 +00:00
ee68a483ec
Give getPointerRegClass() a "kind" value so that targets can
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support multiple different pointer register classes.
llvm-svn: 77501
2009-07-29 20:31:52 +00:00
0d98d8b8b3
- Fix an obvious copy and paste error.
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- Darwin Thumb2 call clobbers r9.
llvm-svn: 77500
2009-07-29 20:10:36 +00:00
cf19885a32
Change Neon VLDn intrinsics to return multiple values instead of really
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wide vectors. Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct. Adjust tests accordingly.
llvm-svn: 77468
2009-07-29 16:39:22 +00:00
5034329f8d
pass the mangler down into the various SectionForGlobal methods.
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No functionality change.
llvm-svn: 77432
2009-07-29 05:09:30 +00:00
c6d70ae063
Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte / halfword.
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llvm-svn: 77422
2009-07-29 02:18:14 +00:00
0830980141
Thumb-2: fix typo that caused incorrect stack elimination for VFP operations and very large stack frames.
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llvm-svn: 77401
2009-07-28 23:52:33 +00:00
a4f43fb5dd
Rename MDNode.h header. It defines MDnode and other metadata classes.
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New name is Metadata.h.
llvm-svn: 77370
2009-07-28 21:49:47 +00:00
c8bed03349
In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is until more optimization goes in).
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llvm-svn: 77364
2009-07-28 20:53:24 +00:00
68bb69d6e3
Remove support for ORN to workaround <rdar://problem/7096522>.
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llvm-svn: 77363
2009-07-28 20:51:25 +00:00
d6b4b29706
more simplifications and cleanup. :)
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llvm-svn: 77350
2009-07-28 18:48:43 +00:00
865c6298d7
Add workaround for <rdar://problem/7098328>.
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llvm-svn: 77340
2009-07-28 18:15:38 +00:00
a3242e93b7
the apple "ld_classic" linker doesn't support .literal16 in 32-bit
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mode, and "ld64" (the default linker) falls back to it in -static
mode.
llvm-svn: 77334
2009-07-28 17:50:28 +00:00
e82862e24e
Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag.
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llvm-svn: 77329
2009-07-28 17:06:49 +00:00
12da273f90
tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
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llvm-svn: 77305
2009-07-28 07:38:35 +00:00
73a5119675
Code clean up. No functionality changes.
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llvm-svn: 77301
2009-07-28 06:24:12 +00:00
780748d565
- More refactoring. This gets rid of all of the getOpcode calls.
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- This change also makes it possible to switch between ARM / Thumb on a
per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.
llvm-svn: 77300
2009-07-28 05:48:47 +00:00
5e693ed07b
Rip all of the global variable lowering logic out of TargetAsmInfo. Since
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it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.
Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.
This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.
llvm-svn: 77294
2009-07-28 03:13:23 +00:00
57b51d9f82
ORN does not require (and can not have) the ".w" suffix. "Orthogonality" is a dirty word at ARM.
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llvm-svn: 77275
2009-07-27 23:34:12 +00:00
e5b969f6a6
Remove TPat. No patterns depend on just isThumb(). Must use either T1Pat (isThumb1Only()) or T2Pat (is Thumb2).
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llvm-svn: 77242
2009-07-27 19:59:26 +00:00
375a01c34a
remove dead code.
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llvm-svn: 77233
2009-07-27 19:00:33 +00:00
38b7eee164
More DCE.
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llvm-svn: 77231
2009-07-27 18:48:45 +00:00
0e075e2429
convertToThreeAddress can't handle Thumb2 instructions (which don't have same address mode as ARM instructions).
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llvm-svn: 77230
2009-07-27 18:44:00 +00:00
18688f431d
Get rid of more dead code.
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llvm-svn: 77227
2009-07-27 18:38:54 +00:00
239ed4b343
Cosmetic change.
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llvm-svn: 77222
2009-07-27 18:31:40 +00:00
Chris Lattner