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103433 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen ca26e0acbb Use InterferenceCache in RegAllocGreedy. 
llvm-svn: 128765
 2011-04-02 06:03:38 +00:00
Jakob Stoklund Olesen 91cbcaf957 Add an InterferenceCache class for caching per-block interference ranges. 
When the greedy register allocator is splitting multiple global live ranges, it
tends to look at the same interference data many times. The InterferenceCache
class caches queries for unaltered LiveIntervalUnions.

llvm-svn: 128764
 2011-04-02 06:03:35 +00:00
Jakob Stoklund Olesen 36171288ce Use basic block numbers as indexes when mapping slot index ranges. 
This is more compact and faster than using DenseMap.

llvm-svn: 128763
 2011-04-02 06:03:31 +00:00
Zhongxing Xu af2371e368 Remove a redundant method. We have a const version. 
llvm-svn: 128762
 2011-04-02 03:20:45 +00:00
Ted Kremenek 8f89f7c893 Teach IdempotentOperationsChecker about paths aborted because ExprEngine didn't know how to handle a specific Expr type. 
llvm-svn: 128761
 2011-04-02 02:56:23 +00:00
Ted Kremenek c703a666f7 static analyzer: Rename 'BlocksAborted' to 'BlocksExhausted' to reflect that a given CFGBlock was analyzed too many times. 
llvm-svn: 128760
 2011-04-02 02:56:17 +00:00
Cameron Zwarich 6fe5c29430 Do some peephole optimizations to remove pointless VMOVs from Neon to integer 
registers that arise from argument shuffling with the soft float ABI. These
instructions are particularly slow on Cortex A8. This fixes one half of
<rdar://problem/8674845>.

llvm-svn: 128759
 2011-04-02 02:40:43 +00:00
Cameron Zwarich 8c7bbc09e2 Add a RemoveFromWorklist method to DCI. This is needed to do some complicated 
transformations in target-specific DAG combines without causing DAGCombiner to
delete the same node twice. If you know of a better way to avoid this (see my
next patch for an example), please let me know.

llvm-svn: 128758
 2011-04-02 02:40:26 +00:00
Johnny Chen 8904cc49db Fixed a bug in disassembly of STR_POST, where the immediate is the second operand in am2offset; 
instead of the second operand in addrmode_imm12.

rdar://problem/9225289

llvm-svn: 128757
 2011-04-02 02:24:54 +00:00
Ken Dyck 6b20919317 Convert BaseOffset::NonVirtualOffset to CharUnits. No change in 
functionality intended.

llvm-svn: 128756
 2011-04-02 01:32:03 +00:00
Johnny Chen 511e8c0d36 Add a Python script which launches a program from within lldb and loop until the 
process stops for some reason.  main.c (compiled into a.out) is used as an example in
the README-run-until-faulted file.

llvm-svn: 128755
 2011-04-02 01:20:28 +00:00
Ken Dyck 872d74a591 Convert offset parameters and return values of VTableComponent methods to 
CharUnits. No change in functionality intended.

llvm-svn: 128754
 2011-04-02 01:14:48 +00:00
Ken Dyck 496906629b Convert the offsets in VCallOffsetMap to CharUnits. No change in 
functionality intended.

llvm-svn: 128753
 2011-04-02 00:51:15 +00:00
Ken Dyck eff7fe645b Convert offset parameters of VTableBuilder::IsOverriderUsed() to CharUnits. 
No change in functionality intended.

llvm-svn: 128752
 2011-04-02 00:44:58 +00:00
Akira Hatanaka 4111db6575 Undo changes mistakenly made in revision 128750. 
llvm-svn: 128751
 2011-04-02 00:26:12 +00:00
Akira Hatanaka 977f555a76 Insert space before ';' to prevent warnings. 
llvm-svn: 128750
 2011-04-02 00:15:58 +00:00
Johnny Chen 387b36eaae Fixed MOVr for "should be" encoding bits for Inst{19-16} = 0b0000. 
rdar://problem/9224276

llvm-svn: 128749
 2011-04-01 23:30:25 +00:00
Johnny Chen 6615fa1de0 MOVs should have Inst{19-16} as 0b0000, otherwise, the instruction is UNPREDICTABLE. 
rdar://problem/9224120

llvm-svn: 128748
 2011-04-01 23:15:50 +00:00
Fariborz Jahanian c6078c87d1 Fixes a rewriter bug rewriting call to a byref 
block pointer nested inside a block. // rdar:// 9204669

llvm-svn: 128747
 2011-04-01 23:08:13 +00:00
Johnny Chen 1e1010f56f Fix the instruction table entries for AI1_adde_sube_s_irs multiclass definition so that 
all the instruction have:

    let Inst{31-27} = 0b1110; // non-predicated

Before, the ARM decoder was confusing:

> 0x40 0xf3 0xb8 0x80

as:

Opcode=16 Name=ADCSSrs Format=ARM_FORMAT_DPSOREGFRM(5)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------

	adcs	pc, r8, r0, asr #6

since the cond field for ADCSSrs is a wild card, and so is ADCrs, with the ADCSSrs having Inst{20} as '1'.

Now, the AR decoder behaves correctly:

> 0x40 0xf3 0xb8 0x80
> END
Executing command: /Volumes/data/lldb/llvm/Debug+Asserts/bin/llvm-mc -disassemble -triple=arm-apple-darwin -debug-only=arm-disassembler mc-input.txt

Opcode=19 Name=ADCrs Format=ARM_FORMAT_DPSOREGFRM(5)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 0: 0: 0| 0: 0: 0: 0| 1: 0: 1: 1| 1: 0: 0: 0| 1: 1: 1: 1| 0: 0: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------

	adcshi	pc, r8, r0, asr #6
> 

rdar://problem/9223094

llvm-svn: 128746
 2011-04-01 22:32:51 +00:00
Benjamin Kramer 8b94c295c3 Fix comment. 
llvm-svn: 128745
 2011-04-01 22:29:18 +00:00
Benjamin Kramer 5cad45307e Tweaks to the icmp+sext-to-shifts optimization to address Frits' comments: 
- Localize the check if an icmp has one use to a place where we know we're
  introducing something that's likely more expensive than a sext from i1.
- Add an assert to make sure a case that would lead to a miscompilation is
  folded away earlier.
- Fix a typo.

llvm-svn: 128744
 2011-04-01 22:22:11 +00:00
Evan Cheng 88530e6568 Avoid de-referencing pass beginning of a basic block. No small test case possible. rdar://9216009 
llvm-svn: 128743
 2011-04-01 22:09:28 +00:00
Akira Hatanaka 3d9df607ba Remove redundant code. There are assignments to variables Base and Offset right after the code that is removed. 
llvm-svn: 128742
 2011-04-01 21:56:02 +00:00
Akira Hatanaka 56d9ef53a2 Simplifies logic for printing target flags. 
llvm-svn: 128741
 2011-04-01 21:41:06 +00:00
Oscar Fuentes 25ec0d38e1 CMake: remove debug code from previous commit. 
llvm-svn: 128740
 2011-04-01 21:39:38 +00:00
Owen Anderson 975ddf8035 When the architecture is explicitly armv6 or thumbv6, we need to mark the object file appropriately. 
llvm-svn: 128739
 2011-04-01 21:07:39 +00:00
Daniel Dunbar 16d970950f Driver/Darwin: Tweak simulator link logic a bit more to be closer to GCC. 
llvm-svn: 128738
 2011-04-01 21:02:42 +00:00
Jim Grosbach 360c369967 LDRD/STRD instructions should print both Rt and Rt2 in the asm string. 
llvm-svn: 128736
 2011-04-01 20:26:57 +00:00
Daniel Dunbar 5f74b39764 tlbgen/MC: StringRef's to temporary objects considered harmful. 
llvm-svn: 128735
 2011-04-01 20:23:52 +00:00
Johnny Chen 3dfb80afbf Fix a LDRT/LDRBT decoding bug where for Encoding A2, if Inst{4} != 0, we should reject the instruction 
as invalid.

llvm-svn: 128734
 2011-04-01 20:21:38 +00:00
Benjamin Kramer ac2d5657a6 Fix build. 
llvm-svn: 128733
 2011-04-01 20:15:16 +00:00
Benjamin Kramer d121765e64 InstCombine: Turn icmp + sext into bitwise/integer ops when the input has only one unknown bit. 
int test1(unsigned x) { return (x&8) ? 0 : -1; }
int test3(unsigned x) { return (x&8) ? -1 : 0; }

before (x86_64):
_test1:
	andl	$8, %edi
	cmpl	$1, %edi
	sbbl	%eax, %eax
	ret
_test3:
	andl	$8, %edi
	cmpl	$1, %edi
	sbbl	%eax, %eax
	notl	%eax
	ret

after:
_test1:
	shrl	$3, %edi
	andl	$1, %edi
	leal	-1(%rdi), %eax
	ret
_test3:
	shll	$28, %edi
	movl	%edi, %eax
	sarl	$31, %eax
	ret

llvm-svn: 128732
 2011-04-01 20:09:10 +00:00
Benjamin Kramer 398b8c5faf InstCombine: Move (sext icmp) transforms into their own method. No intended functionality change. 
llvm-svn: 128731
 2011-04-01 20:09:03 +00:00
Evan Cheng 8b1bca1998 Add comments. 
llvm-svn: 128730
 2011-04-01 19:57:01 +00:00
Evan Cheng 8d68ebd42a Assign node order numbers to results of call instruction lowering. This should improve src line debug info when sdisel is used. rdar://9199118 
llvm-svn: 128728
 2011-04-01 19:42:22 +00:00
Oscar Fuentes cde00a55c8 Fix assignment of -fPIC to CMAKE_C_FLAGS. Configure llvm-config.in.in 
with the contents of CMAKE_C(XX)_FLAGS too, else `llvm-config
--c(xx)flags' doesn't tell the absolute truth.

This comes from PR9603 and is based on a patch by Ryuta Suzuki!

llvm-svn: 128727
 2011-04-01 19:36:06 +00:00
Fariborz Jahanian 5bba75f1a7 ANother rewrite bug, rewriting a call of 
__byref block. // rdar://9204669

llvm-svn: 128726
 2011-04-01 19:19:28 +00:00
Devang Patel 1ffe23464a Do not try calculate the size of forward-declared template type array. 
llvm-svn: 128725
 2011-04-01 19:02:33 +00:00
Akira Hatanaka e625ba46b7 Modifies MipsAsmPrinter::isBlockOnlyReachableByFallthrough so that it handles delay slots correctly. 
llvm-svn: 128724
 2011-04-01 18:57:38 +00:00
Ted Kremenek c8e6f5110c Don't store reports when scan-build's build command matches /autogen/ (same as configure). 
llvm-svn: 128723
 2011-04-01 18:47:06 +00:00
Johnny Chen fe6fba3fe6 Fix LDRi12 immediate operand, which was changed to be the second operand in $addrmode_imm12 => (ops GPR:$base, i32imm:$offsimm). 
rdar://problem/9219356

llvm-svn: 128722
 2011-04-01 18:26:38 +00:00
Greg Clayton 2b4d9b7f11 Some OpenBSD patches from Amit Kulkarni. 
llvm-svn: 128721
 2011-04-01 18:18:34 +00:00
Greg Clayton ac4827fe05 Get rid of LONG_LONG_MAX and ULONG_LONG_MAX, and use LLONG_MAX and ULLONG_MAX 
respectively.

llvm-svn: 128720
 2011-04-01 18:14:08 +00:00
Devang Patel 22430f4141 Update CMakeLists.txt 
Patch by arrowdoger.

llvm-svn: 128719
 2011-04-01 18:03:58 +00:00
Akira Hatanaka 93f898f643 Add code for analyzing FP branches. Clean up branch Analysis functions. 
llvm-svn: 128718
 2011-04-01 17:39:08 +00:00
Benjamin Kramer bb21fac250 Initialize HasVMLxForwarding. 
llvm-svn: 128709
 2011-04-01 09:20:31 +00:00
Jay Foad e98f29df8b Various Instructions' resizeOperands() methods are only used to grow the 
list of operands. Simplify and rename them accordingly.

llvm-svn: 128708
 2011-04-01 08:00:58 +00:00
Evan Cheng a6a992a662 Add test case. 
llvm-svn: 128707
 2011-04-01 06:27:25 +00:00
Evan Cheng 0f86d6de50 FileCheck'ify test. 
llvm-svn: 128706
 2011-04-01 03:36:33 +00:00