Commit Graph

233150 Commits

Author SHA1 Message Date
Francis Ricci 80dbd154fa Don't remove PIE executables when using svr4 packets
Summary:
Because PIE executables have an e_type of llvm::ELF::ET_DYN,
they are not of type eTypeExecutable, and were being removed
when svr4 packets were used.

Reviewers: clayborg, ADodds, tfiala, sas

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D20990

llvm-svn: 271899
2016-06-06 15:00:50 +00:00
Johannes Doerfert 8448071d3e Refactor division generation code
This patch refactors the code generation for divisions. This allows to
  always generate a shift for a power-of-two division and to utilize
  information about constant divisors in order to truncate the result
  type.

llvm-svn: 271898
2016-06-06 14:56:17 +00:00
Marshall Clow 3a407a096c Remove arithmetic +/-127 on chars; results in UB when dealing with signed chars. Thanks to STL@microsoft for the report.
llvm-svn: 271897
2016-06-06 14:35:22 +00:00
Samuel Benzaquen 79c76101ce [clang-tidy] Do not try to suggest a fix if the parameter is partially in a macro.
It is not easy to tell where to do the suggestion and whether the
suggestion will be correct.

llvm-svn: 271896
2016-06-06 14:21:11 +00:00
Matthew Simpson e3e3b994ae [LAA] Use load and store vectors (NFC)
Contributed-by: Aditya Kumar <hiraditya@msn.com>
Differential Revision: http://reviews.llvm.org/D20953

llvm-svn: 271895
2016-06-06 14:15:41 +00:00
Johannes Doerfert c0ece9b67e [NFC] Generate runtime checks after the SCoP
We now generate runtime checks __after__ the SCoP code generation and
  not before, though they are still inserted at the same position int
  the code. This allows to modify the runtime check during SCoP code
  generation.

llvm-svn: 271894
2016-06-06 13:32:52 +00:00
Joerg Sonnenberger e27aec9f4a Give FileCheck a hint on which ld to match. Under Windows, the preferred
match was the ld.elf_so that should be matched in a second step. Add one
of the ever-present-but-irrelevant-for-this-test arguments to the
pattern to force matching the right argument.

llvm-svn: 271893
2016-06-06 13:13:12 +00:00
Johannes Doerfert 4db8d80730 [FIX] Determine insertion point during SCEV expansion
llvm-svn: 271892
2016-06-06 13:05:21 +00:00
Igor Breger edafb0595e [KNL] Fix UMULO lowering.
Differential Revision: http://reviews.llvm.org/D21013

llvm-svn: 271891
2016-06-06 12:24:52 +00:00
Johannes Doerfert 1a6b0f7f07 [NFC] Refactor assumption tracking interface
llvm-svn: 271890
2016-06-06 12:16:10 +00:00
Johannes Doerfert 6a6a671c72 [NFC] Simplify code
llvm-svn: 271889
2016-06-06 12:13:24 +00:00
Johannes Doerfert dedb7693ec Look through IntToPtr & PtrToInt instructions
IntToPtr and PtrToInt instructions are basically no-ops that we can handle as
  such. In order to generate them properly as parameters we had to improve the
  ScopExpander, though the change is the first in the direction of a more
  aggressive scalar synthetization.

llvm-svn: 271888
2016-06-06 12:12:27 +00:00
Benjamin Kramer f21beb2c74 Remove dead function with incredibly broken assert.
Found by clang-tidy's misc-assert-side-effect.

llvm-svn: 271887
2016-06-06 12:10:42 +00:00
Johannes Doerfert b71900b89c [NFC] Simplify code
llvm-svn: 271886
2016-06-06 12:09:30 +00:00
Johannes Doerfert 4b2fd892ec [FIX] Do not recognize division by 0 as affine
llvm-svn: 271885
2016-06-06 12:08:34 +00:00
Daniel Sanders 0ca86fe84d [mips] The default ABI depends on the CPU not the Arch on MTI and IMG vendor triples.
Summary:
32-bit CPU's default to O32. 64-bit CPU's default to N64. The default CPU
(mips32r2/mips64r2) still depends on the arch so there's no functional
change when the CPU isn't specified but commands like:
  clang -target mips-mti-linux-gnu -mips64r2
will now default to a 64-bit ABI like our gcc toolchains do* instead of
asserting in the backend**.

Other vendors (including Triple::UnknownVendor) still derive the default
ABI from the arch.

* Although not the same one as our gcc toolchains, clang has historically
  defaulted to N64 where gcc defaults to N32.
** Mixing O32 and a 64-bit CPU causing assertions is a long-standing bug.

Reviewers: atanasyan

Subscribers: sdardis, cfe-commits

Differential Revision: http://reviews.llvm.org/D21016

llvm-svn: 271884
2016-06-06 12:02:21 +00:00
Eric Liu 3528832930 [clang-format] make header guard identification stricter (with Lexer).
Summary: make header guard identification stricter with Lexer.

Reviewers: djasper

Subscribers: klimek, cfe-commits

Differential Revision: http://reviews.llvm.org/D20959

llvm-svn: 271883
2016-06-06 11:00:13 +00:00
Filipe Cabecinhas 6e7d5467c0 [NFC] Silence gcc warning (-Wsign-compare)
llvm-svn: 271882
2016-06-06 10:49:56 +00:00
Johannes Doerfert f643785b14 Replace getSCEV with getSCEVAtScope
llvm-svn: 271881
2016-06-06 10:07:40 +00:00
Johannes Doerfert ba91a58e42 [NFC] Use the ScalarEvolution member of the SCEVAffinator
llvm-svn: 271880
2016-06-06 10:06:53 +00:00
Johannes Doerfert 48975276be [NFC] Coalesce invariant context sets early
llvm-svn: 271879
2016-06-06 10:06:07 +00:00
Johannes Doerfert 0767a511ba Use minimal types for generated expressions
We now use the minimal necessary bit width for the generated code. If
  operations might overflow (add/sub/mul) we will try to adjust the types in
  order to ensure a non-wrapping computation. If the type adjustment is not
  possible, thus the necessary type is bigger than the type value of
  --polly-max-expr-bit-width, we will use assumptions to verify the computation
  will not wrap. However, for run-time checks we cannot build assumptions but
  instead utilize overflow tracking intrinsics.

llvm-svn: 271878
2016-06-06 09:57:41 +00:00
Daniel Sanders 28d8637e25 [mips] The P5600 does not support N32/N64 since it's a 32-bit CPU.
Summary:

Reviewers: atanasyan

Subscribers: cfe-commits, sdardis

Differential Revision: http://reviews.llvm.org/D20963

llvm-svn: 271877
2016-06-06 09:47:32 +00:00
Carlo Kok 490d18b3c5 (Minor tweak) Make RegisterContextWindows_x86/x64::GetRegisterInfoAtIndex
return NULL for an invalid register.

The unwind logic asks for the "return address register" which doesn't exist
on x86/x86_64, returns -1 and calls this with -1 as a parameter, ends up 
out of scope of the array bounds for g_register_infos and later SIGSEGVs 
on accessing. This now matches the other GetRegisterInfoAtIndex for
other platforms.

llvm-svn: 271876
2016-06-06 09:40:27 +00:00
Daniel Sanders 26a56adaea [mips] Replace almost all Arch checks in MipsTargetInfo with ABI checks. NFC.
Summary:
setABI() is still tied to the Arch component of the Triple to preserve existing
behaviour.

Reviewers: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D20961

llvm-svn: 271875
2016-06-06 09:07:08 +00:00
George Rimar 8b3c5f2b30 [ELF] - Assign sh_link field of SHT_GNU_versym section to DynSymTab section index.
.gnu.version should have sh_link field initialized with index of DynSymTab section.

GNU documentation looks misses that, but Sun docs mention it, according to
https://docs.oracle.com/cd/E19120-01/open.solaris/819-0690/chapter6-54676/index.html 
versym sh_link is indeed supposed to point to the .dynsym section.

Binutils readelf tool also relies on that:
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob;f=binutils/readelf.c;h=b6454d353279dc57745cd5a2d68b5f3f69f8e17c;hb=5522f910cb539905d6adfdceab208ddfa5e84557#l9988

Both gold/bfd do the same + after this patch I am able to see this section in readelf output, was unable before in my case.

Differential revision: http://reviews.llvm.org/D20956

llvm-svn: 271874
2016-06-06 08:04:53 +00:00
Craig Topper f51cc07719 [AVX512] Convert masked palignr builtins directly to native IR similar to the other palignr builtins, but with a select to handle masking.
llvm-svn: 271873
2016-06-06 06:13:01 +00:00
Craig Topper 33350cc406 [AVX512] Remove masked palignr intrinsics and auto-upgrade them to native IR of vector shuffle and select.
llvm-svn: 271872
2016-06-06 06:12:54 +00:00
NAKAMURA Takumi 500b0a49d2 LLVM_BUILD_32_BITS: Add -m32 with CMAKE_C*_FLAGS. [CMP0056]
With CMP0056, try_compile() uses also CMAKE_EXE_LINKER_FLAG.
It caused mismatch between CMAKE_CXX_FLAGS and CMAKE_EXE_LINKER_FLAGS, to fail to examine CXX_SUPPORTS_CXX11 with -m32.

FYI, before this, try_compile() tries without -m32 regardless of LLVM_BUILD_32_BITS.

llvm-svn: 271871
2016-06-06 05:54:55 +00:00
Craig Topper 143446d5c1 [AVX512] Add PALIGNR shuffle lowering for v32i16 and v16i32.
llvm-svn: 271870
2016-06-06 05:39:10 +00:00
Craig Topper ccad6d57c1 [AVX512] Update tests to show shuffle decoding for vpshuflw/vpshufhw.
llvm-svn: 271869
2016-06-06 05:39:07 +00:00
Lang Hames 3242f65ea9 [Kaleidoscope][BuildingAJIT] Split up the code-block describing the substitution
of OptimizeLayer for CompileLayer in Chapter 2.

Hopefully this will read a little more clearly.

llvm-svn: 271868
2016-06-06 05:07:52 +00:00
Lang Hames 38eb0312ba [Kaleidoscope][BuildingAJIT] Fix code-blocks in Chapter 2.
llvm-svn: 271867
2016-06-06 04:53:59 +00:00
Mike Spertus ef8c308d69 Slightly improve Visual Studio visualization of clang::Expr
Now it gives the StmtClass of the Expr as well as the type. It's still
a long way from full visualization of expressions, but I have found
that having the class really helps when debugging, so definitely
worth submitting.

llvm-svn: 271866
2016-06-06 03:37:18 +00:00
Lang Hames c499d2a7c2 [Kaleidoscope][BuildingAJIT] Add tutorial text for Chapter 2.
This chapter discusses IR optimizations, the ORC IRTransformLayer, and the ORC
layer concept itself.

The text is still pretty rough, but I think the main ideas are there. Feedback
is very welcome, as always.

llvm-svn: 271865
2016-06-06 03:28:12 +00:00
Xinliang David Li 5cd1f94d4f [profile] in-process mergeing support (part-2)
(Part-1 merging API is in profile runtime)

This patch implements a portable file opening API
with exclusive access for the process. In-process
profile merge requires profile file update to be
atomic/fully sychronized.

llvm-svn: 271864
2016-06-06 03:17:58 +00:00
Stephane Sezer 04a89fd826 Fix function name lookup in IRExecutionEngine.cpp.
Summary:
Without this commit, when `log enable lldb expr` is enabled, the
disassembly of JIT'ed code is never displayed.

Reviewers: spyffe, clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D20312

llvm-svn: 271863
2016-06-06 02:50:46 +00:00
Nick Lewycky bfad015559 Fix spelling and capitalization in comments. NFC
llvm-svn: 271862
2016-06-06 01:51:23 +00:00
NAKAMURA Takumi f5fe079e03 Trailing whitespace.
llvm-svn: 271861
2016-06-06 00:31:45 +00:00
NAKAMURA Takumi 9ff93f9421 Untabify.
llvm-svn: 271860
2016-06-06 00:31:28 +00:00
Rafael Espindola e325b98836 add missing REQUIRES
llvm-svn: 271859
2016-06-05 22:54:11 +00:00
Eli Friedman ee89505799 LICM: Don't sink stores out of loops that may throw.
Summary:
This hasn't been caught before because it requires noalias or similarly
strong alias analysis to actually reproduce.

Fixes http://llvm.org/PR27952 .

Reviewers: hfinkel, sanjoy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20944

llvm-svn: 271858
2016-06-05 22:13:52 +00:00
Sanjoy Das b7e861a488 Add safety check to InstCombiner::commonIRemTransforms
Since FoldOpIntoPhi speculates the binary operation to potentially each
of the predecessors of the PHI node (pulling it out of arbitrary control
dependence in the process), we can FoldOpIntoPhi only if we know the
operation doesn't have UB.

This also brings up an interesting profitability question -- the way it
is written today, commonIRemTransforms will hoist out work from
dynamically dead code into code that will execute at runtime.  Perhaps
that isn't the best canonicalization?

Fixes PR27968.

llvm-svn: 271857
2016-06-05 21:17:04 +00:00
Sanjoy Das 0dcd1d859c Add test case for InstCombiner::commonIRemTransforms; NFC
The PHI case in commonIRemTransforms was untested; add a trivial test
case.

llvm-svn: 271856
2016-06-05 21:17:00 +00:00
Eli Friedman aa77fa0036 Fix deadlock in ThreadPool unittest.
(Yes, this only deadlocks on a computer with a single core; I'm using
a virtual machine.)

llvm-svn: 271855
2016-06-05 21:15:46 +00:00
Rafael Espindola 4f5046ce87 Add a missing REQUIRES.
llvm-svn: 271854
2016-06-05 19:28:44 +00:00
Davide Italiano a1cbc3f8cc [Internalize] Test that __stack_chk_{guard, fail} are not internalized.
r154645 introduced this feature without test. This should have better
coverage now.

llvm-svn: 271853
2016-06-05 19:08:54 +00:00
Rafael Espindola 6211d9a4fa Move GlobalDynIndex to SymbolBody.
With that we can have local symbols with a tls gd index.

llvm-svn: 271852
2016-06-05 19:03:28 +00:00
Filipe Cabecinhas 6328f8e9e6 [BitCode] Make sure atomicrmw's argument is an actual PointerType
llvm-svn: 271851
2016-06-05 18:43:40 +00:00
Filipe Cabecinhas 036e73c8bf [BitCode] Make sure storeatomic's argument is an actual PointerType
llvm-svn: 271850
2016-06-05 18:43:33 +00:00