Commit Graph

257057 Commits

Author SHA1 Message Date
Tobias Grosser c9d4cb2f42 [ScheduleOptimizer] Allow tiling after fusion
In ScheduleOptimizer::isTileableBand(), allow the case in which
the band node's child is an isl_schedule_sequence_node and its
grandchildren isl_schedule_leaf_nodes. This case can arise when
two or more statements are fused by the isl scheduler.

The tile_after_fusion.ll test has two statements in separate
loop nests and checks whether they are tiled after being fused
when polly-opt-fusion equals "max".

Reviewers: grosser

Subscribers: gareevroman, pollydev

Tags: #polly

Contributed-by: Theodoros Theodoridis <theodort@student.ethz.ch>

Differential Revision: https://reviews.llvm.org/D30815

llvm-svn: 297587
2017-03-12 19:02:31 +00:00
Sanjay Patel f06b963a2b [x86] don't blindly transform SETB into SBB
I noticed unnecessary 'sbb' instructions in D30472 and while looking at 'ptest' codegen recently. 
This happens because we were transforming any 'setb' - even when we only wanted a single-bit result.

This patch moves those transforms under visitAdd/visitSub, so we we're only creating sbb/adc when it
is a win. I don't know why we need a SETCC_CARRY node type, but I'm not proposing to change that
existing behavior in this patch.

Also, I'm skeptical that sbb/adc are a win for all micro-arches, so I added comments to the test files
where this transform still fires.

The test changes here are all cases where we no longer produce sbb/adc. Avoiding partial register
stalls (generating an xor to clear a register) is not handled in some cases, but that's a separate
issue.

Differential Revision: https://reviews.llvm.org/D30611

llvm-svn: 297586
2017-03-12 18:28:48 +00:00
Zachary Turner d5bd3a1e6a Make file / directory completion work properly on Windows.
There were a couple of problems with this function on Windows. Different
separators and differences in how tilde expressions are resolved for
starters, but in addition there was no clear indication of what the
function's inputs or outputs were supposed to be, and there were no tests
to demonstrate its use.

To more easily paper over the differences between Windows paths,
non-Windows paths, and tilde expressions, I've ported this function to use
LLVM-based directory iteration (in fact, I would like to eliminate all of
LLDB's directory iteration code entirely since LLVM's is cleaner / more
efficient (i.e. it invokes fewer stat calls)). and llvm's portable path
manipulation library.

Since file and directory completion assumes you are referring to files and
directories on your local machine, it's safe to assume the path syntax
properties of the host in doing so, so LLVM's APIs are perfect for this.

I've also added a fairly robust set of unit tests. Since you can't really
predict what users will be on your machine, or what their home directories
will be, I added an interface called TildeExpressionResolver, and in the
unit test I've mocked up a fake implementation that acts like a unix
password database. This allows us to configure some fake users and home
directories in the test, so we can exercise all of those hard-to-test
codepaths that normally otherwise depend on the host.

Differential Revision: https://reviews.llvm.org/D30789

llvm-svn: 297585
2017-03-12 18:18:50 +00:00
Craig Topper 8b9373a2c4 [AVX-512] Fix avx512vl gather builtins to require the scale argument to be an ICE like the rest of the gather builtins.
llvm-svn: 297584
2017-03-12 17:58:12 +00:00
Anna Thomas a10e3e4c34 [LVI] Add Datalayout to the class LazyValueInfo since all its Impls require it. NFC
llvm-svn: 297583
2017-03-12 14:06:41 +00:00
Azharuddin Mohammed 473b75c3d5 Remove CRC32 instructions from AArch64InstrInfo::hasShiftedReg
Summary:
A53 scheduler causes an assertion failure on all CRC instructions:
include/llvm/CodeGen/MachineInstr.h:280: const llvm::MachineOperand
&llvm::MachineInstr::getOperand(unsigned int) const: Assertion `i <
getNumOperands() && "getOperand() out of range!"' failed.

The case statements corresponding to CRC instructions are incorrect and should
be removed.

Also adding a testcase while on this.

Reviewers: t.p.northover, javed.absar, apazos, rengolin

Reviewed By: rengolin

Subscribers: evandro, aemerson, llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D30274

llvm-svn: 297582
2017-03-12 14:02:32 +00:00
Igor Breger 293dfb9768 [X86] Add vector zext tests.
llvm-svn: 297581
2017-03-12 13:20:10 +00:00
Gil Rapaport a1e5a37d3f [LV] A unified scalarizeInstruction() for Vectorizer and Unroller; NFC
Unroller's specialized scalarizeInstruction() is mostly duplicating Vectorizer's
variant. OTOH Vectorizer's scalarizeInstruction() already supports the special
case of VF==1 except for avoiding mask-bit extraction in that case. This patch
removes Unroller's specialized version in favor of a unified method.

The only functional difference between the two variants seems to be setting
memcheck metadata for loads and stores only in Vectorizer's variant, which is a
bug in Unroller. To keep this patch an NFC the unified method doesn't set
memcheck metadata for VF==1.

Differential Revision: https://reviews.llvm.org/D30715

llvm-svn: 297580
2017-03-12 12:31:38 +00:00
Ayal Zaks 09cf3121d8 Test commit.
llvm-svn: 297579
2017-03-12 09:48:06 +00:00
Tobias Grosser de244eb450 Possible error in doc comment
If a SCoP is most probably sequential, then it's better to run it on a CPU.
Hence, there's no point in running it on a GPU.

Reviewers: grosser

Subscribers: nemanjai

Tags: #polly

Contributed-by: Singapuram Sanjay <singapuram.sanjay@gmail.com>

Differential Revision: https://reviews.llvm.org/D30864

llvm-svn: 297578
2017-03-12 08:19:01 +00:00
Tobias Grosser b2347dc241 [isl++] Add missing /* implicit */ marker
llvm-svn: 297577
2017-03-12 08:17:50 +00:00
Daniel Berlin 64e689938d Split NewGVN class into a legacy pass and an impl, instead of a merged class.
llvm-svn: 297576
2017-03-12 04:46:45 +00:00
Daniel Berlin f2a6aa9306 Add documentation on debug counters to Programmers Manual.
Reviewers: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30842

llvm-svn: 297575
2017-03-12 04:46:41 +00:00
Craig Topper 58647b16e5 [AVX-512] Fix a bad use of a high GR8 register after copying from a mask register during fast isel. This ends up extracting from bits 15:8 instead of the lower bits of the mask.
I'm pretty sure there are more problems lurking here. But I think this fixes PR32241.

I've added the test case from that bug and added asserts that will fail if we ever try to copy between high registers and mask registers again.

llvm-svn: 297574
2017-03-12 03:37:37 +00:00
Craig Topper e726cd0cd1 [AVX-512] Add test case for PR32241. Fix coming in another commit.
llvm-svn: 297573
2017-03-12 03:37:34 +00:00
Craig Topper 6ab5edfa73 [AVX-512] Remove unused field in X86VectorVTInfo tablegen class.
llvm-svn: 297572
2017-03-12 03:37:32 +00:00
Weiming Zhao 4451a33442 Revert "[Builtin] Implement lit-test support"
Due to test failure of check-builtins for aarch64 and armhf.
This reverts commit r297566.

llvm-svn: 297569
2017-03-11 20:53:01 +00:00
Simon Pilgrim 18debfa5b4 [X86][SSE] Improve extraction of elements from v16i8 (pre-SSE41)
Without SSE41 (pextrb) we currently extract byte elements from a vector by spilling to stack and reloading the byte.

This patch is an initial attempt at using MOVD/PEXTRW to extract the relevant DWORD/WORD from the vector and then shift+truncate to collect the correct byte.

Extraction of multiple bytes this way would result in code bloat, but as explained in the patch we could probably afford to be more aggressive with the supported extractions before again falling back on spilling - possibly through counting the number of extracts and which DWORD/WORD they originate?

Differential Revision: https://reviews.llvm.org/D29841

llvm-svn: 297568
2017-03-11 20:42:31 +00:00
Simon Pilgrim 9ff5732c92 Remove unnecessary whitespace.
llvm-svn: 297567
2017-03-11 20:23:59 +00:00
Weiming Zhao e0004f9215 [Builtin] Implement lit-test support
Summary:
This patch implements a initial support of lit test for builtins.
Unit/arm/call_apsr.S is updated to support thumb1.
It also fixes a bug in arm/aeabi_uldivmod_test.c
gcc_personality_test is XFAILED as the framework cannot handle it so far.
cpu_model_test is also XFAILED for now as it is expected to return non-zero.

Reviewers: rengolin, compnerd, jroelofs, erik.pilkington, arphaman

Reviewed By: jroelofs

Subscribers: jroelofs, aemerson, srhines, nemanjai, llvm-commits, mgorny

Differential Revision: https://reviews.llvm.org/D30802

llvm-svn: 297566
2017-03-11 19:40:24 +00:00
Simon Pilgrim b3f72ea7c1 Fix signed/unsigned comparison warning
llvm-svn: 297565
2017-03-11 19:38:22 +00:00
Craig Topper d511c2ce04 [X86] Add avx2 gather tests cases that show a failure to remove zeroing of the source when the mask is all ones.
llvm-svn: 297564
2017-03-11 18:26:00 +00:00
Craig Topper 02b463270c [X86] Remove unnecessary commented out code. NFC
llvm-svn: 297563
2017-03-11 18:25:56 +00:00
Andrey Churbanov a193ae19e1 Create a git ignore file for openmp runtime.
Patch by Guansong Zhang.

Differential Revision: https://reviews.llvm.org/D30784

llvm-svn: 297562
2017-03-11 13:05:08 +00:00
Simon Pilgrim bd83f83b56 Fix signed/unsigned comparison warnings
llvm-svn: 297561
2017-03-11 13:02:31 +00:00
Simon Pilgrim fa97699d09 Fix -Wsentinel warning
llvm-svn: 297560
2017-03-11 12:56:02 +00:00
Amaury Sechet d1ec5d54cf Use setBits in SelectionDAG
Summary: As per title.

Reviewers: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30836

llvm-svn: 297559
2017-03-11 11:24:03 +00:00
Tobias Grosser 5ac963743f [isl++] Add last set of missing isl:: prefixes to increase consistency [NFC]
llvm-svn: 297558
2017-03-11 07:58:12 +00:00
Matt Arsenault dd905b0e9b AMDGPU: Remove packf16 intrinsic
llvm-svn: 297557
2017-03-11 05:51:16 +00:00
Matt Arsenault 3cb9ff8863 AMDGPU: Keep track of modifiers when converting v_mac to v_mad
Since v_max_f32_e64/v_max_f16_e64 can be folded if the target
instruction supports the clamp bit, we also need to maintain
modifiers when converting v_mac to v_mad.

This fixes a rendering issue with Dirt Rally because a v_mac
instruction with the clamp bit set was converted to a v_mad
but that bit was lost during the conversion.

Fixes: e184e01dd79 ("AMDGPU: Fold FP clamp as modifier bit")

Patch by Samuel Pitoiset <samuel.pitoiset@gmail.com>

llvm-svn: 297556
2017-03-11 05:40:40 +00:00
Eric Fiselier 2b38ed7b15 fix test coverage capture dirs
llvm-svn: 297555
2017-03-11 05:28:09 +00:00
Kostya Serebryany d481e1c361 [libFuzzer] add more iterations to LLVMFuzzer-Memcmp64BytesTest
llvm-svn: 297554
2017-03-11 05:14:49 +00:00
Eric Fiselier 2aeac46e84 Change test coverage generation to use llvm-cov instead of gcov.
Clang doesn't produce gcov compatible coverage files. This
causes lcov to break because it uses gcov by default. This
patch switches lcov to use llvm-cov as the gcov-tool.

Unfortunatly llvm-cov doesn't provide a gcov like interface by
default so it won't work with lcov. However `llvm-cov gcov` does.
For this reason we generate 'llvm-cov-wrapper' script that always
passes the gcov flag.

llvm-svn: 297553
2017-03-11 03:24:18 +00:00
Zachary Turner 6023fb58cc [ADT] Add a DenseMapInfo<T> for shorts.
Differential Revision: https://reviews.llvm.org/D30857

llvm-svn: 297552
2017-03-11 02:52:48 +00:00
Kostya Serebryany 5dfa9642a8 [libFuzzer] reduce the number of vector resizes during merge (https://github.com/google/oss-fuzz/issues/445)
llvm-svn: 297551
2017-03-11 02:50:47 +00:00
Zachary Turner de042776d8 Fix line endings of DenseMapInfo.h
llvm-svn: 297550
2017-03-11 02:50:18 +00:00
Zachary Turner dc41e69d4c Remove eol-style:native from DenseMapInfo.h
llvm-svn: 297549
2017-03-11 02:47:59 +00:00
Zachary Turner d2efbae8e8 [Support] Add a formatv provider for Twine.
llvm-svn: 297548
2017-03-11 02:45:50 +00:00
Eric Fiselier cac0a59718 [coroutines] Fix diagnostics depending on the first coroutine statement.
Summary:
Some coroutine diagnostics need to point to the location of the first coroutine keyword in the function, like when diagnosing a `return` inside a coroutine. Previously we did this by storing each *valid* coroutine statement in a list and select the first one to use in diagnostics. However if every coroutine statement is invalid we would have no location to point to.

This patch fixes the storage of the first coroutine statement location, ensuring that it gets stored even when the resulting AST node would be invalid. 
This patch also removes the `CoroutineStmts` list in `FunctionScopeInfo` because it was unused.

Reviewers: rsmith, GorNishanov, aaron.ballman

Reviewed By: GorNishanov

Subscribers: mehdi_amini, cfe-commits

Differential Revision: https://reviews.llvm.org/D30776

llvm-svn: 297547
2017-03-11 02:35:37 +00:00
Kostya Serebryany 81d1744519 [libFuzzer] print how much memory is consumed by the outer merge process (https://github.com/google/oss-fuzz/issues/445)
llvm-svn: 297546
2017-03-11 02:26:20 +00:00
Eric Fiselier 62a14c46f8 Revert r297516 - Respect CMAKE_INSTALL_MANDIR for sphinx generated manpages
When CMAKE_INSTALL_MANDIR isn't defined it ends up attempting to install
the man pages under "/man1" and we really don't want to accidentally install
stuff at the filesystem root.

llvm-svn: 297545
2017-03-11 02:24:13 +00:00
Kostya Serebryany b6b2f18ea8 [libFuzzer] add test/LargeTest.cpp, mostly for manual experiments with large number of edges, not yet suitable for unit testing
llvm-svn: 297544
2017-03-11 01:54:06 +00:00
Kostya Serebryany 7939ee4d51 [libFuzzer] remove fuzzer-jobs.test which is flaky and not very useful
llvm-svn: 297543
2017-03-11 01:48:54 +00:00
Daniel Berlin 14f5c47c1d Remove opt-bisect support for "cases" in favor of debug counters
Summary:
Ths "cases" support was not quite finished, is unused, and is really just debug counters.
(well, almost, debug counters are slightly more powerful, in that they can skip things at the start, too).
Note, opt-bisect itself could also be implemented as a wrapper around
debug counters, but not sure it's worth it ATM.

I'll shove it on a todo list if we think it is.

Reviewers: MatzeB, chandlerc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30856

llvm-svn: 297542
2017-03-11 01:41:03 +00:00
Gor Nishanov ce43bd2242 [coroutines] Refactor SuspendExpr to create just one OpaqueValue (almost NFC)
Summary:
Create only one OpaqueValue for await_ready/await_suspend/await_resume.
Store OpaqueValue used in the CoroutineSuspendExpr node, so that CodeGen does not have to hunt looking for it.

Reviewers: rsmith, EricWF, aaron.ballman

Reviewed By: EricWF

Subscribers: mehdi_amini, cfe-commits

Differential Revision: https://reviews.llvm.org/D30775

llvm-svn: 297541
2017-03-11 01:30:17 +00:00
Jordan Rose ca9ca5440e [unittest] Explicitly specify alignment when using BumpPtrAllocator.
r297310 began inserting red zones around allocations under ASan, which
perturbs the alignment of subsequent allocations. Deliberately specify
this in two places where it matters.

Fixes failures when these tests are run under ASan and UBSan together.
Reviewed by Duncan Exon Smith.

rdar://problem/30980047

llvm-svn: 297540
2017-03-11 01:24:56 +00:00
Sanjoy Das 3f1e8e0102 Use a WeakVH for UnknownInstructions in AliasSetTracker
Summary:
This change solves the same problem as D30726, except that this only
throws out the bathwater.

AST was not correctly tracking and deleting UnknownInstructions via
handles.  The existing code only tracks "pointers" in its
`ASTCallbackVH`, so an UnknownInstruction (that isn't also def'ing a
pointer used by another memory instruction) never gets a
`ASTCallbackVH`.

There are two other ways to solve this problem:

 - Use the `PointerRec` scheme for both known and unknown instructions.
 - Use a `CallbackVH` that erases the offending Instruction from the
   UnknownInstruction list.

Both of the above changes seemed to be significantly (and unnecessarily
IMO) more complex than this.

Reviewers: chandlerc, dberlin, hfinkel, reames

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D30849

llvm-svn: 297539
2017-03-11 01:15:48 +00:00
Tim Hammerquist e4885f8999 fix xunit attribute parsing
llvm-svn: 297538
2017-03-11 00:58:41 +00:00
Daniel Berlin cd07a0f685 VNCoercion: Make the function signatures all consistent
llvm-svn: 297537
2017-03-11 00:51:01 +00:00
Stanislav Mekhanoshin 79da2a7698 [AMDGPU] Remove getBidirectionalReasonRank
This method inverts the Reason field of a scheduling candidate.
It does right comparison between RegCritical and RegExcess, but
everything else is broken. In fact it can prefer less strong reason
such as Weak over RegCritical because Weak > -RegCritical.

The CandReason enum is properly sorted, so just remove artificial
ranking.

Differential Revision: https://reviews.llvm.org/D30557

llvm-svn: 297536
2017-03-11 00:29:27 +00:00