Anton Korobeynikov
|
ed1c3dfa0f
|
Add normal and trunc stores
llvm-svn: 70724
|
2009-05-03 13:06:26 +00:00 |
Anton Korobeynikov
|
31ecd23a9e
|
Basic support for mem=>reg moves
llvm-svn: 70723
|
2009-05-03 13:06:03 +00:00 |
Anton Korobeynikov
|
b638fb10f5
|
Add pattern for OR
llvm-svn: 70720
|
2009-05-03 13:05:00 +00:00 |
Anton Korobeynikov
|
e32c817d2c
|
Cleanup
llvm-svn: 70716
|
2009-05-03 13:03:50 +00:00 |
Anton Korobeynikov
|
15a515b1af
|
Add dummy lowering for shifts
llvm-svn: 70715
|
2009-05-03 13:03:33 +00:00 |
Anton Korobeynikov
|
55a085b539
|
We don't have any div at all - thus mark it as expensive
llvm-svn: 70714
|
2009-05-03 13:03:14 +00:00 |
Anton Korobeynikov
|
d7afd69e3b
|
Add code enough for emission of reg-reg and reg-imm moves. This allows us to compile "ret i16 0" properly!
llvm-svn: 70710
|
2009-05-03 13:02:04 +00:00 |
Anton Korobeynikov
|
c10f98ace3
|
Provide set of reserved registers
llvm-svn: 70704
|
2009-05-03 13:00:11 +00:00 |
Anton Korobeynikov
|
7bfc3ea2ee
|
Add proper ISD::RET lowering
llvm-svn: 70703
|
2009-05-03 12:59:50 +00:00 |
Anton Korobeynikov
|
3849be6ca1
|
Add first draft of MSP430 calling convention stuff and draft of ISD::FORMAL_ARGUMENTS node lowering.
llvm-svn: 70702
|
2009-05-03 12:59:33 +00:00 |
Anton Korobeynikov
|
101380015c
|
Dummy MSP430 backend
llvm-svn: 70694
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2009-05-03 12:57:15 +00:00 |