80d484e7cc
Update llvm-mc / MCAsmStreamer to print the instruction using the actual target
...
specific printer (this only works on x86, for now).
- This makes it possible to do some correctness checking of the parsing and
matching, since we can compare the results of 'as' on the original input, to
those of 'as' on the output from llvm-mc.
- In theory, we could now have an easy ATT -> Intel syntax converter. :)
llvm-svn: 78986
2009-08-14 03:48:55 +00:00
50327c561b
Add virtual printMCInst method to AsmPrinter, as a quick way to expose the API
...
to print one instruction.
llvm-svn: 78985
2009-08-14 03:43:57 +00:00
ad8740ae78
Add X86 instruction printer support for printing MCValue operands.
...
llvm-svn: 78984
2009-08-14 03:42:12 +00:00
db73d68cbe
Shrink ADR and LDR from constantpool late during constantpool island pass.
...
llvm-svn: 78970
2009-08-14 00:32:16 +00:00
76fa6e6a8f
New entry.
...
llvm-svn: 78968
2009-08-14 00:16:47 +00:00
3e9dbe5a10
Make these matching rules more strict so that they don't
...
accidentally match unrelated things.
llvm-svn: 78966
2009-08-14 00:10:19 +00:00
9abdc6cc3c
TargetRegistry: Change AsmPrinter constructor to be typed as returning an
...
AsmPrinter instance (instead of just a FunctionPass)
llvm-svn: 78962
2009-08-13 23:48:47 +00:00
62e6a8bbe6
Remove HasCrazyBSS and add a flag in TAI to indicate that '.section'
...
must be emitted for PowerPC-Linux '.bss' section
llvm-svn: 78958
2009-08-13 23:30:21 +00:00
55f1c09e31
Push LLVMContexts through the IntegerType APIs.
...
llvm-svn: 78948
2009-08-13 21:58:54 +00:00
95f58463e5
TargetRegistry: Reorganize AsmPrinter construction so that clients pass in the
...
TargetAsmInfo. This eliminates a dependency on TargetMachine.h from
TargetRegistry.h, which technically was a layering violation.
- Clients probably can only sensibly pass in the same TargetAsmInfo as the
TargetMachine has, but there are only limited clients of this API.
llvm-svn: 78928
2009-08-13 19:38:51 +00:00
c01ed862c8
Reapply pieces of 78914 reverted in 78916, this has been fixed.
...
llvm-svn: 78921
2009-08-13 17:08:54 +00:00
86c065dd68
Revert 78892 and 78895, these break generating working executables on
...
x86_64-apple-darwin10.
--- Reverse-merging r78895 into '.':
U test/CodeGen/PowerPC/2008-12-12-EH.ll
U lib/Target/DarwinTargetAsmInfo.cpp
--- Reverse-merging r78892 into '.':
U include/llvm/Target/DarwinTargetAsmInfo.h
U lib/Target/X86/X86TargetAsmInfo.cpp
U lib/Target/X86/X86TargetAsmInfo.h
U lib/Target/ARM/ARMTargetAsmInfo.h
U lib/Target/ARM/ARMTargetMachine.cpp
U lib/Target/ARM/ARMTargetAsmInfo.cpp
U lib/Target/PowerPC/PPCTargetAsmInfo.cpp
U lib/Target/PowerPC/PPCTargetAsmInfo.h
U lib/Target/PowerPC/PPCTargetMachine.cpp
G lib/Target/DarwinTargetAsmInfo.cpp
llvm-svn: 78919
2009-08-13 17:03:38 +00:00
eba70d85cf
Add missing defs of R2 and D1.
...
llvm-svn: 78918
2009-08-13 16:59:44 +00:00
e95b32b057
Remove obsoleted files (from AsmPrinter move)
...
llvm-svn: 78917
2009-08-13 16:57:03 +00:00
ca232776ec
Revert r78914, as it was breaking the build.
...
llvm-svn: 78916
2009-08-13 16:54:39 +00:00
89ec31a26a
Move PIC16 AsmPrinter to PIC16/AsmPrinter directory.
...
Remove CooperTargetMachine, as currently only one is supported.
llvm-svn: 78914
2009-08-13 16:37:05 +00:00
a9c2aad939
Finalize itineraries for cortex-a8 integer multiply
...
llvm-svn: 78908
2009-08-13 15:51:13 +00:00
695e1c6087
Remove unnecessary newline
...
llvm-svn: 78905
2009-08-13 15:12:16 +00:00
c96e88f8a5
Correct comment wording
...
llvm-svn: 78904
2009-08-13 15:11:43 +00:00
68535f7603
reintroduce support for Mips "small" section handling. This is
...
implemented somewhat differently than before, but it should have
the same functionality and the previous testcase passes again.
llvm-svn: 78900
2009-08-13 06:28:06 +00:00
f59e9f4288
tPOP_RET now has predicate operands.
...
llvm-svn: 78898
2009-08-13 06:05:07 +00:00
3e4c012d54
Add a fixme message about canonicalizing floating-point vector types.
...
llvm-svn: 78897
2009-08-13 06:01:30 +00:00
ef6e602bf4
Revert r78852 for now. I want to do this differently, but I don't have time
...
to fix it tonight.
llvm-svn: 78896
2009-08-13 05:58:56 +00:00
00a8de054c
fix typo, add 10.6 version of test for my previous patch.
...
llvm-svn: 78895
2009-08-13 05:43:33 +00:00
58e8be847c
Restore some "small section" support code, reverting my patch from r76936.
...
llvm-svn: 78894
2009-08-13 05:41:27 +00:00
e5801bd220
It's ok to spill a tGPR register as long as it's still allocated a low register.
...
llvm-svn: 78893
2009-08-13 05:40:51 +00:00
eb68198145
fix a minor fixme. When building with SL and later tools, the ".eh" symbols
...
don't need to be exported from the .o files.
llvm-svn: 78892
2009-08-13 05:30:22 +00:00
607cd3b63a
Change MCSectionELF to represent a section semantically instead of
...
syntactically as a string, very similiar to what Chris did with MachO.
The parsing support and validation is not introduced yet.
llvm-svn: 78890
2009-08-13 05:07:35 +00:00
c6800b55e6
Add a comment to describe why vector shuffles are legalized to custom DAG nodes.
...
llvm-svn: 78884
2009-08-13 02:13:04 +00:00
fcd6361ad1
Use cast<> instead of dyn_cast<> in places where the type is known.
...
llvm-svn: 78881
2009-08-13 01:57:47 +00:00
ef3d457126
Various AsmWriter output cleanups. Use WriteAsOperand instead of
...
PrintUnmangledNameSafely.
llvm-svn: 78878
2009-08-13 01:36:44 +00:00
04b4700ebc
sink uniquing of sections out of MCContext into the ELF and PECOFF TLOF implementations.
...
MCContext no longer maintains a string -> section map.
llvm-svn: 78874
2009-08-13 00:37:15 +00:00
5fa97f021c
Symbols with LinkerPrivateLinkage are weak.
...
This allows WebKit to build again.
llvm-svn: 78872
2009-08-13 00:28:52 +00:00
5ed8c4212a
make PIC16 unique its own sections instead of having mcontext do it.
...
llvm-svn: 78871
2009-08-13 00:26:52 +00:00
b691316838
add some comments: MCContext owns the MCSections, but it bump pointer allocates
...
them, so it doesn't have to explicitly free them.
llvm-svn: 78870
2009-08-13 00:21:53 +00:00
c0741ebb3a
reject invalid code like:
...
int x __attribute__((section("_foo, _bar"))) = 4;
int y __attribute__((section("_foo, _bar, 4byte_literals"))) = 1;
llvm-svn: 78867
2009-08-13 00:05:07 +00:00
2d5bdc2bce
implement support for uniquing MachO sections.
...
llvm-svn: 78866
2009-08-12 23:55:02 +00:00
1fe315fe13
some compiler don't get string from TLOF.h implicitly or something.
...
llvm-svn: 78864
2009-08-12 23:53:59 +00:00
c4c3c66ff3
reduce #includage
...
llvm-svn: 78860
2009-08-12 23:34:27 +00:00
ff2db10211
Recognize Neon VDUP shuffles during legalization instead of selection.
...
llvm-svn: 78852
2009-08-12 22:54:19 +00:00
ea3a402ae7
Recognize Neon VREV shuffles during legalization instead of selection.
...
llvm-svn: 78850
2009-08-12 22:31:50 +00:00
1432ef864e
This void is implicit in C++.
...
llvm-svn: 78848
2009-08-12 22:10:57 +00:00
4b35448360
Generate Neon VTBL and VTBX instructions from the corresponding intrinsics.
...
llvm-svn: 78835
2009-08-12 20:51:55 +00:00
d95c962d52
Use PadToColumn instead of tabs.
...
llvm-svn: 78834
2009-08-12 18:55:32 +00:00
aee7e49c50
PredCC is meant to be 2 bits wide, like PredCC1.
...
llvm-svn: 78829
2009-08-12 18:35:50 +00:00
b369ee4c48
Enhance the InstrStage object to enable the specification of an Itinerary with overlapping stages. The default is to maintain the current behavior that the "next" stage immediately follows the previous one.
...
llvm-svn: 78827
2009-08-12 18:31:53 +00:00
3cfc6463c9
Add catch block handling to SjLj exception handling.
...
llvm-svn: 78817
2009-08-12 17:38:44 +00:00
25cae66713
Fix TableGen warnings. This partly reverts my previous change to this file,
...
leaving the mayLoad and mayStore settings around only the load/store
instructions where those can't be inferred from the patterns.
llvm-svn: 78815
2009-08-12 17:04:56 +00:00
957d0587b6
change CBE to just get TAI now, instead of TM to get TAI.
...
llvm-svn: 78813
2009-08-12 16:41:44 +00:00
4ac2f639cd
Transform -X/C to X/-C, implementing a README.txt entry.
...
llvm-svn: 78812
2009-08-12 16:37:02 +00:00
bcbae01797
CMake: Added asm file to x86_64 MSVC build.
...
llvm-svn: 78807
2009-08-12 15:54:28 +00:00
a5fdfac6ca
register naming cleanup (s/ip/r12/)
...
llvm-svn: 78806
2009-08-12 15:21:13 +00:00
9a6cf91261
Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
...
pair instead of from a virtual method on TargetMachine. This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use
TargetAsmInfo.
llvm-svn: 78802
2009-08-12 07:22:17 +00:00
ee01029811
Move immediate constant predicate templates from the Blackfin target to MathExtras.h
...
llvm-svn: 78793
2009-08-12 06:22:07 +00:00
bb2af3555c
Shrink Thumb2 movcc instructions.
...
llvm-svn: 78790
2009-08-12 05:17:19 +00:00
81348021b1
Remove another Darwin assembler workaround.
...
llvm-svn: 78779
2009-08-12 02:07:19 +00:00
fd10869d4b
80 col violation.
...
llvm-svn: 78778
2009-08-12 02:03:03 +00:00
608d92c943
Remove an Darwin assembler workaround.
...
llvm-svn: 78777
2009-08-12 01:56:42 +00:00
1e6c2a1c17
Shrink ADDS, ADC, RSB, and SUBS.
...
llvm-svn: 78776
2009-08-12 01:49:45 +00:00
f042eadd1e
Add missing chain operands for VLD* and VST* instructions.
...
Set "mayLoad" and "mayStore" on the load/store instructions.
llvm-svn: 78761
2009-08-12 00:49:01 +00:00
117c9e8497
Add contexts to some of the MVT APIs. No functionality change yet, just the infrastructure work needed to get the contexts to where they need to be first.
...
llvm-svn: 78759
2009-08-12 00:36:31 +00:00
2b083cf989
prune #include
...
llvm-svn: 78749
2009-08-11 23:07:27 +00:00
b9c1d6c86e
prune #includage.
...
llvm-svn: 78748
2009-08-11 23:06:16 +00:00
96db1abb77
fix CodeGen/PowerPC/2007-01-15-AsmDialect.ll, fallout from r78742
...
llvm-svn: 78747
2009-08-11 23:03:40 +00:00
1e9097e36a
change the -x86-asm-syntax=intel/att flag to be in X86TAI
...
instead of X86 Subtarget. This elimianates dependencies on
X86Subtarget from X86TAI.
llvm-svn: 78746
2009-08-11 23:01:09 +00:00
f6a9d06241
Shrinkify Thumb2 r = add sp, imm.
...
llvm-svn: 78745
2009-08-11 23:00:31 +00:00
97868fe1b9
second half of commit.
...
llvm-svn: 78744
2009-08-11 22:52:15 +00:00
63d5be8a7b
pass "is64Bit" flag into PPC TAI ctors instead of a whole targetmachine.
...
llvm-svn: 78743
2009-08-11 22:51:34 +00:00
e655521a28
eliminate asmflavor from subtarget, PPCTAI is the only client
...
and each callee knows that it returns.
llvm-svn: 78742
2009-08-11 22:49:34 +00:00
abdcbc7ef2
Change the asmprinter to print the comment character before the
...
"inlineasmstart/end" strings so that the contents of the directive
are separate from the comment character. This lets elf targets
get #APP/#NOAPP for free even if they don't use "#" as the comment
character. This also allows hoisting the darwin stuff up to the
shared TAI class.
llvm-svn: 78737
2009-08-11 22:39:40 +00:00
fd5defed1d
Allow a zero cycle stage to reserve/require a FU without advancing the cycle counter.
...
llvm-svn: 78736
2009-08-11 22:38:43 +00:00
54075a78b4
factorize more darwin TAI stuff. Note that this gives
...
darwin/arm support for .no_dead_strip
llvm-svn: 78734
2009-08-11 22:31:42 +00:00
526bcd461a
X86/AsmParser: Mark MOV64GSrm, MOV64FSrm, GS_MOV32rm, FS_MOV32rm as codegen only.
...
llvm-svn: 78733
2009-08-11 22:24:40 +00:00
6747b39ca5
factorize darwin ProtectedDirective and SetDirective.
...
llvm-svn: 78732
2009-08-11 22:22:44 +00:00
c4f8ea4ccb
Add 'isCodeGenOnly' bit to Instruction .td records.
...
- Used to mark fake instructions which don't correspond to an actual machine
instruction (or are duplicates of a real instruction). This is to be used for
"special cases" in the .td files, which should be ignored by things like the
assembler and disassembler. We still need a good solution to handle pervasive
duplication, like with the Int_ instructions.
- Set the bit on fake "mov 0" style instructions, which allows turning an
assembler matcher warning into a hard error.
- -2 FIXMEs.
llvm-svn: 78731
2009-08-11 22:17:52 +00:00
d832c8e87c
all darwin targets have .space and .zerofill, pull up.
...
llvm-svn: 78730
2009-08-11 22:17:31 +00:00
f710f71839
eliminate template from arm TAI
...
llvm-svn: 78729
2009-08-11 22:14:59 +00:00
374d5770f0
fix a bug I introduced in r78724 that caused failures in:
...
CodeGen/X86/dll-linkage.ll & CodeGen/X86/mingw-alloca.ll
llvm-svn: 78728
2009-08-11 22:12:58 +00:00
7faf1fd9a0
move LCOMMDirective = "\t.lcomm\t" up to DarwinTAI, eliminate
...
template in PPC backend for TAI.
llvm-svn: 78727
2009-08-11 22:06:07 +00:00
c6daf8f17c
Fix warnings.
...
llvm-svn: 78725
2009-08-11 21:59:30 +00:00
0909918514
eliminate the X86TargetAsmInfo template.
...
llvm-svn: 78724
2009-08-11 21:57:08 +00:00
f0e62eb78f
Added ADD instructions with rAX as one parameter to the Intel instruction
...
tables.
llvm-svn: 78721
2009-08-11 21:26:06 +00:00
cc9ca3500d
Shrinkify Thumb2 load / store multiple instructions.
...
llvm-svn: 78717
2009-08-11 21:11:32 +00:00
e431871851
llvm-mc/AsmParser: Allow target to specific a comment delimiter, which will be
...
used to strip hard coded comments out of .td assembly strings.
llvm-svn: 78716
2009-08-11 20:59:47 +00:00
9f94459d24
Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
...
the latter is capable of representing either a primitive or an extended type.
llvm-svn: 78713
2009-08-11 20:47:22 +00:00
2c30970b22
pass the TargetTriple down from each target ctor to the
...
LLVMTargetMachine ctor. It is currently unused.
llvm-svn: 78711
2009-08-11 20:42:37 +00:00
67e5ea2726
now that JumpTableDirective can differentate picness itself, MIPS TAI
...
no longer needs a targetmachine to initialize itself.
llvm-svn: 78710
2009-08-11 20:32:51 +00:00
fe27130454
split "JumpTableDirective" (an existing hack) into a PIC and nonPIC
...
version. This allows TAI implementations to specify the directive to use
based on the mode being codegen'd for.
The real fix for this is to remove JumpTableDirective, but I don't feel
like diving into the jumptable snarl just now.
llvm-svn: 78709
2009-08-11 20:30:58 +00:00
841850ed26
Add Thumb2 eh_sjlj_setjmp implementation
...
llvm-svn: 78701
2009-08-11 19:42:21 +00:00
1d5350c08f
fix GetInstSizeInBytes for eh_sjlj_setjmp
...
llvm-svn: 78683
2009-08-11 17:08:15 +00:00
ab2460c066
move some 32-bit instrs to x86instrinfo.td
...
llvm-svn: 78680
2009-08-11 16:58:39 +00:00
eda08015ee
This void is implicit in C++.
...
llvm-svn: 78678
2009-08-11 16:03:08 +00:00
7c50c9bd63
Tidy #includes.
...
llvm-svn: 78677
2009-08-11 16:02:12 +00:00
aa3fb65349
Simplify this code. The case where one class is GR64RegClass and the
...
other is a subclass of it is effectively handled by the prior tests.
llvm-svn: 78676
2009-08-11 15:59:48 +00:00
f24f9d9cb6
Whitespace cleanup. Remove trailing whitespace.
...
llvm-svn: 78666
2009-08-11 15:33:49 +00:00
74eb9e7bfd
Move ~ARMConstantPoolValue() to the .cpp file to avoid needing to include <cstdlib> in the header.
...
llvm-svn: 78665
2009-08-11 15:26:27 +00:00
806845daec
Fix the previous accidental commit. Now shrinking common Thumb2 load / store instructions.
...
llvm-svn: 78659
2009-08-11 09:37:40 +00:00
3606467709
Fix Thumb2 load / store addressing mode matching code. Do not use so_reg form to
...
match base only address, i.e. [r] since Thumb2 requires a offset register field.
For those, use [r + imm12] where the immediate is zero.
Note the generated assembly code does not look any different after the patch.
But the bug would have broken the JIT (if there is Thumb2 support) and it can
break later passes which expect the address mode to be well-formed.
llvm-svn: 78658
2009-08-11 08:52:18 +00:00
d4d352c663
80 column violation.
...
llvm-svn: 78657
2009-08-11 08:47:46 +00:00
192d7c0752
Cosmetic changes.
...
llvm-svn: 78655
2009-08-11 07:36:14 +00:00
6e62e93a8d
Adding a blank line back.
...
llvm-svn: 78654
2009-08-11 07:32:58 +00:00
12842f9865
Use vAny type to get rid of Neon intrinsics that differed only in whether
...
the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.
If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.
llvm-svn: 78646
2009-08-11 05:39:44 +00:00
71527c1493
llvm-mc/X86: Parse '*' correctly (in the way the matcher expects).
...
llvm-svn: 78642
2009-08-11 05:00:25 +00:00
dd4103b55b
Fixed more problems caused by 78142.
...
Passing of indirect arguments starts after return value on the callee's frame.
llvm-svn: 78635
2009-08-11 01:51:55 +00:00
741a9c7bf6
Use new EVT::vAny type to combine Neon intrinsics for VPADD.
...
llvm-svn: 78632
2009-08-11 01:15:26 +00:00
5cfb60ffc7
Added the x86 INT instructions; both the special-case INT 3 and the general-case
...
INT i8. These instructions are only for interpretation by disassemblers, not
for emission, so they do not as yet have patterns.
llvm-svn: 78630
2009-08-11 01:09:06 +00:00
b80734bb15
Fix bug in NEON convert for single-precision FP. This also fixes the tblgen warnings.
...
llvm-svn: 78629
2009-08-11 01:07:38 +00:00
9382d5ac05
Add stdlib.h
...
llvm-svn: 78627
2009-08-11 00:20:00 +00:00
693e36a3e8
SjLj based exception handling unwinding support. This patch is nasty, brutish
...
and short. Well, it's kinda short. Definitely nasty and brutish.
The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.
Built on Darwin and verified no llvm-core "make check" regressions.
llvm-svn: 78625
2009-08-11 00:09:57 +00:00
475f8a4fa2
Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck.
...
llvm-svn: 78622
2009-08-10 23:56:04 +00:00
733a64db57
Fix a bug where DAGCombine was producing an illegal ConstantFP
...
node after legalize, and remove the workaround code from the
ARM backend.
llvm-svn: 78615
2009-08-10 23:15:10 +00:00
53aa7a960c
Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
...
llvm-svn: 78610
2009-08-10 22:56:29 +00:00
d91dceea0f
Whitespace, 80-column, and isTwoAddress -> Constraints = "" changes.
...
No functional change.
llvm-svn: 78608
2009-08-10 22:37:37 +00:00
85b5b027f7
Use NEON for single-precision int<->FP conversions.
...
llvm-svn: 78604
2009-08-10 22:17:39 +00:00
148e9f0d3f
Do not rely on magic "llvm.dbg.*" global variable name to find debug info.
...
PIC16 developers, please verify.
llvm-svn: 78603
2009-08-10 22:11:20 +00:00
458c91732c
Fix up whitespace, remove commented out code.
...
llvm-svn: 78600
2009-08-10 21:48:58 +00:00
e4f79d140d
llvm-mc/AsmParser: Disambiguate i64i8imm.
...
llvm-svn: 78598
2009-08-10 21:06:41 +00:00
aeb1feb67a
llvm-mc/AsmParser: Allow .td users to redefine the names of the methods to call
...
on target specific operands for testing class membership and converting to
MCInst operands.
llvm-svn: 78597
2009-08-10 21:00:45 +00:00
3e77df2bcd
SimpleValueType-ify a few more methods on TargetLowering.
...
llvm-svn: 78595
2009-08-10 20:46:15 +00:00
f72c13bdf5
Handle the constantfp created during post-legalization dag combiner phase.
...
llvm-svn: 78594
2009-08-10 20:25:59 +00:00
246617857f
Continue the SimpleValueType-ification.
...
llvm-svn: 78593
2009-08-10 20:18:46 +00:00
0afe2cc097
llvm-mc/AsmMatcher: Fix thinko, Mem isn't a subclass of Imm.
...
llvm-svn: 78587
2009-08-10 19:08:02 +00:00
c30530d105
Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future.
...
llvm-svn: 78584
2009-08-10 18:56:59 +00:00
17410a4b92
llvm-mc/AsmMatcher: Change assembler parser match classes to their own record
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structure.
llvm-svn: 78581
2009-08-10 18:41:10 +00:00
6c20391d38
split MachO section handling stuff out to its out .h/.cpp file.
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llvm-svn: 78576
2009-08-10 18:15:01 +00:00
fbcafd4c6c
arm only needs to emit one .align directive for hidden nlp's, not one
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per pointer.
llvm-svn: 78574
2009-08-10 18:02:16 +00:00
292472d3d3
make sure that arm nonlazypointers are aligned properly
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llvm-svn: 78573
2009-08-10 18:01:34 +00:00
ec64b73712
Fix a weird ppc64-specific link error during an llvm-gcc build:
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ld: bad offset (0x00000091) for lo14 instruction pic-base fix-up in ___popcountdi2 from libgcc/./_popcountsi2_s.o
The problem is that the non lazy symbol pointers need to be 8 byte aligned
on ppc64 and .section doesn't have an implicit alignment like ".non_lazy_symbol_pointer"
does.
llvm-svn: 78572
2009-08-10 17:58:51 +00:00
7b01bf6125
fix some warnings for the MSVC build, by Yonggang Luo!
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llvm-svn: 78571
2009-08-10 17:35:42 +00:00
62e053b790
Checkpoint scheduling itinerary changes.
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llvm-svn: 78564
2009-08-10 15:56:13 +00:00
5bb93ce769
Watch out for empty BB.
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llvm-svn: 78562
2009-08-10 08:10:13 +00:00
8a640ae504
rev, rev16, and revsh do not set CPSR.
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llvm-svn: 78561
2009-08-10 07:58:45 +00:00
f16a1d5b79
Duh. Most 16-bit Thumb rr instructions are two-address. Fix table.
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llvm-svn: 78560
2009-08-10 07:20:37 +00:00
1f5bee14a1
CPSR can be livein; transfer predicate operands correctly; tMUL is two-address.
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llvm-svn: 78559
2009-08-10 06:57:42 +00:00
092b701a2c
Add support for folding loads / stores into 16-bit moves used by Thumb2.
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llvm-svn: 78558
2009-08-10 06:32:05 +00:00
55c014a9f3
80 col violation.
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llvm-svn: 78557
2009-08-10 05:51:48 +00:00
f5b73869f2
Use tMOVgpr2gpr instead of t2MOVr.
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llvm-svn: 78556
2009-08-10 05:49:43 +00:00
51cbd2d6c4
Add support to reduce most of 32-bit Thumb2 arithmetic instructions.
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llvm-svn: 78550
2009-08-10 02:37:24 +00:00
5b4c308f0c
Always use the 16-bit tMOVgpr2gpr instead of the 32-bit t2MOVr.
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llvm-svn: 78549
2009-08-10 02:06:53 +00:00
cb307a27bf
Make the big switch: Change MCSectionMachO to represent a section *semantically*
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instead of syntactically as a string. This means that it keeps track of the
segment, section, flags, etc directly and asmprints them in the right format.
This also includes parsing and validation support for llvm-mc and
"attribute(section)", so we should now start getting errors about invalid
section attributes from the compiler instead of the assembler on darwin.
Still todo:
1) Uniquing of darwin mcsections
2) Move all the Darwin stuff out to MCSectionMachO.[cpp|h]
3) there are a few FIXMEs, for example what is the syntax to get the
S_GB_ZEROFILL segment type?
llvm-svn: 78547
2009-08-10 01:39:42 +00:00
6e046f4291
Use abs64 instead abs; some platforms don't have a 64-bit abs overload. Noticed by Yonggang Luo!
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llvm-svn: 78543
2009-08-09 22:37:07 +00:00
d461c1c559
Add support to convert 32-bit instructions to 16-bit non-two-address ones.
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llvm-svn: 78540
2009-08-09 19:17:19 +00:00
8e33cb2de1
llvm-mc/AsmParser: Implement user defined super classes.
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- We can now discriminate SUB32ri8 from SUB32ri, for example.
llvm-svn: 78530
2009-08-09 07:20:21 +00:00
447c4ab91d
Extend comment on ParserMatchClass .td field, and add some missing
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classes for X86.
llvm-svn: 78524
2009-08-09 06:00:04 +00:00
c32aa060bd
llvm-mc/AsmParser: Define match classes in the .td file.
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-2 FIXMEs.
llvm-svn: 78523
2009-08-09 05:18:30 +00:00
591105c540
sink the 'name' and 'isdirective' state out of MCSection into its derived classes.
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This totally optimizes PIC16 sections by not having an 'isdirective' bit anymore!! ;-)
llvm-svn: 78517
2009-08-08 23:39:42 +00:00
cfed3005e5
Use subclassing to print lane-like immediates (w/o hash) eliminating
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'no_hash' modifier. Hopefully this will make Daniel happy :)
llvm-svn: 78514
2009-08-08 23:10:41 +00:00
3219d85f16
add a note about dead zero extends.
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llvm-svn: 78511
2009-08-08 22:46:59 +00:00
1cb9396f4f
1. Make MCSection an abstract class.
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2. Move section switch printing to MCSection virtual method which takes a
TAI. This eliminates textual formatting stuff from TLOF.
3. Eliminate SwitchToSectionDirective, getSectionFlagsAsString, and
TLOFELF::AtIsCommentChar.
llvm-svn: 78510
2009-08-08 22:41:53 +00:00
7dfa9f2e56
Add crc32 instruction and intrinsics. Add a new class of prefix
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bytes for F2 0F 38 and propagate. Add a FIXME for a set
of possibilities which correspond to intrinsics already used.
New test.
llvm-svn: 78508
2009-08-08 21:55:08 +00:00
Daniel Dunbar