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Author SHA1 Message Date
Justin Holewinski 3e037d98e6 [NVPTX] Rename registers %fl -> %fd and %rl -> %rd 
This matches the internal behavior of NVIDIA tools like libnvvm.

llvm-svn: 213168
 2014-07-16 16:26:58 +00:00
Eli Bendersky a7b6679774 Add test to test/CodeGen/NVPTX for "alloca buffer" arguments. 
Make sure such IR gets properly lowered to PTX.

llvm-svn: 204624
 2014-03-24 16:52:30 +00:00