Commit Graph

8 Commits

Author SHA1 Message Date
Eli Friedman c064f2c33e Convert more tests over to the new atomic instructions.
llvm-svn: 140559
2011-09-26 20:27:49 +00:00
Akira Hatanaka 4444daeec5 Drop support for Mips1 and Mips2.
llvm-svn: 139405
2011-09-09 20:45:50 +00:00
Akira Hatanaka a4c09bce9b Lower memory barriers to sync instructions.
llvm-svn: 135537
2011-07-19 23:30:50 +00:00
Akira Hatanaka f3b29992d5 Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL or
ANDi, when the instruction does not have any immediate operands.

llvm-svn: 135520
2011-07-19 20:34:00 +00:00
Akira Hatanaka e450358a21 Remove redundant instructions.
- In EmitAtomicBinaryPartword, mask incr in loopMBB only if atomic.swap is the
  instruction being expanded, instead of masking it in thisMBB. 
- Remove redundant Or in EmitAtomicCmpSwap. 

llvm-svn: 135495
2011-07-19 18:14:26 +00:00
Akira Hatanaka 338879a7f4 Do not treat atomic.load.sub differently than other atomic binary intrinsics.
llvm-svn: 135418
2011-07-18 19:58:59 +00:00
Akira Hatanaka 27292638bd Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from
moving them out of the loop. Previously, stores and loads to a stack frame
object were inserted to accomplish this. Remove the code that was needed to do
this. Patch by Sasa Stankovic.

llvm-svn: 135415
2011-07-18 18:52:12 +00:00
Bruno Cardoso Lopes 98fc4c8bbc This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.

Patch by Sasa Stankovic.

llvm-svn: 132323
2011-05-31 02:54:07 +00:00