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6522 Commits

Author SHA1 Message Date
Jim Laskey 7c3cab9ddc Honor the command line specification for machine type. 
llvm-svn: 32483
 2006-12-12 16:07:33 +00:00
Rafael Espindola 470d61d82c don't use "ordinary" addressing mode 1 when mvn is appropriate 
llvm-svn: 32482
 2006-12-12 14:03:29 +00:00
Jim Laskey 095e6f3044 Reduce number of instructions to load 64-bit constants. 
llvm-svn: 32481
 2006-12-12 13:23:43 +00:00
Reid Spencer b341b0861d Change inferred getCast into specific getCast. Passes all tests. 
llvm-svn: 32469
 2006-12-12 05:05:00 +00:00
Rafael Espindola 9fa0a26808 use MVN to handle small negative constants 
llvm-svn: 32459
 2006-12-12 01:03:11 +00:00
Rafael Espindola 1bbe581d0f add mvn 
llvm-svn: 32454
 2006-12-12 00:37:38 +00:00
Reid Spencer 2075374e28 Fix the BitCastUnion type for 32-bit targets. 
llvm-svn: 32453
 2006-12-12 00:11:08 +00:00
Rafael Espindola eb3e8d75df add note 
llvm-svn: 32452
 2006-12-11 23:56:10 +00:00
Chris Lattner f4646a7e54 Another step forward in PPC64 JIT support: we now no-longer need stubs 
emitted for external globals in PPC64-JIT-PIC mode (which is good because
we didn't handle them before!).

This also fixes a bug handling the picbase delta, which we would get wrong
in some cases.

llvm-svn: 32451
 2006-12-11 23:22:45 +00:00
Chris Lattner b1f3157638 getInstrItineraryData shouldn't copy the itineraries 
llvm-svn: 32448
 2006-12-11 21:42:55 +00:00
Reid Spencer b943555716 Implement correct bitcast of int<->float and long<->double by using a 
union to perform the bitcast.

llvm-svn: 32444
 2006-12-11 20:39:15 +00:00
Jim Laskey 2b136a73bd Missing opcode. 
llvm-svn: 32439
 2006-12-11 18:45:56 +00:00
Jim Laskey e95909a4ef Layout proper frame for ppc64. 
llvm-svn: 32436
 2006-12-11 18:10:54 +00:00
Nate Begeman e8da58b3f9 Properly mangles symbol table names 
Supports constant pools
Supports relocations to jump tables
Supports relocations within the data segment (global = address of global)
Allocates memory in a non-hacky for all non-code objects.

llvm-svn: 32430
 2006-12-11 02:20:45 +00:00
Chris Lattner a11aa92e6b Update note, with the SROA change, we now produce: 
_pairtest:
        movl 8(%esp), %eax
        movl 4(%esp), %ecx
        movd %eax, %xmm0
        movd %ecx, %xmm1
        addss %xmm0, %xmm1
        movl 12(%esp), %eax
        movss %xmm1, (%eax)
        ret

instead of:

_pairtest:
        subl $12, %esp
        movl 20(%esp), %eax
        movl %eax, 4(%esp)
        movl 16(%esp), %eax
        movl %eax, (%esp)
        movss (%esp), %xmm0
        addss 4(%esp), %xmm0
        movl 24(%esp), %eax
        movss %xmm0, (%eax)
        addl $12, %esp
        ret

llvm-svn: 32427
 2006-12-11 01:20:25 +00:00
Chris Lattner 6727f2a5f9 this is done 
llvm-svn: 32424
 2006-12-11 01:01:03 +00:00
Chris Lattner feeb9c7be5 Evan implemented the machineinstr improvements. 
The rot example works if the type is cast to ubyte.

Move sroa examples together and upgrade them to HEAD syntax.

llvm-svn: 32423
 2006-12-11 00:44:03 +00:00
Anton Korobeynikov 3b7c257cae Cleaned setjmp/longjmp lowering interfaces. Now we're producing right 
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.

llvm-svn: 32415
 2006-12-10 23:12:42 +00:00
Jim Laskey 6af2220815 Reverting until finding the cause of secondary bugs. 
llvm-svn: 32413
 2006-12-10 13:09:42 +00:00
Jim Laskey 04c832d4ab __PPC64CompilationCallback code was allowing registers to be clobbered by stub. 
llvm-svn: 32412
 2006-12-10 12:13:31 +00:00
Rafael Espindola b8ada08b26 .align is in bits 
.comm is in bytes
:-(

llvm-svn: 32408
 2006-12-10 02:53:14 +00:00
Rafael Espindola b313efb0cd fix test/Regression/CodeGen/X86/weak.ll 
if a variable has no initialization, I->getInitializer() will fail

llvm-svn: 32407
 2006-12-09 23:14:08 +00:00
Evan Cheng e107a8b872 Added option -soft-float to generate SW fp library calls instead of fp instructions. 
llvm-svn: 32393
 2006-12-09 02:41:30 +00:00
Rafael Espindola d12d2250a7 %progbits not @progbits 
llvm-svn: 32376
 2006-12-08 22:06:02 +00:00
Rafael Espindola 94f29f129d add \"aw\",@progbits" to ctors and dtors 
llvm-svn: 32373
 2006-12-08 21:24:58 +00:00
Evan Cheng 78cb08d082 Move findTiedToSrcOperand to TargetInstrDescriptor. 
llvm-svn: 32366
 2006-12-08 18:45:48 +00:00
Rafael Espindola 87f4382163 fix truncstorei1 
llvm-svn: 32364
 2006-12-08 18:41:21 +00:00
Andrew Lenharth dcb3c978c4 Packed Structures 
llvm-svn: 32361
 2006-12-08 18:06:16 +00:00
Evan Cheng b5f1c22e94 Use MI's TargetInstrDescriptor. 
llvm-svn: 32352
 2006-12-08 07:57:56 +00:00
Chris Lattner 5040f58ae4 Fix a bug introduced by the streams patch. DEBUG code was made unconditional. 
llvm-svn: 32351
 2006-12-08 05:41:26 +00:00
Chris Lattner 09fecf9a47 this is an initial patch to switch the ppc64 jit over to working in PIC mode, 
which allows the code to be above the 2G marker.  We still need to JIT emit
dyld stubs to support external, weak, common, etc globals, but that will
happen tomorrow.

llvm-svn: 32348
 2006-12-08 04:54:03 +00:00
Chris Lattner 4d475f6e6e add a note 
llvm-svn: 32347
 2006-12-08 02:01:32 +00:00
Andrew Lenharth 085cfdbfdc Simplify a bit 
llvm-svn: 32343
 2006-12-07 23:55:55 +00:00
Chris Lattner 13535c2d93 fix incorrect encoding of rldicr, used by ppc64 function stubs, etc. 
llvm-svn: 32341
 2006-12-07 23:44:07 +00:00
Bill Wendling 30c0f3367c Don't use <sstream> in Streams.h but <iosfwd> instead. 
llvm-svn: 32340
 2006-12-07 23:41:45 +00:00
Rafael Espindola 265fa68bd8 fix alignment 
llvm-svn: 32337
 2006-12-07 22:38:06 +00:00
Bill Wendling 9bfb1e1f29 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Chris Lattner a9a817dc7d fix CodeGen/PowerPC/2006-12-07-LargeAlloca.ll on ppc64 
llvm-svn: 32331
 2006-12-07 22:15:58 +00:00
Rafael Espindola 219a796475 make sure that we don't use a common symbol if a section was specified 
llvm-svn: 32310
 2006-12-07 18:33:58 +00:00
Andrew Lenharth 76a61eb054 Be sure to grab weak functions too, and make implicit defs comments 
llvm-svn: 32308
 2006-12-07 17:39:14 +00:00
Chris Lattner d8e7451dc3 Fix i64 uint_to_fp on ppc64 
llvm-svn: 32297
 2006-12-07 01:24:16 +00:00
Evan Cheng e312c152d2 MI keeps a ptr of TargetInstrDescriptor, use it. 
llvm-svn: 32296
 2006-12-07 01:21:59 +00:00
Chris Lattner 43c0eb839c implement sextinreg i8->i64 and i16->i64 
llvm-svn: 32293
 2006-12-06 21:46:13 +00:00
Chris Lattner 9472eb83c3 fix another sradi encoding bug. This fixes Olden/health with the ppc64 jit. 
llvm-svn: 32291
 2006-12-06 21:35:10 +00:00
Reid Spencer b8cf1ff83c Always pass "true" to isMaxValue(bool) because we know the type is LongTy. 
llvm-svn: 32290
 2006-12-06 21:27:07 +00:00
Reid Spencer de09dea742 Adjust to new ConstantIntegral interface for Max/Min tests. 
llvm-svn: 32289
 2006-12-06 20:45:15 +00:00
Chris Lattner aeadac88ea fix the jit encoding of sradi, simplify the MDForm1 description. 
llvm-svn: 32285
 2006-12-06 20:02:54 +00:00
Chris Lattner 1fa392dbfa add relocation support for ppc64 branches. 
llvm-svn: 32284
 2006-12-06 19:40:04 +00:00
Chris Lattner 7c779fcad4 add #include 
llvm-svn: 32281
 2006-12-06 18:19:53 +00:00
Chris Lattner f06bb658a8 add missing #include 
llvm-svn: 32280
 2006-12-06 18:14:47 +00:00
Chris Lattner 700b873130 Detemplatize the Statistic class. The only type it is instantiated with 
is 'unsigned'.

llvm-svn: 32279
 2006-12-06 17:46:33 +00:00
Jim Laskey 527c12f8e6 Make it easier for gdb to find the return address. 
llvm-svn: 32277
 2006-12-06 17:42:06 +00:00
Rafael Espindola 776abee608 print weak references 
llvm-svn: 32276
 2006-12-06 13:35:10 +00:00
Chris Lattner 81cf22d873 These asm printers shouldn't use assembly/writer.h 
llvm-svn: 32262
 2006-12-06 06:13:25 +00:00
Evan Cheng 47e181cc4d Revert an unintended change. 
llvm-svn: 32239
 2006-12-05 22:03:40 +00:00
Evan Cheng dd60ca029c - Switch X86-64 JIT to large code size model. 
- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.

llvm-svn: 32238
 2006-12-05 19:50:18 +00:00
Chris Lattner c20b7e878a If we have ScalarSSE, we can select bitconvert into single instructions. 
This compiles bitcast.ll:test3/test4 into:

_test3:
        movd %xmm0, %eax
        ret
_test4:
        movd %edi, %xmm0
        ret

llvm-svn: 32230
 2006-12-05 18:45:06 +00:00
Chris Lattner 57a41985e3 Add a perf optzn corresponding to PR1033. 
llvm-svn: 32229
 2006-12-05 18:25:10 +00:00
Chris Lattner 55c17f9177 Fix PR1033 and CodeGen/X86/bitcast.ll, by expanding bitcast to a load/store pair. 
This could be better, readme entry pending.

llvm-svn: 32228
 2006-12-05 18:22:22 +00:00
Rafael Espindola b5dee63958 expand memmove and memcpy 
llvm-svn: 32226
 2006-12-05 17:57:23 +00:00
Rafael Espindola 96fd6447c7 add support for the "r" asm constraint 
patch by Lauro Ramos Venancio

llvm-svn: 32224
 2006-12-05 17:37:31 +00:00
Chris Lattner a16201c672 Fix typo noticed by Lauro Ramos Venancio, thanks! 
llvm-svn: 32223
 2006-12-05 17:29:40 +00:00
Rafael Espindola 2369a024d7 add support for weak linkage 
llvm-svn: 32222
 2006-12-05 17:00:17 +00:00
Evan Cheng 3b235aa5dc JIT large code model support. 
llvm-svn: 32220
 2006-12-05 07:29:55 +00:00
Evan Cheng 8e0e9fbe7b Asm printing bug. 
llvm-svn: 32218
 2006-12-05 06:43:58 +00:00
Evan Cheng 62cdc3f011 - Fix X86-64 JIT by temporarily disabling code that treats GV address as 32-bit 
immediate in small code model. The JIT cannot ensure GV's are placed in the
lower 4G.
- Some preliminary support for large code model.

llvm-svn: 32215
 2006-12-05 04:01:03 +00:00
Evan Cheng 830f224bf5 Update 
llvm-svn: 32214
 2006-12-05 03:58:23 +00:00
Chris Lattner d139ddd2e6 Add support for 64-bit 'r' constraint. Patch by by Rafael ~Avila de Espíndol! 
This fixes PR1029 and Regression/CodeGen/X86/x86-64-asm.ll

llvm-svn: 32206
 2006-12-04 22:38:21 +00:00
Jim Laskey e4f4d048dd Restoration of the stack pointer after a deallocation of a alloca was not 
updating the SP link.

llvm-svn: 32202
 2006-12-04 22:04:42 +00:00
Evan Cheng 0c2a74a487 Non-darwin gcc should default to static relocation to match gcc. 
llvm-svn: 32184
 2006-12-04 18:07:10 +00:00
Evan Cheng 67fc141db5 Match TargetInstrInfo changes. 
llvm-svn: 32098
 2006-12-01 21:52:58 +00:00
Evan Cheng 07fc107e90 convertToThreeAddress() is now responsible for updating live info as well as inserting the new MI's. 
llvm-svn: 32097
 2006-12-01 21:52:41 +00:00
Evan Cheng 022030a425 Add weak reference directive. 
llvm-svn: 32091
 2006-12-01 20:47:11 +00:00
Evan Cheng b689d32b20 Copy and paste error. An initialized global cannot be a weak reference. 
llvm-svn: 32075
 2006-12-01 17:39:22 +00:00
Jim Laskey 1b0bc794e6 1. In ppc64 mode we need only use one GPR. 
2. Float values need to be promoted to double when they are vararg.

llvm-svn: 32074
 2006-12-01 16:30:47 +00:00
Jim Laskey 311622f912 ExternalWeak case in wrong location. 
llvm-svn: 32073
 2006-12-01 14:37:39 +00:00
Evan Cheng 845bd6e096 Fix 2005-05-08-FPStackifierPHI.ll failure. 
llvm-svn: 32071
 2006-12-01 10:11:51 +00:00
Evan Cheng 5fb2c76d59 A initialized global variable cannot be extern weak. However, if a global value's initializer is itself a external weak symbol, emit the weak reference. 
llvm-svn: 32069
 2006-12-01 09:13:26 +00:00
Evan Cheng fa54c0b6fb Darwin PPC external weak linkage support. 
llvm-svn: 32068
 2006-12-01 07:56:37 +00:00
Evan Cheng 5b020349f2 Minor code clean up. 
llvm-svn: 32067
 2006-12-01 07:38:23 +00:00
Evan Cheng db66456285 Fix indentation. 
llvm-svn: 32066
 2006-12-01 07:17:00 +00:00
Evan Cheng 6476a3b4ba Darwin X86 external weak linkage support. 
llvm-svn: 32065
 2006-12-01 07:15:24 +00:00
Chris Lattner 09ed0ff2ac Fix the CodeGen/PowerPC/vec_constants.ll regression. 
llvm-svn: 32057
 2006-12-01 01:45:39 +00:00
Anton Korobeynikov 12c94949e0 Introducing external weak linkage. Darwin codegen should be added later. 
llvm-svn: 32052
 2006-12-01 00:25:12 +00:00
Anton Korobeynikov 6dbdfe2baa Factor out GVRequiresExtraLoad() from .h to .cpp 
llvm-svn: 32048
 2006-11-30 22:42:55 +00:00
Evan Cheng ae1cd75af7 - Use a different wrapper node for RIP-relative GV, etc. 
- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.

llvm-svn: 32046
 2006-11-30 21:55:46 +00:00
Evan Cheng aafeaef8c8 MachineInstr::setOpcode -> MachineInstr::setInstrDescriptor 
llvm-svn: 32034
 2006-11-30 07:12:03 +00:00
Evan Cheng fef6400f01 Remove the ugly SPARCV9 TargetInstrDescriptors hack. 
llvm-svn: 32033
 2006-11-30 07:10:43 +00:00
Evan Cheng 7a9238c84d In PIC mode, GV not requiring an extra load can be used as address immediate. 
llvm-svn: 32028
 2006-11-29 23:48:14 +00:00
Evan Cheng 8c84c7cd0d Clean up. 
llvm-svn: 32027
 2006-11-29 23:46:27 +00:00
Evan Cheng 0b1692216d Fix for PR1018 - Better support for X86-64 Linux in small code model. 
llvm-svn: 32026
 2006-11-29 23:19:46 +00:00
Chris Lattner 2f648fc55d Fix bug codegen'ing FP constant vectors with integer splats. Make sure the 
created intrinsics have the right integer types.  This fixes
PowerPC/2006-11-29-AltivecFPSplat.ll

llvm-svn: 32024
 2006-11-29 19:58:49 +00:00
Jim Laskey 152671f0bf Offset for load of 32-bit arg in 64-bit world was incorrect. 
llvm-svn: 32019
 2006-11-29 13:37:09 +00:00
Evan Cheng 28a9e9b230 Custom lower READCYCLECOUNTER for x86-64. 
llvm-svn: 32017
 2006-11-29 08:28:13 +00:00
Chris Lattner 0d67dde00a done 
llvm-svn: 32013
 2006-11-29 07:21:46 +00:00
Evan Cheng 8facb43593 16-byte stack alignment for X86-64 ELF. Patch by Dan Gohman. 
llvm-svn: 32004
 2006-11-29 02:00:40 +00:00
Chris Lattner 38084725a2 Upgrade the ugly darwin 64-bit bswap idiom (bswap %eax / bswap %edx / 
xchgl %eax, %edx) to llvm.bswap.i64.  This compiles:

long long test2(long long A) {
  return _OSSwapInt64(A);
}

to:

_test2:
        movl 8(%esp), %eax
        movl 4(%esp), %edx
        bswapl %eax
        bswapl %edx
        ret

instead of:

_test2:
        movl 8(%esp), %edx
        movl 4(%esp), %eax
        bswap   %eax
        bswap   %edx
        xchgl   %eax, %edx
        ret

GCC manages (with -fomit-frame-pointer) the uglier:

_test2:
        subl    $4, %esp
        movl    8(%esp), %eax
        movl    12(%esp), %edx
        bswap   %eax
        bswap   %edx
        xchgl   %eax, %edx
        addl    $4, %esp
        ret

llvm-svn: 32001
 2006-11-29 01:48:01 +00:00
Chris Lattner 0fc6ae0c3d Trivially lower 'bswap $0' into llvm.bswap. This fixes hexxagon with the 
JIT on darwin/x86, which has htonl implemented as inline asm.

llvm-svn: 31999
 2006-11-29 01:14:06 +00:00
Andrew Lenharth 904ca9c688 gcc doesn't like an empty colbber list 
llvm-svn: 31987
 2006-11-28 23:07:32 +00:00
Andrew Lenharth f52ae7ec72 Identities are default now 
llvm-svn: 31980
 2006-11-28 22:28:08 +00:00
Andrew Lenharth 8b59fd03c2 Make identity default, and fix PR1020 
llvm-svn: 31979
 2006-11-28 22:25:32 +00:00
Evan Cheng 69b1825488 New entries. 
llvm-svn: 31976
 2006-11-28 19:59:25 +00:00
Andrew Lenharth 7f739d5bdd update comments 
llvm-svn: 31975
 2006-11-28 19:56:02 +00:00
Andrew Lenharth 212f15fa8a Get the asminfo for the target most closely matching the module and use that for inline asm 
llvm-svn: 31974
 2006-11-28 19:53:36 +00:00
Andrew Lenharth 2675e23a7e X86 asm -> gcc asm translation table (incomplete) 
llvm-svn: 31973
 2006-11-28 19:52:49 +00:00
Andrew Lenharth ff35b449a0 Add per-target support for asm translation in the cbe 
llvm-svn: 31972
 2006-11-28 19:52:20 +00:00
Jim Laskey 40182179b6 Remove debug code. 
llvm-svn: 31970
 2006-11-28 18:27:02 +00:00
Jim Laskey ec05b046c7 Prime text sections to improve branch locality in large object files. 
llvm-svn: 31969
 2006-11-28 18:21:52 +00:00
Jim Laskey f4e2e009d9 32-bit int space was not accounted for properly in lowerCall. 
llvm-svn: 31966
 2006-11-28 14:53:52 +00:00
Evan Cheng 8ddbdc70b7 Fix JIT encoding bugs for shift / rotate by one ops. 
llvm-svn: 31952
 2006-11-28 01:28:00 +00:00
Andrew Lenharth e8c64aba11 Preliminary support for inline asm in the cbe. The target specific ugliness 
is still in Writer, but issolated to a single function. This might be split
into something in each target directory.  This is sufficient to get through
archie and an strcpy impl on linux-x86.

Module level asm is not handled.

llvm-svn: 31948
 2006-11-27 23:50:49 +00:00
Evan Cheng 20350c4025 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.

llvm-svn: 31947
 2006-11-27 23:37:22 +00:00
Reid Spencer 16eaffe595 When truncating to bool, it is necessary to & with 1 for all casts that 
can result in a bool. Previously PtrToInt, FPToUI and FPToSI were missing
this operation.

llvm-svn: 31938
 2006-11-27 18:51:06 +00:00
Reid Spencer 6c38f0bb07 For PR950: 
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.

llvm-svn: 31931
 2006-11-27 01:05:10 +00:00
Duraid Madina 24cdf575e7 fix storing bools to mem and unordered FP ops 
llvm-svn: 31920
 2006-11-26 04:34:26 +00:00
Reid Spencer 6968c497de Add newline at end of file. 
llvm-svn: 31902
 2006-11-25 05:41:02 +00:00
Anton Korobeynikov 5b96cdebb0 Refactored *GVRequiresExtraLoad() to Subtarget method. 
llvm-svn: 31887
 2006-11-21 00:01:06 +00:00
Chris Lattner ec5dbccdcf in ppc64-mode, don't allocate the 32-bit version of r13 either. 
llvm-svn: 31884
 2006-11-20 20:48:05 +00:00
Chris Lattner ac36360348 r13 is the thread pointer on darwin/ppc64, don't allocate it. 
llvm-svn: 31882
 2006-11-20 19:33:51 +00:00
Chris Lattner 3e96211bc8 Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bit 
features autodetected.  This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.

llvm-svn: 31879
 2006-11-20 18:16:05 +00:00
Anton Korobeynikov 37d080b11d We should perform extra load for dllimported calls 
llvm-svn: 31874
 2006-11-20 10:46:14 +00:00
Chris Lattner 2cca385fbb on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots. 
Also, valist should create a pointer RC reg class value, not a GPRC value.

llvm-svn: 31840
 2006-11-18 01:57:19 +00:00
Chris Lattner 572e238c14 make sure to safe LR8 in the right stack slot for PPC64 
llvm-svn: 31839
 2006-11-18 01:34:43 +00:00
Chris Lattner 9ca15c8914 Pretty print 'rldicr r2, r2, 2, 61' as 'sldi r2, r2, 2'. 
llvm-svn: 31838
 2006-11-18 01:23:56 +00:00
Chris Lattner 542dfd5510 Rewrite the branch selector to be correct in the face of large functions. 
The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model.  This fixes assembler errors when compiling 403.gcc with
tail merging enabled.

Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion.  Only if branches need expansion are instructions rewritten
and created.  This should make branch select faster, and eliminates the
Bxx instructions from the .td file.

llvm-svn: 31837
 2006-11-18 00:32:03 +00:00
Chris Lattner 33fc1d45e5 add encoding for BCC, after finally wrestling strange ppc/tblgen endianness 
issues to the ground.

llvm-svn: 31836
 2006-11-17 23:53:28 +00:00
Chris Lattner be9377a1e3 convert PPC::BCC to use the 'pred' operand instead of separate predicate 
value and CR reg #.  This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(

llvm-svn: 31835
 2006-11-17 22:37:34 +00:00
Chris Lattner e0263794f4 rename PPC::COND_BRANCH to PPC::BCC 
llvm-svn: 31834
 2006-11-17 22:14:47 +00:00
Chris Lattner 8c6a41ea12 start using PPC predicates more consistently. 
llvm-svn: 31833
 2006-11-17 22:10:59 +00:00
Evan Cheng 9e8093ae20 For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while 
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.

llvm-svn: 31832
 2006-11-17 22:10:14 +00:00
Jim Laskey de5fa025ab Hopefully a good crack at making debugging work on intel -disable-fp-elim. 
llvm-svn: 31830
 2006-11-17 21:19:15 +00:00
Jim Laskey 73106b5e2a Assert unhandled case. 
llvm-svn: 31828
 2006-11-17 18:49:39 +00:00
Jim Laskey 1823346b3e 1. Ignore the -disable-fp-elim when the routine is a leaf. 
2. Offsets on 64-bit stores are still in bytes.

llvm-svn: 31824
 2006-11-17 16:09:31 +00:00
Jim Laskey 91542a4f2d Typo. Fix the nightly tests. 
llvm-svn: 31823
 2006-11-17 14:06:41 +00:00
Bill Wendling c8e81b8d48 Removed even more std::cerr and #include <iostream> things. 
llvm-svn: 31813
 2006-11-17 07:52:03 +00:00
Chris Lattner 3b7261b18e implement a todo: change a map into a vector 
llvm-svn: 31805
 2006-11-17 01:52:23 +00:00
Chris Lattner be1a4d80b3 fix typo 
llvm-svn: 31799
 2006-11-17 00:49:36 +00:00
Chris Lattner a715288b40 implicit_def_vrrc doesn't generate code. 
llvm-svn: 31797
 2006-11-16 23:49:52 +00:00
Evan Cheng 572dc9cb4e Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. 
llvm-svn: 31795
 2006-11-16 23:33:25 +00:00
Evan Cheng 7ae482c52a Fix a potential bug: MOVPDI2DI, etc. are not copy instructions. 
llvm-svn: 31794
 2006-11-16 23:22:26 +00:00
Jim Laskey 48850c10c0 This is a general clean up of the PowerPC ABI. Address several problems and 
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.

llvm-svn: 31792
 2006-11-16 22:43:37 +00:00
Chris Lattner 30055b9208 fix a regression that I introduced. stdu should scale the offset by 4 
before printing it.

llvm-svn: 31791
 2006-11-16 21:45:30 +00:00
Evan Cheng c5e769710e Align stubs on 4 byte boundary. This fixes 447.dealII. 
llvm-svn: 31790
 2006-11-16 20:13:34 +00:00
Chris Lattner 96d7386006 add a statistic 
llvm-svn: 31785
 2006-11-16 18:13:49 +00:00
Chris Lattner a7ff5162b0 fix broken encoding 
llvm-svn: 31778
 2006-11-16 01:01:28 +00:00
Chris Lattner e742d9a4b7 add ppc64 r+i stores with update. 
llvm-svn: 31776
 2006-11-16 00:57:19 +00:00
Chris Lattner 6f5840c409 add patterns for ppc32 preinc stores. ppc64 next. 
llvm-svn: 31775
 2006-11-16 00:41:37 +00:00
Chris Lattner 3a494989a6 switch these back to the 'bad old way' 
llvm-svn: 31774
 2006-11-16 00:33:34 +00:00
Chris Lattner b4e911d15a Fix ppc64 epilog bug. 
llvm-svn: 31771
 2006-11-15 23:35:30 +00:00
Chris Lattner 5771156be0 Stop using isTwoAddress, switching to operand constraints instead. 
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).

llvm-svn: 31770
 2006-11-15 23:24:18 +00:00
Chris Lattner 5c23899c7d add a new field needed by the code emitter generator. 
llvm-svn: 31768
 2006-11-15 22:55:04 +00:00
Evan Cheng dc2c8748a7 Properly transfer kill / dead info. 
llvm-svn: 31765
 2006-11-15 20:58:11 +00:00
Evan Cheng bbbcac39e6 Kill / dead info has been moved to MI's. 
llvm-svn: 31764
 2006-11-15 20:56:39 +00:00
Evan Cheng c57819d4a3 commuteInstruction should propagate kill / dead info. 
llvm-svn: 31763
 2006-11-15 20:56:03 +00:00
Chris Lattner 474b5b7c95 fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri 
addrmodes.

llvm-svn: 31757
 2006-11-15 19:55:13 +00:00
Chris Lattner 2775aba51d Simplify IntrinsicLowering and clarify that it is only for use by the 
CBE and interpreter.

llvm-svn: 31755
 2006-11-15 18:00:10 +00:00
Chris Lattner 60c2a0154a Remove unneeded forward decls 
llvm-svn: 31754
 2006-11-15 17:53:13 +00:00
Chris Lattner 0e117c7e9d Fix the PPC regressions last night 
llvm-svn: 31752
 2006-11-15 17:40:51 +00:00
Chris Lattner 1396961e85 Switch loads over to use memri as the operand instead of a reg/imm operand 
pair for cleanliness.  Add instructions for PPC32 preinc-stores with commented
out patterns.  More improvement is needed to enable the patterns, but we're
getting close.

llvm-svn: 31749
 2006-11-15 02:43:19 +00:00
Evan Cheng cf772f7eca Revert. This wasn't meant to be checked in. 
llvm-svn: 31737
 2006-11-14 19:20:33 +00:00
Chris Lattner e79a451475 group load and store instructions together. No functionality change. 
llvm-svn: 31736
 2006-11-14 19:19:53 +00:00
Chris Lattner 58e8bed48e Fix predicates for unindexed stores so they don't accidentally match indexed 
stores.

llvm-svn: 31735
 2006-11-14 19:13:39 +00:00
Chris Lattner 44dbdbe5cf Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls 
clobber.  This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity.  This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.

llvm-svn: 31734
 2006-11-14 18:44:47 +00:00
Chris Lattner b542925b22 remove a ton of custom selection logic no longer needed 
llvm-svn: 31733
 2006-11-14 18:43:11 +00:00
Chris Lattner 4916acbd0f it would be nice of ctlz were lowered to bsf etc. 
llvm-svn: 31730
 2006-11-14 08:08:46 +00:00
Chris Lattner 97ff46b3cc lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of 
'(shr (ctlz (sub Y, Z)), 5)'.

The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner.  For example, this:

typedef struct {
  unsigned prefix : 4;
  unsigned code : 4;
  unsigned unsigned_p : 4;
} tree_common;

int foo(tree_common *a, tree_common *b) {
  return a->code == b->code;
}

Now compiles to:

_foo:
        lwz r2, 0(r4)
        lwz r3, 0(r3)
        xor r2, r3, r2
        rlwinm r2, r2, 28, 28, 31
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

instead of:

_foo:
        lbz r2, 3(r4)
        lbz r3, 3(r3)
        srwi r2, r2, 4
        srwi r3, r3, 4
        subf r2, r2, r3
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

saving a cycle.

llvm-svn: 31725
 2006-11-14 05:28:08 +00:00
Chris Lattner 6dc22332bf add a note 
llvm-svn: 31719
 2006-11-14 01:57:53 +00:00
Chris Lattner 683712583a minor tweaks, reject vector preinc. 
llvm-svn: 31717
 2006-11-14 01:38:31 +00:00
Evan Cheng dbd3d294e6 Matches MachineInstr changes. 
llvm-svn: 31712
 2006-11-13 23:36:35 +00:00
Chris Lattner 1121e50f7e teach the g5 hazard recognizer about update loads. This fixes 
Ptrdist/anagram among others.

llvm-svn: 31708
 2006-11-13 20:11:06 +00:00
Nick Lewycky 0df2ada9d4 Cute example from Chris Lattner. 
llvm-svn: 31696
 2006-11-13 00:23:28 +00:00
Jim Laskey 1dfc6110ff Make sure stack link is set in 64-bit. 
llvm-svn: 31690
 2006-11-11 22:22:07 +00:00
Chris Lattner 0d550cc56c implement proper PPC64 prolog/epilog codegen. 
llvm-svn: 31684
 2006-11-11 19:05:28 +00:00
Jim Laskey 66c502b54a Running with frame pointers prevented debugging, external probes and 
potentially some system calls/exception handling from working.  TOS must always
link to previous frame.  This is a short term workaround until alloca scheme is
reworked.

llvm-svn: 31677
 2006-11-11 10:21:58 +00:00
Evan Cheng db04c958a5 Add implicit use / def operands to created MI's. 
llvm-svn: 31676
 2006-11-11 10:21:44 +00:00
Evan Cheng a36cdcfaf8 Add all implicit defs to FP_REG_KILL mi. 
llvm-svn: 31674
 2006-11-11 07:19:36 +00:00
Chris Lattner c5102bfc7c allow the offset of a preinc'd load to be the low-part of a global. This 
produces this clever code:

_millisecs:
        lis r2, ha16(_Time.1182)
        lwzu r3, lo16(_Time.1182)(r2)
        lwz r2, 4(r2)
        addic r4, r2, 1
        addze r3, r3
        blr

instead of this:

_millisecs:
        lis r2, ha16(_Time.1182)
        la r3, lo16(_Time.1182)(r2)
        lwz r2, lo16(_Time.1182)(r2)
        lwz r3, 4(r3)
        addic r4, r3, 1
        addze r3, r2
        blr

for:

long %millisecs() {
        %tmp = load long* %Time.1182            ; <long> [#uses=1]
        %tmp1 = add long %tmp, 1                ; <long> [#uses=1]
        ret long %tmp1
}

llvm-svn: 31673
 2006-11-11 04:53:30 +00:00
Chris Lattner 2ff632c54b Mark operands as symbol lo instead of imm32 so that they print lo(x) around 
globals.

llvm-svn: 31672
 2006-11-11 04:51:36 +00:00
Chris Lattner b314b155ed ppc64 doesn't have lwau, don't attempt to form it. 
llvm-svn: 31656
 2006-11-11 00:08:42 +00:00
Chris Lattner c9fa36d706 implement preinc support for r+i loads on ppc64 
llvm-svn: 31654
 2006-11-10 23:58:45 +00:00
Evan Cheng 915026cdc3 Add a note. 
llvm-svn: 31650
 2006-11-10 22:09:17 +00:00
Evan Cheng 5b725a71a9 These are done. 
llvm-svn: 31649
 2006-11-10 22:03:35 +00:00
Evan Cheng 49683ba236 Don't dag combine floating point select to max and min intrinsics. Those 
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.

This fixes PR996.

llvm-svn: 31645
 2006-11-10 21:43:37 +00:00
Evan Cheng fb44822a98 Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a 
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.

llvm-svn: 31641
 2006-11-10 21:23:04 +00:00
Chris Lattner 6c8656a6b1 dform 8/9 are identical to dform 1 
llvm-svn: 31637
 2006-11-10 17:51:02 +00:00
Evan Cheng 286357480c Fix a potential bug. 
llvm-svn: 31634
 2006-11-10 09:13:37 +00:00
Evan Cheng 8c9c6d71ed Add implicit def / use operands to MachineInstr. 
llvm-svn: 31633
 2006-11-10 08:43:01 +00:00
Chris Lattner ce6455489a add an initial cut at preinc loads for ppc32. This is broken for ppc64 
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)

This is disabled unless -enable-ppc-preinc is passed to llc for now.

llvm-svn: 31621
 2006-11-10 02:08:47 +00:00
Chris Lattner cd436327f1 add note about ugly codegen with preinc 
llvm-svn: 31617
 2006-11-10 01:33:53 +00:00
Evan Cheng 14140059f0 Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes. 
llvm-svn: 31616
 2006-11-10 01:28:43 +00:00
Anton Korobeynikov b9c91c265c Fixing PR990: http://llvm.org/PR990. 
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).

llvm-svn: 31613
 2006-11-10 00:48:11 +00:00
Chris Lattner 4e03cb1945 add a note about viterbi 
llvm-svn: 31612
 2006-11-10 00:23:26 +00:00
Evan Cheng 36a8fbf771 PPC supports i32 / i64 pre-inc load / store. 
llvm-svn: 31599
 2006-11-09 19:11:50 +00:00
Evan Cheng c034f14fbe Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31596
 2006-11-09 18:44:21 +00:00
Evan Cheng b15000736c Rename ISD::MemOpAddrMode to ISD::MemIndexedMode 
llvm-svn: 31595
 2006-11-09 17:55:04 +00:00
Rafael Espindola 5f7ab1b964 implement load effective address similar to the alpha backend 
remove lea_addri and the now unused memri addressing mode

llvm-svn: 31592
 2006-11-09 13:58:55 +00:00
Evan Cheng 1698c2999c Remove M_2_ADDR_FLAG. 
llvm-svn: 31583
 2006-11-09 02:22:54 +00:00
Evan Cheng c9a4cdc9c9 Added indexed store node and patfrag's. 
llvm-svn: 31576
 2006-11-08 23:02:11 +00:00
Evan Cheng 3b3b786f03 Use movl+xchgl instead of pushl+popl. 
llvm-svn: 31572
 2006-11-08 20:35:37 +00:00
Evan Cheng 6cd0909da7 Match tblegen changes. 
llvm-svn: 31571
 2006-11-08 20:34:28 +00:00
Rafael Espindola 708cb60588 initial implementation of addressing mode 2 
TODO: fix lea_addri

llvm-svn: 31552
 2006-11-08 17:07:32 +00:00
Reid Spencer fdff938a7e For PR950: 
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.

llvm-svn: 31542
 2006-11-08 06:47:33 +00:00
Chris Lattner a801fcedd3 Refactor all the addressing mode selection stuff into the isel lowering 
class, where it can be used for preinc formation.

llvm-svn: 31536
 2006-11-08 02:15:41 +00:00
Chris Lattner 6a5a4f85d3 correct the (currently unused) pattern for lwzu. 
llvm-svn: 31535
 2006-11-08 02:13:12 +00:00
Evan Cheng 922e191116 Fixed a bug which causes x86 be to incorrectly match 
shuffle v, undef, <2, ?, 3, ?>
to movhlps
It should match to unpckhps instead.

Added proper matching code for
shuffle v, undef, <2, 3, 2, 3>

llvm-svn: 31519
 2006-11-07 22:14:24 +00:00
Chris Lattner be7033b346 add a note from viterbi 
llvm-svn: 31506
 2006-11-07 18:30:21 +00:00
Chris Lattner d94477f6c9 fix encoding of BLR 
llvm-svn: 31485
 2006-11-07 01:51:50 +00:00
Chris Lattner 7e885005ba add a note 
llvm-svn: 31477
 2006-11-06 21:26:49 +00:00
Jeff Cohen 7d6f3db3e2 Unbreak VC++ build. 
llvm-svn: 31464
 2006-11-05 19:31:28 +00:00
Reid Spencer 35b927e0d3 Fix a bug in the last patch and convert to && instead of & for logical expr. 
llvm-svn: 31463
 2006-11-05 19:26:37 +00:00
Reid Spencer 6088f8af16 Implement the -enabled-cbe-printf-a feature. 
llvm-svn: 31462
 2006-11-05 17:09:41 +00:00
Chris Lattner 2959789c92 encode BLR predicate info for the JIT 
llvm-svn: 31450
 2006-11-04 05:42:48 +00:00
Chris Lattner 6be726048e Go through all kinds of trouble to mark 'blr' as having a predicate operand 
that takes a register and condition code.  Print these pieces of BLR the
right way, even though it is currently set to 'always'.

Next up: get the JIT encoding right, then enhance branch folding to produce
predicated blr for simple examples.

llvm-svn: 31449
 2006-11-04 05:27:39 +00:00
Chris Lattner c8a68d08c3 Describe PPC predicates, which are a pair of CR# and condition. 
llvm-svn: 31438
 2006-11-03 23:53:25 +00:00
Chris Lattner 4905d2c5b4 initial steps to getting the predicate on PPC::BLR right. 
llvm-svn: 31437
 2006-11-03 23:52:18 +00:00
Chris Lattner 4fcc04a32a remove dead var 
llvm-svn: 31436
 2006-11-03 23:50:15 +00:00
Chris Lattner 9ac6442db6 remove dead/redundant vars 
llvm-svn: 31435
 2006-11-03 23:48:56 +00:00
Chris Lattner eb7128465d remove redundant/dead vars 
llvm-svn: 31434
 2006-11-03 23:47:20 +00:00
Chris Lattner 895d199348 remove dead vars 
llvm-svn: 31433
 2006-11-03 23:46:45 +00:00
Chris Lattner 2048373e71 add a note 
llvm-svn: 31429
 2006-11-03 22:27:39 +00:00
Rafael Espindola 4ece5c04f4 revert previous patch 
llvm-svn: 31411
 2006-11-03 03:08:28 +00:00
Evan Cheng 94b29e9e91 Dead code. 
llvm-svn: 31405
 2006-11-03 02:08:41 +00:00
Rafael Espindola 38b162c1d2 add createCFGSimplificationPass to ARMTargetMachine::addInstSelector 
llvm-svn: 31400
 2006-11-03 01:39:25 +00:00
Chris Lattner 799b96be08 silence warning 
llvm-svn: 31395
 2006-11-03 01:19:31 +00:00
Chris Lattner b974b0a3e1 silence warnings. 
llvm-svn: 31394
 2006-11-03 01:18:29 +00:00
Chris Lattner de2f0906e4 silence warning 
llvm-svn: 31393
 2006-11-03 01:13:15 +00:00
Chris Lattner 71f55131d4 silence warnings 
llvm-svn: 31392
 2006-11-03 01:11:05 +00:00
Reid Spencer c0b1dec892 Make CBackend -pedantic clean. 
llvm-svn: 31388
 2006-11-03 00:00:57 +00:00
Chris Lattner 2de0910a1b fix a bug reid noticed 
llvm-svn: 31385
 2006-11-02 23:39:53 +00:00
Reid Spencer de46e48420 For PR786: 
Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.

llvm-svn: 31380
 2006-11-02 20:25:50 +00:00
Rafael Espindola ac8668d62f move ARMCondCodeToString to ARMAsmPrinter.cpp 
remove unused variables from lowerCall

llvm-svn: 31378
 2006-11-02 15:00:02 +00:00
Andrew Lenharth d8b59f67f6 fix 2006-11-01-vastart.ll 
llvm-svn: 31371
 2006-11-02 03:05:26 +00:00
Reid Spencer 7eb55b395f For PR950: 
Replace the REM instruction with UREM, SREM and FREM.

llvm-svn: 31369
 2006-11-02 01:53:59 +00:00
Chris Lattner 584a11ae22 Implement the getRegForInlineAsmConstraint method for PPC. With recent 
sdisel changes, this eliminates a ton of copies around common inline asms.
For example:

int test2(int Y, int X) {
  asm("foo %0, %1" : "=r"(X): "r"(X));
  return X;
}

now compiles to:

_test2:
        foo r3, r4
        blr

instead of:

_test2:
        mr r2, r4
        foo r2, r2
        mr r3, r2
        blr

GCC produces:

_test2:
        foo r4, r4
        mr r3,r4
        blr

llvm-svn: 31367
 2006-11-02 01:44:04 +00:00
Evan Cheng 93cdd149f7 Rename 
llvm-svn: 31364
 2006-11-01 23:18:32 +00:00
Evan Cheng 1b2e60e970 Added getTiedToSrcOperand() to check for two-address'ness. 
llvm-svn: 31360
 2006-11-01 23:00:31 +00:00
Rafael Espindola 3576405a26 print null values in bss 
llvm-svn: 31349
 2006-11-01 14:26:44 +00:00
Rafael Espindola 0cd8d14c7c implement zextload bool and truncstore bool 
llvm-svn: 31348
 2006-11-01 14:13:27 +00:00
Evan Cheng 94e5bc9e83 Fix ldmxcsr JIT encoding. 
llvm-svn: 31343
 2006-11-01 06:53:52 +00:00
Evan Cheng 7a6a5b9af5 Add constraints to Instruction class. 
llvm-svn: 31332
 2006-11-01 00:26:27 +00:00
Andrew Lenharth dfbf91e59d more shotenning 
llvm-svn: 31331
 2006-10-31 23:46:56 +00:00
Evan Cheng a41c2d6432 Nuke dead code. 
llvm-svn: 31327
 2006-10-31 21:53:31 +00:00
Chris Lattner 44daa50bed allow the address of a global to be used with the "i" constraint when in 
-static mode.  This implements PR882.

llvm-svn: 31326
 2006-10-31 20:13:11 +00:00
Chris Lattner 60ce558aaa implement the 'c' inline asm modifier character 
llvm-svn: 31325
 2006-10-31 20:12:30 +00:00
Andrew Lenharth 8b20fa42da Let us play simplify the td file (and fix a few missed sub and mul patterns). 
llvm-svn: 31322
 2006-10-31 19:52:12 +00:00
Chris Lattner f6a6966cd2 handle "st" as "st(0)" 
llvm-svn: 31320
 2006-10-31 19:42:44 +00:00
Chris Lattner 8c6949e5b2 Change the prototype for TargetLowering::isOperandValidForConstraint 
llvm-svn: 31318
 2006-10-31 19:40:43 +00:00
Andrew Lenharth 692e4155aa Add all that branch mangling niftiness 
llvm-svn: 31313
 2006-10-31 16:49:55 +00:00
Rafael Espindola 4e825336a0 add support for calling functions when the caller has variable sized objects 
llvm-svn: 31312
 2006-10-31 13:03:26 +00:00
Anton Korobeynikov aa4c0f9374 1. Clean up code due to changes in SwitchTo*Section(2) 
2. Added partial debug support for mingw\cygwin targets (the same as
   Linux\ELF). Please note, that currently mingw\cygwin uses 'stabs' format
   for storing debug info by default, thus many (runtime) libraries has
   this information included. These formats shouldn't be mixed in one binary
   ('stabs' & 'DWARF'), otherwise binutils tools will be confused.

llvm-svn: 31311
 2006-10-31 08:31:24 +00:00