e64c9944f6
Delete an unused function.
...
llvm-svn: 56495
2008-09-23 18:26:47 +00:00
2430073657
Move the code for initializing the global base reg out of
...
X86ISelDAGToDAG.cpp and into X86InstrInfo.cpp. This will allow
it to be reused by FastISel.
llvm-svn: 56494
2008-09-23 18:22:58 +00:00
9c40c28926
Rationalize the names of passes that print information:
...
-callgraph => print-callgraph
-callscc => print-callgraph-sccs
-cfgscc => print-cfg-sccs
-externalfnconstants => print-externalfnconstants
-print => print-function
-print-alias-sets (no change)
-print-callgraph => dot-callgraph
-print-cfg => dot-cfg
-print-cfg-only => dot-cfg-only
-print-dom-info (no change)
-printm => print-module
-printusedtypes => print-used-types
llvm-svn: 56487
2008-09-23 12:47:39 +00:00
bdb215d338
Fix indendation.
...
llvm-svn: 56486
2008-09-23 08:54:41 +00:00
4cdc18ad80
Add initial support for inserting last minute copies.
...
llvm-svn: 56485
2008-09-23 04:37:10 +00:00
9e9426cb82
Support x86 specific inline asm modifier 'J'.
...
llvm-svn: 56483
2008-09-22 23:57:37 +00:00
e2947e1e07
Fix the alignment of loads from constant pool entries when the
...
load address has an offset from the base of the constant pool
entry.
llvm-svn: 56479
2008-09-22 22:40:08 +00:00
329fe728b5
Add hasNote() to check note associated with a function.
...
llvm-svn: 56477
2008-09-22 22:32:29 +00:00
bab5988017
Livestacks really does preserve everything.
...
llvm-svn: 56476
2008-09-22 22:26:15 +00:00
962c2cf17a
Instead of setPreservesAll, just mark them preseving machine loop info and machine dominators.
...
llvm-svn: 56475
2008-09-22 22:21:38 +00:00
97364655dc
Significant improvements to the logic for merging live intervals. This code can't
...
just use LI::MergeValueAsValue, as its behavior in the presence of overlapping ranges
isn't what StrongPHIElimination wants.
llvm-svn: 56472
2008-09-22 21:58:58 +00:00
7a74e71489
Make log, log2, log10, exp, exp2 use Expand by
...
default.
llvm-svn: 56471
2008-09-22 21:57:32 +00:00
168f8f3916
Mark several codegen passes as preserving all analysis.
...
llvm-svn: 56469
2008-09-22 20:58:04 +00:00
f1acc4d610
More refactoring. Yawn.
...
llvm-svn: 56468
2008-09-22 20:51:30 +00:00
7beddb8680
Refactor FP intrinisic setup. Per review feedback.
...
llvm-svn: 56456
2008-09-22 19:51:58 +00:00
8807bddf08
CMake build system: support for parallel builds.
...
llvm-svn: 56453
2008-09-22 18:21:51 +00:00
13beeeb128
Per review feedback: Only perform
...
(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.
llvm-svn: 56452
2008-09-22 18:19:24 +00:00
796a271c5f
Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.
...
llvm-svn: 56436
2008-09-22 14:50:07 +00:00
a229b3c9a7
Initial support for the CMake build system.
...
llvm-svn: 56419
2008-09-22 01:08:49 +00:00
91ef8fcd29
Add helper function to get a 32-bit floating point constant. No functionality change.
...
llvm-svn: 56418
2008-09-22 00:44:35 +00:00
f1280cf744
Fold immediates into X86 shifts with fast isel. This generates:
...
sarl $3, %ecx
instead of:
movl $3, %ecx
sarl %cl, %edx
This shrinks fast isel 176.gcc by about 2000 instructions (.3%)
llvm-svn: 56413
2008-09-21 21:44:29 +00:00
ae9d9f4d3f
Factor out code into HandleVirtRegDef, for consistency with
...
Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.
llvm-svn: 56412
2008-09-21 21:11:41 +00:00
dfc19e6c01
Instead of building a list and sorting it just to find a maximum element,
...
compute the maximum element directly.
llvm-svn: 56411
2008-09-21 21:01:49 +00:00
df8f1cb995
Fetch the starting index of the block when assigning intervals. This gets live-in indices
...
correct in the presence of things like EH labels.
llvm-svn: 56410
2008-09-21 20:43:24 +00:00
43f5449c48
don't print GlobalAddressSDNode's with an offset of zero as "foo0".
...
llvm-svn: 56399
2008-09-21 18:38:31 +00:00
9a8eb0d534
add a note
...
llvm-svn: 56391
2008-09-20 19:17:53 +00:00
e1dc84be64
Implement review feedback from Devang: make use
...
of mayReadFromMemory and mayWriteToMemory.
llvm-svn: 56387
2008-09-20 16:45:58 +00:00
9af7b3daec
Teach coalescer about earlyclobber bits.
...
Check bits for preferred register.
llvm-svn: 56384
2008-09-20 02:03:04 +00:00
c042000649
Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.
...
llvm-svn: 56381
2008-09-20 01:28:05 +00:00
4730522235
No need to print function stubs for Mac OS X 10.5 and up. Linker will handle it.
...
llvm-svn: 56378
2008-09-20 00:13:45 +00:00
9d917beba6
80 column violation.
...
llvm-svn: 56377
2008-09-20 00:13:08 +00:00
098786e9f7
Fix a FastISel GlobalVariable CSE bug.
...
llvm-svn: 56376
2008-09-19 23:42:04 +00:00
29e4c9192d
Continue after removing the current MI.
...
llvm-svn: 56372
2008-09-19 22:49:39 +00:00
9801ba451a
Refactor X86SelectConstAddr, folding it into X86SelectAddress. This
...
results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.
llvm-svn: 56371
2008-09-19 22:16:54 +00:00
436aae627d
Make earlyclobber stuff work when virtual regs
...
have previously been assigned conflicting physreg.
llvm-svn: 56364
2008-09-19 18:52:31 +00:00
4c0197043c
Re-materalized definition instructions may be dead. Whack them.
...
llvm-svn: 56352
2008-09-19 17:38:47 +00:00
715b9d2403
backing out my last commit, it was not intended to go on the trunk
...
llvm-svn: 56349
2008-09-19 15:13:20 +00:00
92f17070e7
first shot at removing Use::Val
...
untested, Use::swap() is definitely not done yet
llvm-svn: 56348
2008-09-19 15:03:57 +00:00
310077034a
Remove the MarkModRef pass (use AddReadAttrs instead).
...
Unfortunately this means removing one regression test
of GlobalsModRef because I couldn't work out how to
perform it without MarkModRef.
llvm-svn: 56342
2008-09-19 08:23:44 +00:00
af25ee7ffc
Add a new pass AddReadAttrs which works out which functions
...
can get the readnone/readonly attributes, and gives them it.
The plan is to remove markmodref (which did the same thing
by querying GlobalsModRef) and delete the analogous
functionality from GlobalsModRef.
llvm-svn: 56341
2008-09-19 08:17:05 +00:00
e519bd4183
Remove AsmThatEarlyClobber etc. from LiveIntervalAnalysis
...
and redo as linked list walk. Logic moved into RA.
Per review feedback.
llvm-svn: 56326
2008-09-19 01:02:35 +00:00
c25be3b2de
splitLoop does not handle split condition EQ.
...
Fixes PR 2805
llvm-svn: 56321
2008-09-18 23:45:14 +00:00
6e005fdc8d
Address-mode folding for X86FastISel. It's pretty basic, but it
...
catches a fair number of common cases. Note that this currently
causes Fast-ISel to leave behind lots of dead instructions.
Those will be dealt with in subsequent commits.
llvm-svn: 56320
2008-09-18 23:23:44 +00:00
a00fa322b1
Decrementing the iterator here could be wrong if the worklist is empty after the "erase".
...
Thanks to Ji Young Park for the patch!
llvm-svn: 56316
2008-09-18 23:04:18 +00:00
76b22c1420
Try to place hoisted instructions befoe icmp instruction.
...
llvm-svn: 56315
2008-09-18 22:50:42 +00:00
3d9416cf24
Somehow RegAllocLinearScan is keeping two pointers to MachineRegisterInfo.
...
llvm-svn: 56314
2008-09-18 22:38:47 +00:00
e91edeb61c
Simplify this code. The FastISel class has its own TD member.
...
llvm-svn: 56311
2008-09-18 18:26:43 +00:00
f3d647e00b
Don't consider instructions with implicit physical register
...
defs to be necessarily live.
llvm-svn: 56310
2008-09-18 18:22:32 +00:00
95be7d7b85
Add a new "fast" scheduler. This is currently basically just a
...
copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.
This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.
llvm-svn: 56307
2008-09-18 16:26:26 +00:00
5cc53c34c3
Preliminary support for systems which require changing JIT memory regions privilege from read / write to read / executable.
...
llvm-svn: 56303
2008-09-18 07:54:21 +00:00
933b392f65
Duh. Default to ARMCC::AL (always).
...
llvm-svn: 56301
2008-09-18 07:28:19 +00:00
5e3ac187d9
Clean up.
...
llvm-svn: 56300
2008-09-18 07:27:23 +00:00
bc0d0eccf3
Cosmetic.
...
llvm-svn: 56299
2008-09-18 07:24:33 +00:00
af13bf1ebd
FastISel: For calls, prefer using the callee's address as a constant
...
over having it in a register. And wait until after checking type
legality before requesting that the callee address be placed in a
register. Also, fix support for calls with void return type.
This speeds up fast-isel isel time by about 15% and reduces
instruction counts by about 3% overall on certain testcases. It also
changes many indirect calls to direct calls.
llvm-svn: 56292
2008-09-17 21:18:49 +00:00
f8610ebebc
Add a bit to mark operands of asm's that conflict
...
with an earlyclobber operand elsewhere. Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way
that conflicts with an earlyclobber. See also comments.
llvm-svn: 56290
2008-09-17 21:13:11 +00:00
f3fcd7a464
Unallocatable registers do not have live intervals.
...
llvm-svn: 56287
2008-09-17 18:36:25 +00:00
7f9671ba37
Do not hoist instruction above branch condition. The instruction may use branch condition.
...
llvm-svn: 56286
2008-09-17 18:21:49 +00:00
dca8d3b183
Do not ignore iv uses outside the loop.
...
This one slipped through cracks very well.
llvm-svn: 56284
2008-09-17 17:53:47 +00:00
6ab52a8018
Don't worry about clobbering physical register defs that aren't used.
...
llvm-svn: 56281
2008-09-17 15:25:49 +00:00
7848cfcd77
Fix addrmode1 instruction encodings; fix bx_ret encoding.
...
llvm-svn: 56277
2008-09-17 07:53:38 +00:00
937569afe3
Specify instruction encoding using range list to avoid endianess issues.
...
llvm-svn: 56276
2008-09-17 07:16:21 +00:00
173aa8602d
Simplify and generalize X86DAGToDAGISel::CanBeFoldedBy, and draw
...
up some new ascii art to illustrate what it does. This change
currently has no effect on generated code.
llvm-svn: 56270
2008-09-17 01:39:10 +00:00
c24cd015a7
Add a new MachineInstr-level DCE pass. It is very simple, and is intended to
...
be used with fast-isel.
llvm-svn: 56268
2008-09-17 00:43:24 +00:00
95e1af217f
Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"
...
function with appropriate parameters. This allows us to support blocks on PPC.
llvm-svn: 56267
2008-09-17 00:30:57 +00:00
a904f466e8
When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.
...
llvm-svn: 56258
2008-09-16 23:12:11 +00:00
64d6c6fe30
Change SelectionDAG::getConstantPool to always set the alignment of the
...
ConstantPoolSDNode, using the target's preferred alignment for the
constant type.
In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.
This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)
Patch by Paul Redmond!
llvm-svn: 56253
2008-09-16 22:05:41 +00:00
24c79f28b1
Reverting r56249. On further investigation, this functionality isn't needed.
...
Apologies for the thrashing.
llvm-svn: 56251
2008-09-16 21:48:12 +00:00
ab26f20d44
Include the alignment value when displaying ConstantPoolSDNodes.
...
llvm-svn: 56250
2008-09-16 21:18:22 +00:00
8bc392fb1d
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
...
- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
llvm-svn: 56249
2008-09-16 21:12:30 +00:00
5cf6120a7c
Fix these comments to reflect current reality. Surprisingly,
...
MachineConstantPool::getConstantPoolIndex actually expects
a log2-encoded alignment.
llvm-svn: 56248
2008-09-16 20:45:53 +00:00
dc5f5cbe59
Finally re-apply r46959. This is made feasible by the combination
...
of r56230, r56232, and r56246.
llvm-svn: 56247
2008-09-16 18:52:57 +00:00
dafa9c6e85
Improve instcombine's handling of integer min and max in two ways:
...
- Recognize expressions like "x > -1 ? x : 0" as min/max and turn them
into expressions like "x < 0 ? 0 : x", which is easily recognizable
as a min/max operation.
- Refrain from folding expression like "y/2 < 1" to "y < 2" when the
comparison is being used as part of a min or max idiom, like
"y/2 < 1 ? 1 : y/2". In that case, the division has another use, so
folding doesn't eliminate it, and obfuscates the min/max, making it
harder to recognize as a min/max operation.
These benefit ScalarEvolution, CodeGen, and anything else that wants to
recognize integer min and max.
llvm-svn: 56246
2008-09-16 18:46:06 +00:00
7c5dbd95e2
AllocateRWXMemory -> AllocateRWX.
...
llvm-svn: 56244
2008-09-16 17:28:18 +00:00
050d7835c6
Don't take the time to CheckDAGForTailCallsAndFixThem when tail calls
...
are not enabled. Instead just omit the tail call flag when calls are
created.
llvm-svn: 56235
2008-09-16 01:42:28 +00:00
c5d2892e62
Re-enables the new vector select in the bitcode reader, by modifying the
...
bitcode reader/writer as follows:
- add and use new bitcode FUNC_CODE_INST_VSELECT to handle the llvm
select opcode using either i1 or [N x i1] as the selector.
- retain old BITCODE FUNC_CODE_INST_SELECT in the bitcode reader to
handle select on i1 for backwards compatibility with existing bitcode
files.
- re-enable the vector-select.ll test program.
Also, rename the recently added bitcode opcode FUNC_CODE_INST_VCMP to
FUNC_CODE_INST_CMP2 and make the bitcode writer use it to handle
fcmp/icmp on scalars or vectors. In the bitcode writer, use
FUNC_CODE_INST_CMP for vfcmp/vicmp only. In the bitcode reader, have
FUNC_CODE_INST_CMP handle icmp/fcmp returning bool, for backwards
compatibility with existing bitcode files.
Patch by Preston Gurd!
llvm-svn: 56233
2008-09-16 01:01:33 +00:00
f9081a2cd5
Teach ScalarEvolution to consider loop preheaders in the search for
...
an if statement that guards a loop, to allow indvars to avoid smax
operations in more situations.
llvm-svn: 56232
2008-09-15 22:18:04 +00:00
82ab1e7280
Live intervals for live-in registers should begin at the beginning of a basic block, not at the first
...
instruction. Also, their valno's should have an unknown def. This has no effect currently, but was
causing issues when StrongPHIElimination was enabled.
llvm-svn: 56231
2008-09-15 22:00:38 +00:00
68e7735a38
Teach LSR to optimize away SMAX operations for tripcounts in common
...
cases. See the comment above OptimizeSMax for the full story, and
the testcase for an example. This cancels out a pessimization
commonly attributed to indvars, and will allow us to lift some of
the artificial throttles in indvars, rather than add new ones.
llvm-svn: 56230
2008-09-15 21:22:06 +00:00
233785daae
Fixed Bug 2751
...
http://llvm.org/bugs/show_bug.cgi?id=2751
Abicall was enabled even when static code model was provided
in the command line.
The correct behavior is to disable abicall when static is
specified.
llvm-svn: 56228
2008-09-15 21:06:55 +00:00
3c7b9ba547
Re-enable SelectionDAG CSE for calls. It matters in the case of
...
libcalls, as in this testcase on ARM.
llvm-svn: 56226
2008-09-15 19:46:03 +00:00
02acc35abd
Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#.
...
llvm-svn: 56199
2008-09-15 06:28:41 +00:00
81313fd8d1
Fix WriteAsOperand to not emit a leading space character. Adjust
...
its callers to emit a space character before calling it when a
space is needed.
This fixes several spurious whitespace issues in
ScalarEvolution's debug dumps. See the test changes for
examples.
This also fixes odd space-after-tab indentation in the output
for switch statements, and changes calls from being printed like
this:
call void @foo( i32 %x )
to this:
call void @foo(i32 %x)
llvm-svn: 56196
2008-09-14 17:21:12 +00:00
c0d712d9ed
adjust last patch per review feedback
...
llvm-svn: 56194
2008-09-14 01:44:36 +00:00
38453eebdc
Remove isImm(), isReg(), and friends, in favor of
...
isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
llvm-svn: 56189
2008-09-13 17:58:21 +00:00
9ddb3145ae
Fix PR2792: treat volatile loads as writing memory somewhere.
...
Treat stores as reading memory, just to play safe.
llvm-svn: 56188
2008-09-13 12:45:50 +00:00
a5804effed
Fix random abort.
...
llvm-svn: 56184
2008-09-13 01:55:59 +00:00
d3fe174c53
Define CallSDNode, an SDNode subclass for use with ISD::CALL.
...
Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
llvm-svn: 56183
2008-09-13 01:54:27 +00:00
380482ac46
Typo.
...
llvm-svn: 56182
2008-09-13 01:44:01 +00:00
ba28161103
Rely on instruction format to determine so_reg operand for now.
...
llvm-svn: 56181
2008-09-13 01:38:29 +00:00
12134701ec
Revert 56176. All those instruction formats are still needed.
...
llvm-svn: 56180
2008-09-13 01:35:33 +00:00
db6571a2c7
Accidentially flipped the condition.
...
llvm-svn: 56179
2008-09-13 01:29:57 +00:00
25a39094f8
Add debug dumps.
...
llvm-svn: 56178
2008-09-13 01:15:21 +00:00
c5c74f36fd
Eliminate unnecessary instruction formats.
...
llvm-svn: 56176
2008-09-12 23:15:39 +00:00
d1424c4eca
Addrmode 1 S bit can be dynamically set. Look for CPSR def.
...
llvm-svn: 56172
2008-09-12 22:45:55 +00:00
33fa89c6fb
Rewrite address mode 1 code emission routines.
...
llvm-svn: 56171
2008-09-12 22:01:15 +00:00
3c12fc4342
On some targets, non-move instructions can become move instructions because of coalescing. e.g.
...
vr2 = OR vr0, vr1
=>
vr2 = OR vr1, vr1 // after coalescing vr0 with vr1
Update the value# of the destination register with the copy instruction if that happens.
llvm-svn: 56165
2008-09-12 18:13:14 +00:00
ec270fb640
Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* and
...
ConstantFP* instead of APInt and APFloat directly.
This reduces the amount of time to create ConstantSDNode
and ConstantFPSDNode nodes when ConstantInt* and ConstantFP*
respectively are already available, as is the case in
SelectionDAGBuild.cpp. Also, it reduces the amount of time
to legalize constants into constant pools, and the amount of
time to add ConstantFP operands to MachineInstrs, due to
eliminating ConstantInt::get and ConstantFP::get calls.
It increases the amount of work needed to create new constants
in cases where the client doesn't already have a ConstantInt*
or ConstantFP*, such as legalize expanding 64-bit integer constants
to 32-bit constants. And it adds a layer of indirection for the
accessor methods. But these appear to be outweight by the benefits
in most cases.
It will also make it easier to make ConstantSDNode and
ConstantFPNode more consistent with ConstantInt and ConstantFP.
llvm-svn: 56162
2008-09-12 18:08:03 +00:00
1f3ab86804
Pass "earlyclobber" bit through to machine
...
representation; coalescer and RA need to know
about it. No functional change.
llvm-svn: 56161
2008-09-12 17:49:03 +00:00
effb894453
Rename ConstantSDNode::getValue to getZExtValue, for consistency
...
with ConstantInt. This led to fixing a bug in TargetLowering.cpp
using getValue instead of getAPIntValue.
llvm-svn: 56159
2008-09-12 16:56:44 +00:00
06dbb126e6
Rather than marking all internal globals "Ref"
...
when a readonly declaration is called, set a
flag. This is faster and uses less memory.
In theory it is less accurate, because before
only those internal globals that were read
by someone were being marked "Ref", but now
all are. But in practice, thanks to other
passes, all internal globals of the kind
considered here will be both read and stored
to: those only read will have been turned
into constants, and those only stored to will
have been deleted.
llvm-svn: 56143
2008-09-12 07:29:58 +00:00
baf6762e26
The sequence for ppcf128 compares was not IEEE
...
safe in the presence of NaNs.
llvm-svn: 56136
2008-09-12 00:30:56 +00:00
eff71f2953
On 64-bit targets, change 32-bit getelementptr indices to be 64-bit
...
getelementptr indices, inserting an explicit cast if necessary.
This helps expose the sign-extension operation to other optimizations.
llvm-svn: 56133
2008-09-11 23:06:38 +00:00
7d01c0654c
Fix a vectorshuffle instcombine bug introduced by r55995.
...
Patch by Nicolas Capens!
llvm-svn: 56129
2008-09-11 22:47:57 +00:00
a7cd7bc353
udpate header comment: s/VP/VFP/
...
llvm-svn: 56126
2008-09-11 21:41:29 +00:00
dd45bc25ac
When tailcallopt is enabled all fastcc calls must have an aligned argument stack size. Add a test case.
...
llvm-svn: 56119
2008-09-11 20:28:43 +00:00
5456a37280
Fix PR2748. Avoid coalescing physical register with virtual register which would create illegal extract_subreg. e.g.
...
vr1024 = extract_subreg vr1025, 1
...
vr1024 = mov8rr AH
If vr1024 is coalesced with AH, the extract_subreg is now illegal since AH does not have a super-reg whose sub-register 1 is AH.
llvm-svn: 56118
2008-09-11 20:07:10 +00:00
453564bfba
Fix a bug in ANY_EXTEND handling that was breaking 403.gcc on X86-64 in fast isel.
...
llvm-svn: 56117
2008-09-11 19:44:55 +00:00
0a6d01770f
Fix comment typo.
...
llvm-svn: 56116
2008-09-11 19:41:10 +00:00
d4133ac315
Intrinsics don't touch internal global variables
...
(unless passed one via a parameter), even if they
are IntrWriteMem.
llvm-svn: 56115
2008-09-11 19:35:55 +00:00
9b9d547a5c
Fix a copy+paste bug that Duncan spotted. For several
...
cases it was still getting lucky and detecting overflow
but it was clearly incorrect.
llvm-svn: 56113
2008-09-11 18:53:02 +00:00
4c9fbbb511
Fix PR2783 - coalescer bug. Missing a TargetRegisterInfo::isVirtualRegister check.
...
llvm-svn: 56112
2008-09-11 18:40:32 +00:00
e30b36fe37
Intrinsics don't read these kinds of global
...
variables.
llvm-svn: 56105
2008-09-11 15:43:12 +00:00
783ed9ead1
Fix a 80 column violation.
...
llvm-svn: 56097
2008-09-11 05:58:06 +00:00
58d084c05b
The version of AtomicSDNode::AtomicSDNode used (only) for
...
cmp-and-swap reversed the Cmp and Swap arguments; comments
make it clear this is unintentional. Unfortunately, the
x86 BE had a compensating reversal, which is removed here.
PPC is OK.
From inspection of the Alpha code I think it is OK, but
if somebody has that platform please check it out. I
cannot test on that platform.
llvm-svn: 56091
2008-09-11 03:12:59 +00:00
41baf8b22a
If ISD::ANY_EXTEND fails, try ISD::ZERO_EXTEND and ISD::SIGN_EXTEND before giving up. This fixes 445.gobmk on
...
X86-64 in fast isel.
llvm-svn: 56088
2008-09-11 02:41:37 +00:00
e5ca04e70d
Succumb utterly to compatibility and implement
...
__sync_fetch_and_nand as ANDC, even though that's
not what nand means.
llvm-svn: 56087
2008-09-11 02:15:03 +00:00
b401449ceb
Propagate subreg index when promoting a load to a copy.
...
llvm-svn: 56085
2008-09-11 01:02:12 +00:00
9d9a4be588
In my analysis for r56076 I missed the case where the original
...
multiplication overflows.
llvm-svn: 56082
2008-09-11 00:25:00 +00:00
c1ae01688f
Fix an icmp+sdiv optimization to check for and handle an overflow
...
condition. This fixes PR2740.
llvm-svn: 56076
2008-09-10 23:30:57 +00:00
bf646f2986
X86FastISel support for double->float and float->double casts.
...
llvm-svn: 56070
2008-09-10 21:02:08 +00:00
1dc9b0514f
FastISel support for i1 PHI nodes.
...
llvm-svn: 56069
2008-09-10 21:01:31 +00:00
940bafb687
FastISel support for i1 constants.
...
llvm-svn: 56068
2008-09-10 21:01:08 +00:00
7591130946
Fix a bug in the coalescer where it didn't check if a live interval existed before trying to manipulate it. This
...
was exposed by fast isel's handling of shifts on X86-64. With this, FreeBench/pcompress2 passes on X86-64 in fast isel.
llvm-svn: 56067
2008-09-10 20:41:13 +00:00
39d82f902a
Add X86FastISel support for static allocas, and refences
...
to static allocas. As part of this change, refactor the
address mode code for laods and stores.
llvm-svn: 56066
2008-09-10 20:11:02 +00:00
534fe1c405
Fix PR2664 - spiller GetRegForReload wasn't respecting sub-register indices on machine operands.
...
llvm-svn: 56065
2008-09-10 20:08:45 +00:00
710c3cf36a
Fix a fastcc + sret bug. If fastcc and sret, callee doesn't need to pop the hidden struct ptr; Re-enable fastcc.
...
llvm-svn: 56061
2008-09-10 18:25:29 +00:00
4cc893bab6
Handle new intrinsics with vector arguments.
...
Patch by Paul Redmond.
llvm-svn: 56059
2008-09-10 17:31:40 +00:00
222018da7b
Add a break statement that I accidentally deleted when
...
I shuffled the fast-isel command-line options around. This fixes
a bunch of fast-isel failures.
llvm-svn: 56057
2008-09-10 15:52:34 +00:00
728c44ab56
fix white spaces.
...
llvm-svn: 56056
2008-09-10 14:49:55 +00:00
6d6a65310b
Fix name.
...
llvm-svn: 56055
2008-09-10 13:22:10 +00:00
83e45acc25
Add trampoline support for the new FastCC calling
...
convention (not related to recent Ada testsuite
failures).
llvm-svn: 56054
2008-09-10 13:11:09 +00:00
536c399579
Turn off the new FastCC for the moment. It causes
...
a slew of Ada testsuite failures on x86-32 linux.
Seems to be related to the use of float.
llvm-svn: 56053
2008-09-10 13:09:24 +00:00
6987fec11c
Remove unnecessary bit-wise AND from the limited precision work.
...
llvm-svn: 56049
2008-09-10 06:26:10 +00:00
999096065f
Fix 80 col violation.
...
llvm-svn: 56048
2008-09-10 04:16:29 +00:00
97f0a0f28d
Fix a warning about comparing signed and unsigned values.
...
llvm-svn: 56040
2008-09-10 01:09:32 +00:00
c6db3ad15f
Fix typo.
...
llvm-svn: 56037
2008-09-10 00:30:50 +00:00
eb1db169bf
Check that both operands are f32 before attempting to lower.
...
llvm-svn: 56036
2008-09-10 00:24:59 +00:00
648930b9ba
Implement "visitPow". This is mainly used to see if we have a pow() call of this
...
form:
powf(10.0f, x);
If this is the case, and also we want limited precision floating-point
calculations, then lower to do the limited-precision stuff.
llvm-svn: 56035
2008-09-10 00:20:20 +00:00
0fff397a13
A few more places where FPOW is being ignored.
...
llvm-svn: 56032
2008-09-09 23:35:53 +00:00
b4c0295b8e
Change -fast-isel-no-abort to -fast-isel-abort, which now defaults
...
to being off by default. Also, add assertion checks to check that
the various fast-isel-related command-line options are only used
when -fast-isel itself is enabled.
llvm-svn: 56029
2008-09-09 23:05:00 +00:00
f4e5de4583
Legalizer was missing code that expand fpow to a libcall.
...
llvm-svn: 56028
2008-09-09 23:02:14 +00:00
ab6676a46a
Adding 6-, 12-, and 18-bit limited-precision floating-point support for exp2
...
function.
llvm-svn: 56025
2008-09-09 22:39:21 +00:00
abb1e7770b
Move the uglier parts of deciding not to emit a
...
UsedDirective for some symbols in llvm.used into
Darwin-specific code. I've decided LessPrivateGlobal
is potentially a useful abstraction and left it in
the target-independent area, with improved comment.
llvm-svn: 56024
2008-09-09 22:29:13 +00:00
48217d89b4
Add support for 6-, 12-, and 18-bit limited precision calculations of exp for
...
floating-point numbers.
llvm-svn: 56023
2008-09-09 22:13:54 +00:00
91491b51e2
Add a new option, -fast-isel-verbose, that can be used with
...
-fast-isel-no-abort to get a dump of all unhandled instructions,
without an abort.
llvm-svn: 56021
2008-09-09 22:06:46 +00:00
93945287b8
Clear preference when it no longer makes sense.
...
llvm-svn: 56019
2008-09-09 21:44:23 +00:00
92b032f3e6
if loop induction variable is always sign or zero extended then
...
extend the type of induction variable.
llvm-svn: 56017
2008-09-09 21:41:07 +00:00
18ff6367f7
Add assertion check.
...
llvm-svn: 56016
2008-09-09 21:38:40 +00:00
92c5367705
fix overflow check.
...
llvm-svn: 56011
2008-09-09 20:54:34 +00:00
4a58bd331b
Clean this up, based on Evan's suggestions.
...
llvm-svn: 56009
2008-09-09 20:47:17 +00:00
ed3bb7888d
- Add support for 6-, 12-, and 18-bit limited precision floating-point "log"
...
values.
- Refactored some of the code.
llvm-svn: 56008
2008-09-09 20:39:27 +00:00
53b728c27c
Fix PR2757. Ignore liveinterval register allocation preference if the preference register is not in the right register class. This can happen due to sub-register coalescing.
...
llvm-svn: 56006
2008-09-09 20:22:01 +00:00
1a1140429e
Make safer variant of alias resolution routine to be default
...
llvm-svn: 56005
2008-09-09 20:05:04 +00:00
e5579930db
Simplify this some more. No functionality change.
...
llvm-svn: 56003
2008-09-09 19:56:34 +00:00
a9b60ee0fc
Resolve aliases, when possible
...
llvm-svn: 56001
2008-09-09 19:04:59 +00:00
faeb4b6755
Add limited precision floating-point conversions of log10 for 6- and 18-bit
...
precisions.
llvm-svn: 56000
2008-09-09 18:42:23 +00:00
4fcccd8d66
Mark IMPLICIT_DEF as being rematerializable and cheap-as-a-move.
...
It's already special-cased and treated as rematerializable within
LiveIntervals; this allows it to be handled by other passes
such as TwoAddressInstrctionPass.
llvm-svn: 55999
2008-09-09 18:25:28 +00:00
4e518041d3
Fix typo
...
llvm-svn: 55998
2008-09-09 18:24:07 +00:00
ac2c655808
Fix incorrect linker behaviour: we shouldn't resolve weak aliases.
...
llvm-svn: 55997
2008-09-09 18:23:48 +00:00
6acb2219b6
Replace explicit pointer-size constants to TargetData query.
...
No functionality change.
llvm-svn: 55996
2008-09-09 18:22:57 +00:00
86fb5b48de
Make SimplifyDemandedVectorElts simplify vectors with multiple
...
users, and teach it about shufflevector instructions.
Also, fix a subtle bug in SimplifyDemandedVectorElts'
insertelement code.
This is a patch that was originally written by Eli Friedman,
with some fixes and cleanup by me.
llvm-svn: 55995
2008-09-09 18:11:14 +00:00
a328690ed3
Simplify.
...
Fix outdated comment.
llvm-svn: 55993
2008-09-09 17:56:50 +00:00
d7ba10c31b
Optimization suggested by Matthijs Kooijman.
...
llvm-svn: 55988
2008-09-09 13:44:24 +00:00
c189e79440
Correct callgraph construction. It has two problems:
...
(1) code left over from the days of ConstantPointerRef:
if a use of a function is a GlobalValue then that is
not considered a reason to add an edge from the external
node, even though the use may be as an initializer for
an externally visible global! There might be some point
to this behaviour when the use is by an alias (though the
code predated aliases by some centuries), but I think
PR2782 is a better way of handling that. (2) If function
F calls function G, and also G is a parameter to the
call, then an F->G edge is not added to the callgraph.
While this doesn't seem to matter much, adding such an
edge makes the callgraph more regular.
In addition, the new code should be faster as well as
simpler.
llvm-svn: 55987
2008-09-09 12:40:47 +00:00
8529085f4f
Check for type legality before materializing integer constants in fast isel. With this change,
...
all of MultiSource/Applications passes on Darwin/X86 under FastISel.
llvm-svn: 55982
2008-09-09 06:32:02 +00:00
b6aef419b4
Remove the code that protected FastISel from aborting in
...
the case of loads, stores, and conditional branches. It can
handle those now, so any that aren't handled should trigger
the abort.
llvm-svn: 55977
2008-09-09 02:40:04 +00:00
7164e9a702
Temporarily disable vector select in the bitcode reader. The
...
way it handles the type of the condition is breaking plain
scalar select in the case that the value is a
forward-reference.
llvm-svn: 55976
2008-09-09 02:08:49 +00:00
1e97901388
Fix a constant lowering bug. Now we can do load and store instructions with funky getelementptr embedded in the address operand.
...
llvm-svn: 55975
2008-09-09 01:26:59 +00:00
f080225490
Fix logic for not emitting no-dead-strip for some
...
objects in llvm.used (thanks Anton). Makes visible
the magic 'l' prefix for symbols on Darwin which are
to be passed through the assembler, then removed at
linktime (previously all references to this had been
hidden in the ObjC FE code, oh well).
llvm-svn: 55973
2008-09-09 01:21:22 +00:00
72eb6e76e4
Update generated files.
...
llvm-svn: 55972
2008-09-09 01:13:24 +00:00
0f7a3507cf
Fix simplifycfg crash in handing block merge.
...
llvm-svn: 55971
2008-09-09 01:06:56 +00:00
c579d978a3
Extend the vcmp/fcmp LLVM IR instructions to take vectors as arguments
...
and, if so, to return a vector of boolean as a result;
Extend the select LLVM IR instruction to allow you to specify a result
type which is a vector of boolean, in which case the result will be an
element-wise selection instead of choosing one vector or the other; and
Update LangRef.html to describe these changes.
This patch was contributed by Preston Gurd!
llvm-svn: 55969
2008-09-09 01:02:47 +00:00
484167851a
Add support for floating-point calculations of log2 with limited precisions of 6
...
and 18.
llvm-svn: 55968
2008-09-09 00:28:24 +00:00
3d56051f70
s/RemoveUnreachableBlocks/RemoveUnreachableBlocksFromFn/g
...
llvm-svn: 55965
2008-09-08 22:14:17 +00:00
ea9285e643
Don't suppress no-dead-strip for used static functions.
...
llvm-svn: 55962
2008-09-08 21:21:49 +00:00
45165ed1ac
Reapply 55904: Unbreak and fix indentation
...
llvm-svn: 55958
2008-09-08 21:13:56 +00:00
177eda0505
Reapply 55901: Drop unused variable
...
llvm-svn: 55957
2008-09-08 21:13:33 +00:00
524820fef7
Reapply 55900: We do support EH on x86-64!
...
llvm-svn: 55956
2008-09-08 21:13:08 +00:00
2fd24e7713
Reapply 55899: First draft of EH support on x86/64-linux
...
Now with fix, which prevents subtle codegen bug to trigger on darwin.
No fix for bug though, it's still there.
llvm-svn: 55955
2008-09-08 21:12:47 +00:00
4112634ca6
Reapply blindly reverted 55898: Implement FRAME_TO_ARGS_OFFSET for x86-64
...
llvm-svn: 55954
2008-09-08 21:12:11 +00:00
a333f3ccb8
Fix a few I's that were meant to be renamed to BI's.
...
llvm-svn: 55942
2008-09-08 20:37:59 +00:00
3871441861
Reverting r55898 as well. This wasn't reverted in the original revert...
...
llvm-svn: 55938
2008-09-08 19:42:32 +00:00
6fe5fe4209
Accidental commit of partial 'stack canaries' code
...
llvm-svn: 55937
2008-09-08 18:12:00 +00:00
67f99f1454
Redo the 3 existing low-precision expansions to
...
use float constants. An oversight by the numerics
people who supplied this.
llvm-svn: 55930
2008-09-08 18:00:26 +00:00
99b83712f3
Reverting r55898 to r55909. One of these patches was causing an ICE during the full bootstrap on Darwin:
...
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_negdi2 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_negdi2_s.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) &&
TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical
register live information"), function runOnMachineFunction, file
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp,
line 311.
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/bin/
-B/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/lib/
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/include
-isystem /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.install/i386-apple-darwin9.4.0/sys-include
-O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings
-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition
-isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2
-D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc
-I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include
-I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include
-I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.obj/include
-I/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/include
-DSHARED -m64 -DL_lshrdi3 -c ../../llvm-gcc.src/gcc/libgcc2.c -o
libgcc/x86_64/_lshrdi3_s.o
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:unknown:Undefined local symbol LBB21_11
{standard input}:unknown:Undefined local symbol LBB21_12
{standard input}:unknown:Undefined local symbol LBB21_13
{standard input}:unknown:Undefined local symbol LBB21_8
llvm-svn: 55928
2008-09-08 17:59:12 +00:00
d172048b59
Handle calls which produce i1 results: promote to i8 but and it with 1 to get the low bit.
...
llvm-svn: 55925
2008-09-08 17:15:42 +00:00
7518f250b9
Remove unused counter.
...
llvm-svn: 55924
2008-09-08 17:14:54 +00:00
1df80f6b1c
In visitUREM, arrange for the temporary UDIV node to be
...
revisited, consistent with the code in visitSREM.
llvm-svn: 55923
2008-09-08 16:59:01 +00:00
ede2d7d745
Add VISIBILITY_HIDDEN on SDISelAsmOperandInfo
...
llvm-svn: 55922
2008-09-08 16:56:08 +00:00
c05dca95a2
Bitcasting two or from aggregate types is not permitted. Update
...
LangRef.html, and teach the verifier to check bitcast instructions.
llvm-svn: 55921
2008-09-08 16:45:59 +00:00
fd18d630bc
i128 and f80 are implemented for x86-64 now.
...
llvm-svn: 55920
2008-09-08 16:42:56 +00:00
f9b2054df1
Add AsmPrinter support for i128 and larger static initializer data.
...
llvm-svn: 55919
2008-09-08 16:40:13 +00:00
8f658bac2f
Fix copy+pastos in comments.
...
llvm-svn: 55918
2008-09-08 16:31:35 +00:00
e19bc1844f
Fix the string for ISD::UDIVREM.
...
llvm-svn: 55917
2008-09-08 16:30:29 +00:00
4d5b5fe812
Delete an unused variable.
...
llvm-svn: 55915
2008-09-08 16:28:17 +00:00
538a7f479a
Remove OptimizeIVType()
...
llvm-svn: 55913
2008-09-08 16:13:27 +00:00
a9de91e066
Didn't mean to commit this change to how the
...
callgraph is printed.
llvm-svn: 55912
2008-09-08 16:04:03 +00:00
24776b554d
Avoid redefinition and nnbreak windows build.
...
llvm-svn: 55911
2008-09-08 16:01:27 +00:00
6a73698a85
Unbreak and fix indentation
...
llvm-svn: 55904
2008-09-08 14:23:34 +00:00
b55688d27d
Drop unused variable
...
llvm-svn: 55901
2008-09-08 14:22:38 +00:00
0316b797ea
We do support EH on x86-64!
...
llvm-svn: 55900
2008-09-08 14:22:16 +00:00
82b9540046
First draft of EH support on x86/64-linux
...
llvm-svn: 55899
2008-09-08 14:21:53 +00:00
cb0655d626
Implement FRAME_TO_ARGS_OFFSET for x86-64
...
llvm-svn: 55898
2008-09-08 14:21:10 +00:00
b9a6f861b4
Update the callgraph correctly.
...
llvm-svn: 55896
2008-09-08 11:08:09 +00:00
3cf7d86556
Update the callgraph correctly in ArgumentPromotion.
...
llvm-svn: 55895
2008-09-08 11:07:35 +00:00
46911f1271
Reapply 55859. This doesn't change anything as
...
long as the callgraph is correct. It checks
for wrong callgraphs more strictly.
llvm-svn: 55894
2008-09-08 11:05:51 +00:00
e775d3526c
Add fast isel physical register definition support.
...
llvm-svn: 55892
2008-09-08 08:38:20 +00:00
6500d1711a
Add support to extend call operands when needed. Enable x86 fastisel call support.
...
llvm-svn: 55891
2008-09-08 06:35:17 +00:00
5f7371d7b1
Revert my previous change -- the subtraction of two constants was a no-op
...
before. This is taken care of in the selection DAG pass. In my opinion, this
should be in one place or the other. I.e., it should probably be removed from
the DAG combiner (along with the other arithmetic transformations on constants
that are essentially no-ops).
llvm-svn: 55889
2008-09-08 01:56:32 +00:00
df81749886
Convert
...
// fold (sub c1, c2) -> c1-c2
from a no-op into an actual transformation.
llvm-svn: 55886
2008-09-07 11:34:47 +00:00
1ea0d2e6db
Correct a comment and strip trailing whitespace.
...
llvm-svn: 55883
2008-09-07 09:54:09 +00:00
6c8f55c841
Initial fastisel call support for C, Fast, and X86_FastCall calling conventions. It's meant to handle "simple" calls, i.e. no byval, structret, etc. It doesn't support multi-result returns either.
...
Not yet turned on, it needs to support sext / zext of arguments and result.
llvm-svn: 55882
2008-09-07 09:09:33 +00:00
6f343bd543
Some code clean up.
...
llvm-svn: 55881
2008-09-07 09:07:23 +00:00
b9a0abb129
Indentation.
...
llvm-svn: 55880
2008-09-07 09:04:52 +00:00
615739b991
- Doh. Pass vector by value is bad.
...
- Add a AnalyzeCallResult specialized for calls which produce a single value. This is used by fastisel.
llvm-svn: 55879
2008-09-07 09:02:18 +00:00
b928669409
Handle x86 truncate to i8 with target hook for now.
...
llvm-svn: 55877
2008-09-07 08:47:42 +00:00
421f488cb7
fix crash when the malloc/free function is defined or is a declaration with 0 parameters.
...
this pass doesnt seem to be used, but still it's now a little more correct
llvm-svn: 55873
2008-09-06 17:44:06 +00:00
95c2a7848a
When PruneEH turned an invoke into an ordinary
...
call (thus changing the call site) it didn't
inform the callgraph about this. But the
call site does matter - as shown by the testcase,
the callgraph become invalid after the inliner
ran (with an edge between two functions simply
missing), resulting in wrong deductions by
GlobalsModRef.
llvm-svn: 55872
2008-09-06 17:19:29 +00:00
d41c7160d0
Fix constant pool loads, and remove broken versions of addConstantPoolReference.
...
llvm-svn: 55868
2008-09-06 01:11:01 +00:00
9519fb3f50
Fix the X86 addConstantPoolReference, which had the operands in the wrong order.
...
llvm-svn: 55867
2008-09-06 00:50:00 +00:00
36d532abd6
Next limited float precision expansion (log2 12 bits)
...
llvm-svn: 55866
2008-09-05 23:49:37 +00:00
1dd2e40521
Revert r55859. This is breaking the build in the abscence of its companion commit.
...
llvm-svn: 55865
2008-09-05 23:36:01 +00:00
a9c52c8219
Fix for PR2687: Add patterns to match sint_to_fp and fp_to_sint for <2 x
...
i32>. This is a little messy, but it works.
We should really get rid of the intrinsics, though, since they map
perfectly well to standard LLVM instructions.
llvm-svn: 55864
2008-09-05 23:07:03 +00:00
f17a2f3602
Move the code that inserts copies for function livein registers
...
out of ScheduleDAGEmit.cpp and into SelectionDAGISel.cpp. This
allows it to be run exactly once per function, even if multiple
SelectionDAG iterations happen in the entry block, as may happen
with FastISel.
llvm-svn: 55863
2008-09-05 22:59:21 +00:00
d94269f906
Remove unused map.
...
llvm-svn: 55861
2008-09-05 21:55:33 +00:00
9e23602849
Delete the removeCallEdgeTo callgraph method,
...
because it does not maintain a correct list
of callsites. I discovered (see following
commit) that the inliner will create a wrong
callgraph if it is fed a callgraph with
correct edges but incorrect callsites. These
were created by Prune-EH, and while it wasn't
done via removeCallEdgeTo, it could have been
done via removeCallEdgeTo, which is an accident
waiting to happen. Use removeCallEdgeFor
instead.
llvm-svn: 55859
2008-09-05 21:43:04 +00:00
db06a99239
Fix X86FastISel's shift and select code to reject illegal types.
...
llvm-svn: 55857
2008-09-05 21:27:34 +00:00
d4dac0e9ea
Add the next limited-precision expansion.
...
llvm-svn: 55856
2008-09-05 21:27:19 +00:00
e556018dc0
Fix the opcodes used by X86FastISel for shifts and conditional moves.
...
llvm-svn: 55855
2008-09-05 21:13:04 +00:00
f5bc7e57bc
Factor out code that emits load and store instructions.
...
llvm-svn: 55854
2008-09-05 21:00:03 +00:00
ffcc884c77
Rename method.
...
llvm-svn: 55853
2008-09-05 20:49:33 +00:00
fd634599dc
FastISel support for AND and OR with type i1.
...
llvm-svn: 55846
2008-09-05 18:44:22 +00:00
520143e563
Add hooks for other intrinsics to get low-precision expansions.
...
llvm-svn: 55845
2008-09-05 18:38:42 +00:00
7d7a26df65
X86FastISel support for shifts and conditional moves.
...
llvm-svn: 55844
2008-09-05 18:30:08 +00:00
fcf545690c
FastISel support for ConstantExprs.
...
llvm-svn: 55843
2008-09-05 18:18:20 +00:00
677c3afbd1
Revert r55817. It broke PIC. FastISel will need to find a different
...
approach here.
llvm-svn: 55842
2008-09-05 18:13:01 +00:00
4f0d21592a
If SSE2 is available, x86 should pass first 3 f32/f64 arguments in XMM registers for fastcc calls.
...
llvm-svn: 55840
2008-09-05 17:24:07 +00:00
6b8fae1777
Add a variant of AnalyzeCallOperands that can be used by fast isel.
...
llvm-svn: 55838
2008-09-05 16:59:26 +00:00
3a52056d4d
Use removeAllCalledFunctions rather than removing
...
edges one by one by hand.
llvm-svn: 55836
2008-09-05 14:56:53 +00:00
7c8fb1ad93
Remove trailing whitespace.
...
llvm-svn: 55835
2008-09-05 12:37:12 +00:00
6dd02b5219
Make this pass return that it made a change if
...
it modifies a functions attributes.
llvm-svn: 55831
2008-09-05 09:08:37 +00:00
4d50e984bb
"Fix" PR2762. The testcase now crashes codegen
...
elsewhere due to a missing pattern for
v2f64 = sint_to_fp v2i32. That is PR2687.
llvm-svn: 55828
2008-09-05 08:13:35 +00:00
921ddd69ba
Fix a search+replace-o.
...
llvm-svn: 55824
2008-09-05 01:58:21 +00:00
f2a52bbee5
Add -flimit-float-precision to enable some faster,
...
but less accurate (non-IEEE) code sequences for
certain math library functions. Add the first of
several such expansions. Don't worry, if you don't
turn it on it won't affect you.
llvm-svn: 55823
2008-09-05 01:48:15 +00:00
09faf81b6c
Check a comparion's operand type for legality before
...
expanding its operands.
llvm-svn: 55820
2008-09-05 01:33:56 +00:00
ffd89d40d2
Fix X86FastISel code for comparisons and conditional branches
...
to check the result of getRegForValue before using it, and
to check for illegal operand types.
llvm-svn: 55819
2008-09-05 01:15:35 +00:00
ea56bdde34
FastISel support for unreachable.
...
llvm-svn: 55818
2008-09-05 01:08:41 +00:00
5b4a9f4a69
In FastISel mode, the scheduler may be invoked multiple times
...
in the same block. Fix the entry-block handling to only run at
at the beginning of the entry block, and not any other times.
llvm-svn: 55817
2008-09-05 01:07:48 +00:00
a5753b31be
X86FastISel support for conditional branches.
...
llvm-svn: 55816
2008-09-05 01:06:14 +00:00
50288e3c99
Add initial support for selecting constant materializations that require constant
...
pool loads on X86 in fast isel. This isn't actually used yet.
llvm-svn: 55814
2008-09-05 00:06:23 +00:00
09fdbcf400
X86FastISel support for ICmpInst and FCmpInst.
...
llvm-svn: 55811
2008-09-04 23:26:51 +00:00
6c94b99c62
For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
...
llvm-svn: 55807
2008-09-04 22:59:58 +00:00
40519f0370
A loop may be unswitched multiple times. Reconstruct dom info. at the end.
...
llvm-svn: 55806
2008-09-04 22:43:59 +00:00
b9d5e02811
If function notes say optimize for size, then adjust alignment.
...
llvm-svn: 55794
2008-09-04 21:03:41 +00:00
5eba3bcac6
Add an include of SmallSet.h.
...
llvm-svn: 55793
2008-09-04 20:49:27 +00:00
00ec74616b
Initialize loop data first.
...
llvm-svn: 55792
2008-09-04 20:36:36 +00:00
21a57993dc
Neaten this up a bit. No functionality change.
...
llvm-svn: 55789
2008-09-04 19:16:20 +00:00
d52071540c
Do not unswitch if the function notes say we're optimizing this function for size.
...
llvm-svn: 55786
2008-09-04 18:55:13 +00:00
19fb2aba50
try to seperate the mechanism into something others can use
...
llvm-svn: 55785
2008-09-04 18:51:26 +00:00
fe1bb7964c
Add intrinsic forms of pow and exp2. The non-intrinsic
...
forms remain to handle older IR files, but will go away soon.
llvm-svn: 55781
2008-09-04 18:30:46 +00:00
a79db30d28
Tidy up several unbeseeming casts from pointer to intptr_t.
...
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
b8c7ba228f
Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase.
...
llvm-svn: 55777
2008-09-04 16:48:33 +00:00
634412fe35
Clean up uses of TargetLowering::getTargetMachine.
...
llvm-svn: 55769
2008-09-04 15:39:15 +00:00
95d573a7f0
cleanup as per Duncan's review
...
llvm-svn: 55766
2008-09-04 14:34:22 +00:00
4f948bd87a
Add a first attempt at implementing stores for X86 fast isel using target hooks.
...
Dan or Evan, please review.
llvm-svn: 55764
2008-09-04 07:08:58 +00:00
8d8f47d50b
Load from GV stub should be locally CSE'd.
...
llvm-svn: 55763
2008-09-04 06:18:33 +00:00
93d40ae1e1
Fix an overly strict assertion. Source register of a copy may not be killed, it may be killed by an implicit super-register use.
...
llvm-svn: 55762
2008-09-04 05:43:55 +00:00
3152edf474
Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support!
...
llvm-svn: 55756
2008-09-04 01:04:15 +00:00
da2d80688b
Add intrinsics for log, log2, log10, exp, exp2.
...
No functional change (and no FE change to generate them).
llvm-svn: 55753
2008-09-04 00:47:13 +00:00
e039d5580e
Do trivial local CSE for constants and other non-Instruction values
...
in FastISel.
llvm-svn: 55748
2008-09-03 23:32:19 +00:00
45df9951f5
Put RegsForValue in the llvm namespace to avoid warnings about
...
classes in the llvm namespace having members with types from
anonymous namespaces.
llvm-svn: 55747
2008-09-03 23:18:39 +00:00
7bda51f5a4
Create HandlePHINodesInSuccessorBlocksFast, a version of
...
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.
This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.
llvm-svn: 55746
2008-09-03 23:12:08 +00:00
a26e2075b8
Update inline threshold for current function if the notes say, optimize for size.
...
llvm-svn: 55745
2008-09-03 23:06:09 +00:00
2fbfb70530
Fix a bug that prevented PRE from applying in some cases.
...
llvm-svn: 55744
2008-09-03 23:06:07 +00:00
397d895bb8
Avoid extra comma.
...
llvm-svn: 55742
2008-09-03 22:55:40 +00:00
3771a1281f
Parse and print opt_size note.
...
llvm-svn: 55740
2008-09-03 22:10:21 +00:00
9fed8f5b9c
Initial version of a Partial Specialization IPO pass. It triggers a couple hundred times on 176.gcc. I don't know the performance impact yet, the heuristic is quite simple still.
...
llvm-svn: 55734
2008-09-03 21:00:28 +00:00
5c1ff11fc3
Do not emit a UsedDirective for things in the llvm.used
...
list that have internal linkage; the linker doesn't need
or want this. (These objects must still be preserved
at compile time, so just removing them from the llvm.used
list doesn't work.) Should affect only Darwin.
llvm-svn: 55722
2008-09-03 20:34:58 +00:00
a563d24e5d
Fix typo in a comment.
...
llvm-svn: 55720
2008-09-03 20:25:40 +00:00
a4211876e5
Add parentheses to make code more readable.
...
llvm-svn: 55717
2008-09-03 19:57:15 +00:00
50c66cdb0d
Fix comments.
...
llvm-svn: 55716
2008-09-03 19:52:17 +00:00
ee088a7093
If a SCC has a node without a function, then the SCC
...
analysis would bail out without removing function
records for other members of the SCC (which may exist
if those functions read or wrote global variables).
Since these are initialized to "readnone", this
resulted in incorrect alias analysis results.
llvm-svn: 55714
2008-09-03 19:37:16 +00:00
924d9084d8
Add custom inliner that handles only functions that are marked as always_inline.
...
llvm-svn: 55713
2008-09-03 18:50:53 +00:00
0d442ffa2b
Handle "always inline" note during inline cost analysis.
...
llvm-svn: 55712
2008-09-03 18:47:45 +00:00
79661994b1
Check noinline note and ignore other notes.
...
llvm-svn: 55711
2008-09-03 18:46:35 +00:00
62be9ad270
Handle "noinline" note inside the simple inliner.
...
llvm-svn: 55708
2008-09-03 18:10:21 +00:00
b1b9398ea7
Oops, I accidentally broke the fallback case with my last commit.
...
llvm-svn: 55704
2008-09-03 17:51:57 +00:00
ea666816c2
Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization. This is
...
the simple fix, materializing the constant before every use. It might be better to either track domination of uses or
to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses.
llvm-svn: 55703
2008-09-03 17:37:03 +00:00
575fad337c
Split the SelectionDAG-building code, including the FunctionLoweringInfo
...
and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.
llvm-svn: 55701
2008-09-03 16:12:24 +00:00
e74d7502d2
Fix maxo bado thinko.
...
llvm-svn: 55700
2008-09-03 16:10:55 +00:00
b10f1a5c60
Separate MachineInstr-emitting routines from actual scheduling
...
routines and move them into a separate file, ScheduleDAGEmit.cpp.
llvm-svn: 55699
2008-09-03 16:01:59 +00:00
c7367b4546
Fix addRegisterDead and addRegisterKilled to be more thorough
...
when searching for redundant subregister dead/kill bits.
Previously it was common to see instructions marked like this:
"RET %EAX<imp-use,kill>, %AX<imp-use,kill>"
With this change, addRegisterKilled continues scanning after
finding the %EAX operand, so it proceeds to discover the
redundant %AX kill and eliminates it, producing this:
"RET %EAX<imp-use,kill>"
This currently has no effect on the generated code.
llvm-svn: 55698
2008-09-03 15:56:16 +00:00
0eca0571f8
Since onlyReadsMemory returns true if in fact
...
doesNotAccessMemory, check doesNotAccessMemory
first, since otherwise functions may be
marked readonly rather than readnone.
llvm-svn: 55697
2008-09-03 15:31:24 +00:00
42c644ef03
Cleanup GlobalsModRef a bit. When analysing the
...
callgraph, when one member of a SCC calls another
then the analysis would drop to mod-ref because
there is (usually) no function info for the callee
yet; fix this. Teach the analysis about function
attributes, in particular the readonly attribute
(which requires being careful about globals).
llvm-svn: 55696
2008-09-03 12:55:42 +00:00
ac5c7d514f
Try to fold each element of a vector. This is needed to maintain structural
...
equivalence.
llvm-svn: 55694
2008-09-03 06:48:55 +00:00
a41ee2974b
Add X86 target hook to implement load (even from GlobalAddress).
...
llvm-svn: 55693
2008-09-03 06:44:39 +00:00
31ddd09f4a
If TargetSelectInstruction returns true, move to next instruction.
...
llvm-svn: 55692
2008-09-03 06:43:41 +00:00
2fcb26cc75
Don't apply this transform to vectors. Fixes PR2756.
...
llvm-svn: 55690
2008-09-03 06:24:21 +00:00
f023db6444
Don't crash when trying to constant fold a vector with some elements that can't
...
be folded. Instead, fail to fold the entire vector.
We could also return a vector with some elements folded and some not. If anyone
thinks that's a better approach, please speak up!
llvm-svn: 55689
2008-09-03 05:54:33 +00:00
2175b55dc7
Fix capitalization in #include of FastISel.h. This unbreaks the build on case-sensitive filesystems.
...
llvm-svn: 55687
2008-09-03 02:54:11 +00:00
8f23ec96b0
Unbreak fast isel.
...
llvm-svn: 55685
2008-09-03 01:04:47 +00:00
bcd39345de
Add additional check to ensure that iv is canonicalized.
...
llvm-svn: 55682
2008-09-03 00:29:13 +00:00
b530f08122
Check iteration count.
...
llvm-svn: 55680
2008-09-03 00:10:56 +00:00
24422d4928
Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class.
...
llvm-svn: 55679
2008-09-03 00:03:49 +00:00
81fed043c5
While removing PHI, use basicblock to identify incoming value.
...
llvm-svn: 55678
2008-09-03 00:02:42 +00:00
7e59270272
s/FP_AlwaysInline/FN_NOTE_AlwaysInline/g
...
llvm-svn: 55676
2008-09-02 22:43:57 +00:00
43c5a52e07
If all IV uses are extending integer IV then change the type of IV itself, if possible.
...
llvm-svn: 55674
2008-09-02 22:18:08 +00:00
bfa535af9f
respect inline=never and inline=always notes.
...
llvm-svn: 55673
2008-09-02 22:16:13 +00:00
09ff2e7372
80 col violations.
...
llvm-svn: 55668
2008-09-02 21:59:13 +00:00
ca9d93e627
Read and write function notes.
...
llvm-svn: 55657
2008-09-02 21:47:13 +00:00
805b37ca43
Use bitwise AND.
...
llvm-svn: 55656
2008-09-02 21:46:44 +00:00
600879c8e8
Print function notes.
...
llvm-svn: 55647
2008-09-02 20:56:33 +00:00
c57b7a0fc8
Parse function notes.
...
llvm-svn: 55646
2008-09-02 20:52:40 +00:00
d334a43a86
Initialize function notes.
...
llvm-svn: 55645
2008-09-02 20:51:15 +00:00
bc69829b22
Fix some bugs in the code sequences for atomics.
...
llvm-svn: 55643
2008-09-02 20:30:23 +00:00
115267fdc6
Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,
...
even in FastISel mode in the case where FastISel successfully
selects all the instructions.
llvm-svn: 55641
2008-09-02 20:17:56 +00:00
99341f2d9d
plug a little memleak in verifyFunction()
...
# first commit to llvm, so whatch out :)
llvm-svn: 55631
2008-09-02 11:30:10 +00:00
52b181206f
MMI may be null.
...
llvm-svn: 55626
2008-09-02 08:14:01 +00:00
df8cdc3717
Add Mac OS X compatible JIT callback routine.
...
llvm-svn: 55625
2008-09-02 07:49:03 +00:00
3be5b728b1
Revamp ARM JIT.
...
llvm-svn: 55624
2008-09-02 06:52:38 +00:00
34f3a962b0
Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes.
...
llvm-svn: 55623
2008-09-02 06:51:36 +00:00
9c64e61176
Provide two overloads of AnalyzeNewNode.
...
The first can update the SDNode in an SDValue
while the second is called with SDNode* and
returns a possibly updated SDNode*.
This patch has no intended functional impact,
but helps eliminating ugly temporary SDValues.
llvm-svn: 55608
2008-09-01 15:10:19 +00:00
4b31a2a7ce
Even though no caller actually uses the new value
...
(what matters is that it is added to the worklist),
it seems more logical to return it.
llvm-svn: 55606
2008-09-01 13:11:13 +00:00
130d9efec3
Add a small pass that sets the readnone/readonly
...
attributes on functions, based on the result of
alias analysis. It's not hardwired to use
GlobalsModRef even though this is the only (AFAIK)
alias analysis that results in this pass actually
doing something. Enable as follows:
opt ... -globalsmodref-aa -markmodref ...
Advantages of this pass: (1) records the result
of globalsmodref in the bitcode, meaning it is
available for use by later passes (currently
the pass manager isn't smart enough to magically
make an advanced alias analysis available to all
later passes), which may expose more optimization
opportunities; (2) hopefully speeds up compilation
when code is optimized twice, for example when a
file is compiled to bitcode, then later LTO is done
on it: marking functions readonly/readnone when
producing the initial bitcode should speed up alias
analysis during LTO; (3) good for discovering that
globalsmodref doesn't work very well :)
Not currently turned on by default.
llvm-svn: 55604
2008-09-01 11:40:11 +00:00
fa558788e7
Control flow instruction encodings.
...
llvm-svn: 55601
2008-09-01 08:25:56 +00:00
c288cc0572
ldm / stm instruction encodings.
...
llvm-svn: 55599
2008-09-01 07:48:18 +00:00
c37532b24a
AXI2 and AXI3 instruction encodings.
...
llvm-svn: 55598
2008-09-01 07:34:13 +00:00
a282723499
Reorganize instruction formats again; AXI1 encoding.
...
llvm-svn: 55597
2008-09-01 07:19:00 +00:00
169eccc24e
addrmode3 instruction encodings.
...
llvm-svn: 55596
2008-09-01 07:00:14 +00:00
624844b4dd
Reorganize some instruction format definitions. No functionality change.
...
llvm-svn: 55594
2008-09-01 01:51:14 +00:00
cccca875b1
Rest of addrmode2 instruction encodings.
...
llvm-svn: 55593
2008-09-01 01:27:33 +00:00
01fd3f129a
Addr2 word / byte load encodings.
...
llvm-svn: 55591
2008-08-31 19:02:21 +00:00
5b6c931e1f
Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.
...
llvm-svn: 55590
2008-08-31 18:32:16 +00:00
81d6a38434
fix a bunch of 80-col violations
...
llvm-svn: 55588
2008-08-31 15:37:04 +00:00
aebd2662d3
Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR
...
instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.
llvm-svn: 55582
2008-08-31 02:59:23 +00:00
62cf24343c
Expand for ROTR with MVT::i64.
...
Dale, Could you please review this?
llvm-svn: 55581
2008-08-31 02:53:19 +00:00
58bb4f1bf0
Cosmetic changes to Machine LICM. No functionality change.
...
llvm-svn: 55578
2008-08-31 02:30:23 +00:00
11284ea499
Another situation where ROTR is cheaper than ROTL.
...
llvm-svn: 55577
2008-08-31 01:13:31 +00:00
4822a7ac8a
For this pattern, ROTR is the cheaper option.
...
llvm-svn: 55576
2008-08-31 01:04:56 +00:00
fc72416447
- Fix comment so that it describes how the code really works:
...
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotl x, y)
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
// (rotr x, (sub 32, y))
Example: (x == 0xDEADBEEF and y == 4)
(x << 4) | (x >> 28)
=> 0xEADBEEF0 | 0x0000000D
=> 0xEADBEEFD
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> 0xEADBEEFD
- Fix comment and code for second version. It wasn't using the rot* propertly.
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotr x, y)
// fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
// (rotl x, (sub 32, y))
(x << 28) | (x >> 4)
=> 0xD0000000 | 0x0DEADBEE
=> 0xDDEADBEE
(rotl x, 4)
=> 0xEADBEEFD
(rotr x, 28)
=> (0xEADBEEFD)
llvm-svn: 55575
2008-08-31 00:37:27 +00:00
66ccf603a9
typo
...
llvm-svn: 55574
2008-08-30 22:16:05 +00:00
e12264bf41
fix some 80-col violations
...
llvm-svn: 55571
2008-08-30 19:29:20 +00:00
eeb6537abb
PR2731: C and Ocaml bindings for setTailCall and isTailCall.
...
Based on patch by Giorgos Korfiatis.
llvm-svn: 55570
2008-08-30 16:34:54 +00:00
b52d1ed7e9
Fix ConstantExpr::getInsertElement.
...
Breakage was exposed in the Ocaml bindings tests after Chris
uncommented an assertion in r55084.
llvm-svn: 55566
2008-08-30 15:41:51 +00:00
a719239719
fix some 80-col violations
...
llvm-svn: 55565
2008-08-30 10:09:02 +00:00
a3771d5bd9
Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction.
...
llvm-svn: 55564
2008-08-30 09:09:33 +00:00
542ac62971
Fold isRematerializable checks into isSafeToReMat.
...
llvm-svn: 55563
2008-08-30 09:07:18 +00:00
b8d588d89c
For now, can't mark XOR64rr isAsCheapAsAMove. It's technically correct. But various passes cannot handle remating these.
...
llvm-svn: 55562
2008-08-30 08:54:22 +00:00
cfb7f3abdf
Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
...
llvm-svn: 55558
2008-08-30 02:03:58 +00:00
6f0c51d9da
Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg
...
assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen
vreg. Other solutions might be preferable, such as:
1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently.
2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact.
llvm-svn: 55555
2008-08-30 00:38:46 +00:00
340d264f52
Add ppc partial-word ATOMIC_CMP_SWAP.
...
llvm-svn: 55554
2008-08-30 00:08:53 +00:00
3fddc7e906
Swap fp comparison operands and change predicate to allow load folding (safely this time).
...
llvm-svn: 55553
2008-08-29 23:22:12 +00:00
f93bc7f755
Use static_cast instead of C style cast.
...
llvm-svn: 55552
2008-08-29 23:21:31 +00:00
894be333f1
Fix 80 col. violations.
...
llvm-svn: 55551
2008-08-29 23:20:46 +00:00
5e7658c2e4
Back out 55498. It broken Apple style bootstrapping.
...
llvm-svn: 55549
2008-08-29 22:21:44 +00:00
b3ed09703c
Backing out 55521. Not safe.
...
llvm-svn: 55548
2008-08-29 22:13:21 +00:00
f0a88d6b2a
Add partial word version of ATOMIC_SWAP.
...
llvm-svn: 55546
2008-08-29 18:29:46 +00:00
0673a8af14
Add initial support for fast isel of instructions that have inputs pinned to physical registers.
...
llvm-svn: 55545
2008-08-29 17:45:56 +00:00
b1a635b30c
regenerate
...
llvm-svn: 55542
2008-08-29 17:20:18 +00:00
b25e5eab23
Asmprint nameless instructions as:
...
%4 = add ...
instead of:
add ... ; 4
This makes opt -print-cfg output actually usable and makes .ll files
generally easier to read. This fixes PR2480
llvm-svn: 55541
2008-08-29 17:19:30 +00:00
a51c7030e2
Add support for parsing .ll files that have numbers in front of
...
nameless values, such as:
%3 = add i32 4, 2
This fixes the first half of PR2480
llvm-svn: 55539
2008-08-29 17:12:13 +00:00
44b2138b9a
TableGen'ing instruction encodings.
...
llvm-svn: 55533
2008-08-29 07:42:03 +00:00
c139c221dd
addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 encode the opcode.
...
llvm-svn: 55531
2008-08-29 07:40:52 +00:00
9f717afd68
MVN is addrmode1.
...
llvm-svn: 55530
2008-08-29 07:36:24 +00:00
ee98fa9db2
More refactoring.
...
llvm-svn: 55528
2008-08-29 06:41:12 +00:00
960b17a3c2
Swap fp comparison operands and change predicate to allow load folding.
...
llvm-svn: 55521
2008-08-28 23:48:31 +00:00
2d37f19ef2
Refactor ARM instruction format definitions into a separate file. No functionality changes.
...
llvm-svn: 55518
2008-08-28 23:39:26 +00:00
d58f3e36d0
Add a target callback for FastISel.
...
llvm-svn: 55512
2008-08-28 23:21:34 +00:00
95d77f5466
remove tabs, fix > 80 cols
...
llvm-svn: 55511
2008-08-28 23:19:51 +00:00
e6fe88391a
rename destroy -> releaseMemory to properly hook into passmgr.
...
llvm-svn: 55508
2008-08-28 22:56:53 +00:00
b011a8f611
Add support for JIT exceptions on Darwin. Since we're dealing with libgcc,
...
whose darwin code was written after the ability to dynamically register frames,
we need to do special hacks to make things work.
llvm-svn: 55507
2008-08-28 22:34:49 +00:00
f304a7aa4d
erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
...
llvm-svn: 55504
2008-08-28 21:40:38 +00:00
c45733f194
Implement null and undef values for FastISel.
...
llvm-svn: 55500
2008-08-28 21:19:07 +00:00
1e137300bd
In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN
...
llvm-svn: 55499
2008-08-28 21:04:05 +00:00
f27e33baa7
Optimize DAGCombiner's worklist processing. Previously it started
...
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.
This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.
llvm-svn: 55498
2008-08-28 21:01:56 +00:00
17da671922
Move CaseBlock, JumpTable, and BitTestBlock to be members of
...
SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.
llvm-svn: 55497
2008-08-28 20:38:18 +00:00
360c57f683
Fix a FastISel bug where the instructions from lowering the arguments
...
were being emitted after the first instructions of the entry block.
llvm-svn: 55496
2008-08-28 20:28:56 +00:00
26d54b3ef3
Use resize instead of reserve. Reserve doesn't change size().
...
llvm-svn: 55486
2008-08-28 18:32:53 +00:00
6c8a99a778
Reduce the size of the Parts vector.
...
llvm-svn: 55483
2008-08-28 18:29:58 +00:00
d8a82b75e2
Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG.
...
llvm-svn: 55482
2008-08-28 18:26:01 +00:00
a32affb9ba
Implement partial-word binary atomics on ppc.
...
llvm-svn: 55478
2008-08-28 17:53:09 +00:00
9cd1a5e530
FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead.
...
llvm-svn: 55476
2008-08-28 17:47:37 +00:00
04cf2e4540
Revert r55467; it causes regressions in UnitTests/Vector/divides,
...
Benchmarks/sim/sim, and others on x86-64.
llvm-svn: 55475
2008-08-28 17:22:54 +00:00
029c1c8460
Correctly resize the Parts array.
...
llvm-svn: 55471
2008-08-28 14:24:45 +00:00
6975602024
If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy.
...
llvm-svn: 55467
2008-08-28 07:53:51 +00:00
97af20f85f
FsFLD0S{S|D} and V_SETALLONES are as cheap as moves.
...
llvm-svn: 55466
2008-08-28 07:52:25 +00:00
e5a22c06c5
Make the verifier reject instructions which have null pointers
...
for operands: rdar://6179606. no testcase, because I can't write
a .ll file that is this broken ;-)
llvm-svn: 55460
2008-08-28 04:02:44 +00:00
65df1188c6
Clear the intervals list in "destroy", patch by
...
Prakash Prabhu!
llvm-svn: 55458
2008-08-28 03:33:03 +00:00
41be0d4445
Split the ATOMIC NodeType's to include the size, e.g.
...
ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD.
Increased the Hardcoded Constant OpActionsCapacity to match.
Large but boring; no functional change.
This is to support partial-word atomics on ppc; i8 is
not a valid type there, so by the time we get to lowering, the
ATOMIC_LOAD nodes looks the same whether the type was i8 or i32.
The information can be added to the AtomicSDNode, but that is the
largest SDNode; I don't fully understand the SDNode allocation,
but it is sensitive to the largest node size, so increasing
that must be bad. This is the alternative.
llvm-svn: 55457
2008-08-28 02:44:49 +00:00
e1a9a780a5
Reorganize the lifetimes of the major objects SelectionDAGISel
...
works with.
SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering
objects now get created once per SelectionDAGISel instance, and
can be reused across blocks and across functions. Previously,
they were created and destroyed each time they were needed.
This reorganization simplifies the handling of PHI nodes, and
also SwitchCases, JumpTables, and BitTestBlocks. This
simplification has the side effect of fixing a bug in FastISel
where successor PHI nodes weren't being updated correctly.
This is also a step towards making the transition from FastISel
into and out of SelectionDAG faster, and also making
plain SelectionDAG faster on code with lots of little blocks.
llvm-svn: 55450
2008-08-27 23:52:12 +00:00
5f57bc2247
Add a helper method that will be used to support EXTRACT_SUBREG for selecting trunc's in fast-isel.
...
llvm-svn: 55439
2008-08-27 22:30:02 +00:00
76105a4a4f
Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use the
...
SSE2 registers as well as the MMX registers.
llvm-svn: 55436
2008-08-27 21:32:04 +00:00
25b4cad510
Put file scoped constants in an anonymous namespace. Use the "using namespace
...
llvm" for consistency.
llvm-svn: 55435
2008-08-27 21:10:13 +00:00
f016b263e2
Move the check whether it's worth remating to caller.
...
llvm-svn: 55434
2008-08-27 20:58:54 +00:00
d6adbb6a0f
Do not apply the transformation if the target does not support DestTy natively.
...
llvm-svn: 55433
2008-08-27 20:55:23 +00:00
61cfa3095d
Fix FastISel's bitcast code for the case where getRegForValue fails.
...
llvm-svn: 55431
2008-08-27 20:41:38 +00:00
57dc078570
Refactor isSafeToReMat out of 2addr pass.
...
llvm-svn: 55430
2008-08-27 20:33:50 +00:00
90609850b2
Use TargetLowering to get the types in fast isel, which handles pointer types correctly for our purposes.
...
llvm-svn: 55428
2008-08-27 18:58:30 +00:00
d01789be23
Don't check TLI.getOperationAction. The FastISel way is to
...
just try to do the action and let the tablegen-generated code
determine if there is target-support for an operation.
llvm-svn: 55427
2008-08-27 18:15:05 +00:00
b0b5a27438
Add a new FastISel method, getRegForValue, which takes care of
...
the details of materializing constants and other values into
registers, and make use of it in several places.
llvm-svn: 55426
2008-08-27 18:10:19 +00:00
f2a6c1579f
Add a comment about the current floating-point constant code in FastISel.
...
llvm-svn: 55425
2008-08-27 18:01:42 +00:00
cf7ca5d0ba
Fix typos and whitespaces. Other cosmetic changes based on feedback.
...
llvm-svn: 55424
2008-08-27 17:50:18 +00:00
81e23091d9
Minor cleanup.
...
llvm-svn: 55423
2008-08-27 17:36:58 +00:00
7f2777e8d2
Reinstate the x86-64 portion of r55190. When doing extloads into
...
64-bit registers from 16-bit and smaller memory locations, prefer
instructions that define the entire 64-bit register, to avoid
partial-register updates.
llvm-svn: 55422
2008-08-27 17:33:15 +00:00
3a3a52de58
Optimize ScheduleDAGRRList's topological sort to use one pass instead
...
of two, and to not need a scratch std::vector. Also, compute the ordering
immediately in the result array, instead of in another scratch std::vector
that is copied to the result array.
llvm-svn: 55421
2008-08-27 16:29:48 +00:00
9cbdedcbcf
Optimize ScheduleDAG's ComputeDepths and ComputeHeights to not need
...
a scratch std::vector.
llvm-svn: 55420
2008-08-27 16:27:25 +00:00
a5b15bd09b
Remove the std::ostream form of PseudoSourceValue's print,
...
which isn't needed anymore.
llvm-svn: 55419
2008-08-27 16:19:44 +00:00
6d618724b5
Diagnose uses of unsized types with the byval attribute in the
...
verifier. See PR2711 for details.
llvm-svn: 55414
2008-08-27 14:48:06 +00:00
4051bf47ec
Update wording, as aggregates are now first-class.
...
llvm-svn: 55413
2008-08-27 14:44:57 +00:00
183edfdd86
Add DebugInfoBuilder. Patch by Talin!
...
llvm-svn: 55409
2008-08-27 06:51:14 +00:00
5ca269e684
Basic FastISel support for floating-point constants.
...
llvm-svn: 55401
2008-08-27 01:09:54 +00:00
54aff7bb23
Fix handling of inttoptr and ptrtoint when unhandled operands are present.
...
llvm-svn: 55400
2008-08-27 00:35:37 +00:00
140549256f
Add support for fast isel of inttoptr and ptrtoint in the cases where truncation is not needed.
...
llvm-svn: 55399
2008-08-27 00:31:01 +00:00
ca1711a5b5
Factor out a large amoutn of the cast handling code in fast isel into helper methods.
...
This simultaneously makes the code simpler and adds support for sext as well.
llvm-svn: 55398
2008-08-26 23:46:32 +00:00
343310a715
Add support for fast isel of zext.
...
llvm-svn: 55396
2008-08-26 23:14:49 +00:00
abfdf928d8
disallow direct access to SDValue::ResNo, provide a getter instead
...
llvm-svn: 55394
2008-08-26 22:36:50 +00:00
655c1dc63d
Add support for fptosi of constants in fast isel.
...
llvm-svn: 55393
2008-08-26 22:34:28 +00:00
b39e0decf8
Put a heuristic in place to prevent GVN from falling into bad cases with massively complicated CFGs.
...
This speeds up a particular testcase from 12+ hours to 5 seconds with little perceptible loss of quality.
llvm-svn: 55391
2008-08-26 22:07:42 +00:00
d56f73f2f2
Optimize SelectionDAG's topological sort to use one pass instead
...
of two, and to not need a scratch std::vector. Also, use the
SelectionDAG's topological sort in LegalizeDAG instead of having
a separate implementation.
llvm-svn: 55389
2008-08-26 21:42:18 +00:00
6fda9208d9
Refactor the bitcast code into its own function.
...
llvm-svn: 55387
2008-08-26 21:28:54 +00:00
b5e04bfb18
Make FastISel use the correct argument type when casting GEP indices.
...
llvm-svn: 55384
2008-08-26 20:57:08 +00:00
3bcbbece19
Don't select binary instructions with illegal types.
...
llvm-svn: 55383
2008-08-26 20:52:40 +00:00
3c4dc434ee
Add support for fast isel of sitofp, and remove some unnecessary and imprecise legality checks.
...
llvm-svn: 55381
2008-08-26 20:37:00 +00:00
e0ac9765b2
Use a combination of copyRegToReg and ISD::BIT_CONVERT when doing fast isel of bitcasts,
...
allowing it to support the full range of conversions people might ask for in a correct manner.
llvm-svn: 55378
2008-08-26 18:51:24 +00:00
42ccd39689
These assertions should be return false's instead, allowing the client to detect the failure.
...
llvm-svn: 55377
2008-08-26 18:50:40 +00:00
27fb3dcbc7
Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested
...
was inserted or not. This allows bitcast in fast isel to properly handle the case
where an appropriate reg-to-reg copy is not available.
llvm-svn: 55375
2008-08-26 18:03:31 +00:00
4310d39844
If IV is used in a int-to-float cast inside the loop then try to eliminate the cast operation.
...
llvm-svn: 55374
2008-08-26 17:57:54 +00:00
bf05ebaccf
Add support for fast isel of non-constant fptosi instructions.
...
llvm-svn: 55373
2008-08-26 17:44:42 +00:00
09f8cef571
If an xmm register is referenced explicitly in an inline asm, make sure to
...
assign it to a version of the xmm register with the regclass that matches its
type. This fixes PR2715, a bug handling some crazy xpcom case in mozilla.
llvm-svn: 55358
2008-08-26 06:19:02 +00:00
54ef9f5831
typo fix.
...
llvm-svn: 55355
2008-08-26 06:07:47 +00:00
2e834906b9
Actually recycle SDNode allocations. SelectionDAG is using
...
RecyclingAllocator, but this change is needed for the nodes
to actually be recycled. This cuts SelectionDAG's memory
usage high-water-mark in half in some cases.
llvm-svn: 55351
2008-08-26 01:44:34 +00:00
cf3e3017c8
Avoid a warning about isTargetNullPtr being unused in release builds.
...
llvm-svn: 55350
2008-08-26 01:38:29 +00:00
4884f87822
This is done.
...
llvm-svn: 55348
2008-08-26 01:13:44 +00:00
8dd01ccdd8
Add a RetVT parameter to emitted FastISel methods, so that we will be able to pass the desired return
...
type down. This is not currently used.
llvm-svn: 55345
2008-08-25 23:58:18 +00:00
d4eb0521e4
Implement 32 & 64 bit versions of PPC atomic
...
binary primitives.
llvm-svn: 55343
2008-08-25 22:34:37 +00:00
2c067325d6
Unbreak build.
...
llvm-svn: 55342
2008-08-25 22:20:39 +00:00
2da2e65d7d
80 col. violations.
...
llvm-svn: 55341
2008-08-25 21:58:43 +00:00
126afc5cb9
Expand bitcast support in fast isel to support bitcasts of non-constant values by emitting reg-reg copies.
...
llvm-svn: 55340
2008-08-25 21:32:34 +00:00
f00f1e50b5
Try approach to moving call address load inside of callseq_start. Now it's done during the preprocess of x86 isel. callseq_start's chain is changed to load's chain node; while load's chain is the last of callseq_start or the loads or copytoreg nodes inserted to move arguments to the right spot.
...
llvm-svn: 55338
2008-08-25 21:27:18 +00:00
765065c982
Remove PPC-specific lowering for atomics; the
...
generic stuff works fine.
Mark rewritten cmp-and-swap as not using CR1.
llvm-svn: 55336
2008-08-25 21:09:52 +00:00
32635dbfb2
Add support for fast isel of (integer) immediate materialization pattens, and use them to support
...
bitcast of constants in fast isel.
llvm-svn: 55325
2008-08-25 20:20:32 +00:00
166d6cb1fa
It's important for the cmp-and-swap to balance
...
loads and stores but it's even more important for
it to store the right value.:(
llvm-svn: 55319
2008-08-25 18:53:26 +00:00
6cfd3830fb
Nevermind. This broke the bootstrap (?!).
...
llvm-svn: 55318
2008-08-25 18:32:39 +00:00
dd6759aea7
MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of these
...
instructions on having SSE2.
llvm-svn: 55317
2008-08-25 18:20:52 +00:00
dab9425547
Fix pasto (values -> types) noticed by Josh Conner
...
llvm-svn: 55315
2008-08-25 17:03:15 +00:00
820eebc5a8
flush stream after dumping.
...
llvm-svn: 55301
2008-08-25 04:55:46 +00:00
e414681352
Fix asm printing of MOVSDto64mr and MOV64toSDrm.
...
llvm-svn: 55300
2008-08-25 04:11:42 +00:00
5b836c5f77
Temporarily reverting r55292. It's causing a bootstraping failure:
...
/Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm-gcc.obj/./gcc/xgcc ... src/libiberty/make-temp-file.c -o make-temp-file.o
Assertion failed: (Node2Index[SU->NodeNum] > Node2Index[I->Dep->NodeNum] && "Wrong topological sorting"), function InitDAGTopologicalSorting, file /Volumes/Sandbox/Buildbot/llvm/full-llvm/build/llvm.src/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 508.
../../../../llvm-gcc.src/libiberty/hashtab.c:955: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
make[4]: *** [hashtab.o] Error 1
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [multi-do] Error 1
make[2]: *** [all] Error 2
make[1]: *** [all-target-libiberty] Error 2
make: *** [all] Error 2
llvm-svn: 55295
2008-08-24 21:45:30 +00:00
25852069ed
remove the type checking logic already done by tblgen, just keep the
...
parts tblgen doesn't do (checking for constant, alloca, enclosing
function has gc marker). This passes dj! :)
llvm-svn: 55294
2008-08-24 20:46:13 +00:00
a078d83e17
simplify PseudoSourceValue printing a bit. Unnest all of PseudoSourceValue.cpp from the llvm namespace.
...
llvm-svn: 55293
2008-08-24 20:37:32 +00:00
Dan Gohman