Commit Graph

3630 Commits

Author SHA1 Message Date
Michael Zuckerman 229158c491 [Microsoft][C++] Clang doesn't support a use of "this" pointer inside inline asm
Clang doesn’t support a use of “this” pointer inside inline asm.
When I tried to compile a class or a struct (see example) with an inline asm that contains "this" pointer.
Clang returns with an error.
This patch fixes that.

error: expected unqualified-id
For example:
'''
struct A {
    void f() {
          __asm mov eax, this
              // error: expected unqualified-id
                  }
};
'''
Differential Revision: http://reviews.llvm.org/D15115

llvm-svn: 255645
2015-12-15 14:04:18 +00:00
Petar Jovanovic 2f264c31d3 [PowerPC] Fix test/CodeGen/ppc-sfvarargs
The issue seems to be that .ll file may either use number of register
value or alias %numUsedRegs, so the check needs to cover both cases.

This will hopefully fix the last regression introduced by r255515.

llvm-svn: 255539
2015-12-14 20:30:02 +00:00
Petar Jovanovic 59a981a8f3 [PowerPC] Fix make-check issues
Previous change r255515 introduced a couple of issues likely caused by
a different configure setup.

llvm-svn: 255533
2015-12-14 19:22:35 +00:00
Petar Jovanovic 88a328fbbe [Power PC] add soft float support for ppc32
This patch enables soft float support for ppc32 architecture and fixes
the ABI for variadic functions. This is the first in a set of patches
for soft float support in LLVM.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D13351

llvm-svn: 255515
2015-12-14 17:51:50 +00:00
Krzysztof Parzyszek 1065323eec [Hexagon] Xfail two tests that fail due to over-aligning arrays
llvm-svn: 255510
2015-12-14 17:17:20 +00:00
Krzysztof Parzyszek 1e6e3c60b4 [Hexagon] Update default paths and arguments
- Removed support for hexagonv3 and earlier.
- Added handling of hexagonv55 and hexagonv60.
- Added handling of target features (hvx, hvx-double).
- Updated paths to reflect current directory layout.

llvm-svn: 255502
2015-12-14 15:03:57 +00:00
David Majnemer 4e52d6f811 Update clang to use the updated LLVM EH instructions
Depends on D15139.

Reviewers: rnk

Differential Revision: http://reviews.llvm.org/D15140

llvm-svn: 255423
2015-12-12 05:39:21 +00:00
Easwaran Raman dd4c71ca6e Revert r254647.
Reason: The testcase fails in many architectures.

Differential Revision: http://reviews.llvm.org/D15163

llvm-svn: 255416
2015-12-12 01:11:09 +00:00
Easwaran Raman d547e5e168 Attach maximum function count to Module when using PGO mode
This sets the maximum entry count among all functions in the program to the
module using module flags. This allows the optimizer to use this information.

Differential Revision: http://reviews.llvm.org/D15163

llvm-svn: 255397
2015-12-12 00:31:02 +00:00
Hans Wennborg 2edb8fcf0d Mark MS inline ASM 'nodplicate' it it has labels (PR23715)
Duplicating it can lead to labels being defined twice.

Differential revision: http://reviews.llvm.org/D15399

llvm-svn: 255201
2015-12-10 01:38:04 +00:00
Simon Pilgrim 2a4df3fd2a [X86][AVX2] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86 as fast-isel tests using IR that is as close to what is generated here as possible.

The llvm tests will (re)added in a future commit.

llvm-svn: 255050
2015-12-08 21:16:45 +00:00
Richard Smith ce8eca578d Explicitly permit undefined behavior in constant initializers for global
variables in C, in the cases where we can constant-fold it to a value
regardless (such as floating-point division by zero and signed integer
overflow). Strictly enforcing this rule breaks too much code.

llvm-svn: 254992
2015-12-08 03:21:47 +00:00
Teresa Johnson ecc8038571 Remove target specifier from new tests
Hopefully fix the remaining bot failure from r254927. Remove
target specification since it shouldn't be needed, and this causes
an error when trying to check the pass execution structure in
test/CodeGen/thinlto_backend.c on non-x86 arches.

llvm-svn: 254940
2015-12-07 20:40:36 +00:00
Teresa Johnson f5ae87d70d Adjust test to fix bot error from r254927.
Remove the part of the error message that may vary across systems.

llvm-svn: 254938
2015-12-07 20:26:57 +00:00
Teresa Johnson aff223278c [ThinLTO] Option to invoke ThinLTO backend passes and importing
Summary:
Adds new option -fthinlto-index=<file> to invoke the LTO pipeline
along with function importing via clang using the supplied function
summary index file. This supports invoking the parallel ThinLTO
backend processes in a distributed build environment via clang.

Additionally, this causes the module linker to be invoked on the bitcode
file being compiled to perform any necessary promotion and renaming of
locals that are exported via the function summary index file.

Add a couple tests that confirm we get expected errors when we try to
use the new option on a file that isn't bitcode, or specify an invalid
index file. The tests also confirm that we trigger the expected function
import pass.

Depends on D15024

Reviewers: joker.eph, dexonsmith

Subscribers: joker.eph, davidxl, cfe-commits

Differential Revision: http://reviews.llvm.org/D15025

llvm-svn: 254927
2015-12-07 19:21:34 +00:00
Simon Pilgrim 474f24cc5e [X86][3DNow!] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86 as fast-isel tests using IR that is as close to what is generated here as possible.

The llvm tests will (re)added in a future commit

llvm-svn: 254849
2015-12-05 11:12:23 +00:00
Simon Pilgrim dfd2cf3f89 Updated test names to match the intrinsics being tested
llvm-svn: 254848
2015-12-05 11:08:51 +00:00
Simon Pilgrim efc2e45b77 [X86][F16C] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86 as fast-isel tests using IR that is as close to what is generated here as possible.

The llvm tests will (re)added in a future commit

I will update PR24580 on this new plan

llvm-svn: 254847
2015-12-05 10:37:35 +00:00
Stephen Hines 8267e7d456 LLDB JIT needs android vector passing rules.
Summary:
Looking into some recent issues with LLDBs expression parser highlighted that upstream clang passes vectors types differently to Android Open Source Project's clang for Arm Android targets.
This patch reflects the changes present in the AOSP and allows LLDB's JIT expression evaluation to work correctly for Arm Android targets when passing vectors.

This is submitted with consent of the original author Stephen Hines.

Reviewers: asl, rsmith, ADodds, rnk

Subscribers: rnk, aemerson, tberghammer, danalbert, srhines, cfe-commits, pirama

Differential Revision: http://reviews.llvm.org/D14639

llvm-svn: 254682
2015-12-04 01:39:30 +00:00
Petar Jovanovic 402257b84e [PowerPC] Fix calculating address of arguments on stack for variadic func
Fix calculating address of arguments larger than 32 bit on stack for
variadic functions (rounding up address to alignment) on ppc32 architecture.

Patch by Strahinja Petrovic.

Differential Revision: http://reviews.llvm.org/D14871

llvm-svn: 254670
2015-12-04 00:26:47 +00:00
George Burgess IV 08a4a8c389 Add tests for pass_object_size.
These additions were meant to go in as a part of r254554; while it's
certainly nice to have new functionality, it's nicer if we have tests to
go with it. :)

llvm-svn: 254632
2015-12-03 19:19:09 +00:00
Alexander Kornienko 061900fea8 Revert "Fix for merging decls in pragma weak Calling CheckFunctionDeclaration so that 2 decls for the 'weak' are merged. Differential Revision: http://reviews.llvm.org/D13048"
This reverts commit r254143 which introduces a crash on the following input:
  f(char *);
  g(char *);
  #pragma weak f = g
  int g(char *p) {}

llvm-svn: 254605
2015-12-03 11:37:28 +00:00
Simon Pilgrim 068c2ce836 [X86] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86 as fast-isel tests using IR that is as close to what is generated here as possible.

The llvm tests will (re)added in a future commit

I will update PR24580 on this new plan

llvm-svn: 254594
2015-12-03 08:45:21 +00:00
Sanjay Patel 4994956f1a generalize CHECK lines to make buildbot happy
llvm-svn: 254576
2015-12-03 01:51:39 +00:00
Richard Smith 0c6124ba82 PR17381: Treat undefined behavior during expression evaluation as an unmodeled
side-effect, so that we don't allow speculative evaluation of such expressions
during code generation.

This caused a diagnostic quality regression, so fix constant expression
diagnostics to prefer either the first "can't be constant folded" diagnostic or
the first "not a constant expression" diagnostic depending on the kind of
evaluation we're doing. This was always the intent, but didn't quite work
correctly before.

This results in certain initializers that used to be constant initializers to
no longer be; in particular, things like:

  float f = 1e100;

are no longer accepted in C. This seems appropriate, as such constructs would
lead to code being executed if sanitizers are enabled.

llvm-svn: 254574
2015-12-03 01:36:22 +00:00
Sanjay Patel a30cee6272 change an assert when generating fmuladd to an ordinary 'if' check (PR25719)
We don't want to generate fmuladd if there's a use of the fmul expression, but this shouldn't be an assert.

The test case is derived from the commit message for r253337:
http://reviews.llvm.org/rL253337

That commit reverted r253269:
http://reviews.llvm.org/rL253269

...but the bug exists independently of the default fp-contract setting. It just became easier to hit with that change.

PR25719:
https://llvm.org/bugs/show_bug.cgi?id=25719

Differential Revision: http://reviews.llvm.org/D15165

llvm-svn: 254573
2015-12-03 01:25:12 +00:00
Sanjay Patel ef350e6a85 fix typos; NFC
llvm-svn: 254561
2015-12-02 23:06:17 +00:00
Christof Douma ba13ad58f7 Teaches clang about Cortex-A35.
Adds support for the new Cortex-A35 ARMv8-A core.

Differential Revision: http://reviews.llvm.org/D15142

llvm-svn: 254505
2015-12-02 12:03:42 +00:00
Craig Topper e20b8c68ed [X86] _mm256_permutevar8x32_ps should take an integer vector for its shuffle index input.
llvm-svn: 254270
2015-11-29 22:53:32 +00:00
Simon Pilgrim a5c0493ddb [X86][SSE2] Added SSE2 IR + assembly codegen builtin tests
Improved tests as discussed in PR24580

llvm-svn: 254262
2015-11-29 20:23:00 +00:00
NAKAMURA Takumi 704b795634 clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c REQUIRES both arm and aarch64.
llvm-svn: 254252
2015-11-29 13:43:05 +00:00
Alexandros Lamprineas cd8d973932 ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply
Add/Subtract.

Add missing tests that accidentally were not committed in rL254250.

Differential Revision: http://reviews.llvm.org/D14982

llvm-svn: 254251
2015-11-29 10:53:28 +00:00
Daniel Sanders bd3f47f5b5 [mips] Interrupt attribute support.
Summary: This patch adds support for the interrupt attribute for mips32r2+.

Patch by Simon Dardis.

Reviewers: dsanders, aaron.ballman

Subscribers: aaron.ballman, cfe-commits

Differential Revision: http://reviews.llvm.org/D10802

llvm-svn: 254205
2015-11-27 18:03:44 +00:00
Daniel Sanders 8f8eb8f545 Revert r254203: [mips] Interrupt attribute support.
I forgot to credit the author.

llvm-svn: 254204
2015-11-27 18:00:36 +00:00
Daniel Sanders 586be02495 [mips] Interrupt attribute support.
Summary: This patch adds support for the interrupt attribute for mips32r2+.

Reviewers: dsanders, aaron.ballman

Subscribers: aaron.ballman, cfe-commits

Differential Revision: http://reviews.llvm.org/D10802

llvm-svn: 254203
2015-11-27 17:39:20 +00:00
Alexander Musman f97c8933cb Fix for merging decls in pragma weak
Calling CheckFunctionDeclaration so that 2 decls for the 'weak' are merged.
Differential Revision: http://reviews.llvm.org/D13048

llvm-svn: 254143
2015-11-26 09:34:30 +00:00
Sumanth Gundapaneni c61c08e618 Make tbm-builtins.c as X86 specific unit test
Differential Revision: http://reviews.llvm.org/D14887

llvm-svn: 253887
2015-11-23 17:33:49 +00:00
Xinliang David Li 4dff875259 Disable frame pointer elimination when using -pg
(Re-apply patch after bug fixing)

This diff makes sure that the driver does not pass
-fomit-frame-pointer or -momit-leaf-frame-pointer to
the frontend when -pg is used. Currently, clang gives 
an error if -fomit-frame-pointer is used in combination 
with -pg, but -momit-leaf-frame-pointer was forgotten.
Also, disable frame pointer elimination in the frontend 
when -pg is set.

Patch by Stefan Kempf.

llvm-svn: 253886
2015-11-23 17:30:31 +00:00
Xinliang David Li a2124eebbd Revert r253846 (build bot failure))
llvm-svn: 253851
2015-11-23 05:41:05 +00:00
Xinliang David Li eadaf84e78 Disable frame pointer elimination when using -pg
This diff makes sure that the driver does not pass
-fomit-frame-pointer or -momit-leaf-frame-pointer to
the frontend when -pg is used. Currently, clang gives 
an error if -fomit-frame-pointer is used in combination 
with -pg, but -momit-leaf-frame-pointer was forgotten.
Also, disable frame pointer elimination in the frontend 
when -pg is set.

Patch by Stefan Kempf.

llvm-svn: 253846
2015-11-23 05:09:10 +00:00
Matthias Braun 5961fef32e Let's try to fix this test again with a fixed target triple
llvm-svn: 253760
2015-11-21 02:28:42 +00:00
Matthias Braun 84055ecb7d Fix c-unicode.c testcase again.
Specifying a fixed triple is not possible because that target may not
even be compiler. Go for a simpler fix by using a _? regex for the
prefix.

llvm-svn: 253758
2015-11-21 02:13:29 +00:00
Matthias Braun 5c3fccc313 Fix testcase when building on darwin
Explicitely specify a target to avoid "_" prefixes on the names.

llvm-svn: 253741
2015-11-21 00:56:41 +00:00
Vinicius Tinti 92e68c2766 [clang] Disable Unicode in asm files
Clang should not convert tokens to Unicode when preprocessing assembly
files.

Fixes PR25558.

llvm-svn: 253738
2015-11-20 23:42:39 +00:00
Bill Seurer 0d7f89d1ac Fix test case function name checks
This is similar to the earlier fix I did, r253702, expect that here it
is function names that are being searched for.  If the function name
matches part of the directory name it can cause an apparent test
case failure.

llvm-svn: 253706
2015-11-20 20:47:34 +00:00
Dehao Chen f735b8d10e Add -disable-llvm-passes for frontend debug info tests.
Summary: The frontend debuginfo tests should not invoke llvm passes which includes add-discriminators that will change the debug info generated by FE.

Reviewers: dblaikie

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D14848

llvm-svn: 253686
2015-11-20 18:29:01 +00:00
Dehao Chen b85fc5c799 Update clang tests to accomendate discriminator changes.
Summary: The discriminator change in http://reviews.llvm.org/D14738 will fail these clang tests. Update the test to accomendate the discriminator change.

Reviewers: dblaikie, davidxl, dnovillo

Differential Revision: http://reviews.llvm.org/D14836

llvm-svn: 253595
2015-11-19 19:53:16 +00:00
Pete Cooper 3b39e88ae0 Revert "Change memcpy/memset/memmove to have dest and source alignments."
This reverts commit r253512.

This likely broke the bots in:
http://lab.llvm.org:8011/builders/clang-ppc64-elf-linux2/builds/20202
http://bb.pgr.jp/builders/clang-3stage-i686-linux/builds/3787

llvm-svn: 253542
2015-11-19 05:55:59 +00:00
Pete Cooper 7bfd5cb7be Change memcpy/memset/memmove to have dest and source alignments.
This is a follow on from a similar LLVM commit: r253511.

Note, this was reviewed (and more details are in) http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

These intrinsics currently have an explicit alignment argument which is
required to be a constant integer.  It represents the alignment of the
source and dest, and so must be the minimum of those.

This change allows source and dest to each have their own alignments
by using the alignment attribute on their arguments.  The alignment
argument itself is removed.

The only code change to clang is hidden in CGBuilder.h which now passes
both dest and source alignment to IRBuilder, instead of taking the minimum of
dest and source alignments.

Reviewed by Hal Finkel.

llvm-svn: 253512
2015-11-18 22:18:45 +00:00
Akira Hatanaka 8c26ea663d Produce a better diagnostic for global register variables.
Currently, when there is a global register variable in a program that
is bound to an invalid register, clang/llvm prints an error message that
is not very user-friendly.

This commit improves the diagnostic and moves the check that used to be
in the backend to Sema. In addition, it makes changes to error out if
the size of the register doesn't match the declared variable size.

e.g., volatile register int B asm ("rbp");

rdar://problem/23084219

Differential Revision: http://reviews.llvm.org/D13834

llvm-svn: 253405
2015-11-18 00:15:28 +00:00
Manuel Klimek ff39366de5 Revert "Make FP_CONTRACT ON the default."
This reverts commit r253269.

This leads to assert / segfault triggering on the following reduced example:
float foo(float U, float base, float cell) { return (U = 2 * base) - cell; }

llvm-svn: 253337
2015-11-17 15:40:10 +00:00
Stephen Canon 916be92955 Make FP_CONTRACT ON the default.
Differential Revision: D14200

llvm-svn: 253269
2015-11-16 23:09:11 +00:00
Eric Christopher b7bbc53314 When producing error messages for always_inline functions with the
target attribute, don't include "negative" subtarget features in the
list of required features. Builtins are positive by default so don't
need this change, but we pull the default list of features from the
command line and so need to make sure that we only include features
that are turned on for code generation in our error.

llvm-svn: 253242
2015-11-16 18:29:59 +00:00
Oliver Stannard 7aa90f5735 [ARM,AArch64] Fix __rev16l and __rev16ll intrinsics
These two intrinsics are defined in arm_acle.h.

__rev16l needs to rotate by 16 bits, bit it was actually rotating by 2 bits.
For AArch64, where long is 64 bits, this would still be wrong.

__rev16ll was incorrect, it reversed the bytes in each 32-bit word, rather than
each 16-bit halfword. The correct implementation is to apply __rev16 to the top
and bottom words of the 64-bit value.

For AArch32 targets, these get compiled down to the hardware rev16 instruction
at -O1 and above. For AArch64 targets, the 64-bit ones get compiled to two
32-bit rev16 instructions, because there is not currently a pattern for the
64-bit rev16 instruction.

Differential Revision: http://reviews.llvm.org/D14609

llvm-svn: 253211
2015-11-16 14:58:50 +00:00
Simon Pilgrim 7b8f926465 [X86][MMX] Added MMX IR + assembly codegen builtin tests for some missing cvt intrinsics
llvm-svn: 253169
2015-11-15 14:40:31 +00:00
Simon Pilgrim 54cf98eeb2 [X86][MMX] Sorted MMX IR + assembly codegen builtin tests
Makes it easier to track what tests are missing....

llvm-svn: 253131
2015-11-14 13:25:06 +00:00
Simon Pilgrim 087b6a7216 [X86][MMX] Added MMX IR + assembly codegen builtin tests
Improved tests as discussed in PR24580

llvm-svn: 253130
2015-11-14 12:47:44 +00:00
Eric Christopher ce83677666 Add support for the always_inline + target feature diagnostic to print
out the first missing target feature that's required and reword
the diagnostic accordingly.

llvm-svn: 253121
2015-11-14 02:38:37 +00:00
David Blaikie 6267684a18 Make some tests LLVM-optimization agnostic and remove some others that were beyond value/repair
Several of these tests (the two deleted, and the one removal edit) were
relying on the optimizer to collapse things to test some frontend
feature. The tests were really old and features seemed amply covered by
other parts of the test suite, so I just removed them.

If anyone thinks they're valuable enough to keep/fix, we can play around
with that, for sure.

(inspired by r252872)

llvm-svn: 253114
2015-11-14 01:10:38 +00:00
Akira Hatanaka 7828b1e604 Add support for function attribute 'disable_tail_calls'.
The ``disable_tail_calls`` attribute instructs the backend to not
perform tail call optimization inside the marked function.

For example, 

int callee(int);

int foo(int a) __attribute__((disable_tail_calls)) {
  return callee(a); // This call is not tail-call optimized.
}

Note that this attribute is different from 'not_tail_called', which
prevents tail-call optimization to the marked function.

rdar://problem/8973573

Differential Revision: http://reviews.llvm.org/D12547

llvm-svn: 252986
2015-11-13 00:42:21 +00:00
James Y Knight 7aefb5b623 Correct atomic libcall support for __atomic_*_fetch builtins.
In r244063, I had caused these builtins to call the same-named library
functions, __atomic_*_fetch_SIZE. However, this was incorrect: while
those functions are in fact supported by GCC's libatomic, they're not
documented by the spec (and gcc doesn't ever call them).

Instead, you're /supposed/ to call the __atomic_fetch_* builtins and
then redo the operation inline to return the final value.

Differential Revision: http://reviews.llvm.org/D14385

llvm-svn: 252920
2015-11-12 18:37:29 +00:00
James Molloy 57207ce922 Update clang regression tests for 'norecurse'
FunctionAttrs has just been taught how to infer 'norecurse'. Update clang tests for LLVM r252871.

llvm-svn: 252872
2015-11-12 10:56:51 +00:00
Eric Christopher 2b2d56f059 Provide a frontend based error for always_inline functions that require
target features that the caller function doesn't provide. This matches
the existing backend failure to inline functions that don't have
matching target features - and diagnoses earlier in the case of
always_inline.

Fix up a few test cases that were, in fact, invalid if you tried
to generate code from the backend with the specified target features
and add a couple of tests to illustrate what's going on.

This should fix PR25246.

llvm-svn: 252834
2015-11-12 00:44:12 +00:00
Charles Li 542f04cc4d [Lit Test] Updated 26 Lit tests to be C++11 compatible.
Expected diagnostics have been expanded to vary by C++ dialect.
RUN line has also been expanded to: default, C++98/03 and C++11.

llvm-svn: 252785
2015-11-11 19:34:47 +00:00
Craig Topper fb79b5f273 [X86] Add 'pause' builtin that's already in llvm and use it instead of inline assembly to implement _mm_pause.
llvm-svn: 252712
2015-11-11 08:13:33 +00:00
Craig Topper a5455524c2 [X86] Use __builtin_ia32_paddq and __builtin_ia32_psubq to implement a couple intrinsics that were supposed to operate on MMX registers. Otherwise we end up operating on GPRs. Throw in a test for _mm_mul_su32 while I was there.
llvm-svn: 252711
2015-11-11 08:00:41 +00:00
Akira Hatanaka 25aa9f091e Reorder the check strings in test case following r252692.
rdar://problem/19836465

llvm-svn: 252693
2015-11-11 02:13:36 +00:00
Dan Gohman 6db4640b80 [WebAssembly] Change long double to be quadruple-precision floating point.
llvm-svn: 252646
2015-11-10 21:01:46 +00:00
Tim Northover cc2a6e0608 Atomics: support __c11_* calls on _Atomic struct types.
When a struct's size is not a power of 2, the corresponding _Atomic() type is
promoted to the nearest. We already correctly handled normal C++ expressions of
this form, but direct calls to the __c11_atomic_whatever builtins ended up
performing dodgy operations on the smaller non-atomic types (e.g. memcpy too
much). Later optimisations removed this as undefined behaviour.

This patch converts EmitAtomicExpr to allocate its temporaries at the full
atomic width, sidestepping the issue.

llvm-svn: 252507
2015-11-09 19:56:35 +00:00
Renato Golin 4854d80c39 [EABI] Add Clang support for -meabi flag
The -meabi flag to control LLVM EABI version.

Without '-meabi' or with '-meabi default' imply LLVM triple default.
With '-meabi gnu' sets EABI GNU.
With '-meabi 4' or '-meabi 5' set EABI version 4 and 5 respectively.

A similar patch was introduced in LLVM.

Patch by Vinicius Tinti.

llvm-svn: 252463
2015-11-09 12:40:41 +00:00
Akira Hatanaka 48684b073e Use regex in test case.
This is a follow-up to r252369.

llvm-svn: 252376
2015-11-07 00:48:18 +00:00
Akira Hatanaka c866762272 Add support for function attribute 'not_tail_called'.
This attribute is used to prevent tail-call optimizations to the marked
function. For example, in the following piece of code, foo1 will not be
tail-call optimized: 

int __attribute__((not_tail_called)) foo1(int);

int foo2(int a) {
  return foo1(a); // Tail-call optimization is not performed.
}

The attribute has effect only on statically bound calls. It has no
effect on indirect calls. Also, virtual functions and objective-c
methods cannot be marked as 'not_tail_called'.

rdar://problem/22667622

Differential Revision: http://reviews.llvm.org/D12922

llvm-svn: 252369
2015-11-06 23:56:15 +00:00
Peter Collingbourne 0900fe0f1b CodeGen: Update for debug info API change.
Differential Revision: http://reviews.llvm.org/D14266

llvm-svn: 252220
2015-11-05 22:04:14 +00:00
Dan Gohman 24f0a08c1b [WebAssembly] Update wasm builtin functions to match spec changes.
The page_size operator has been removed from the spec, and the resize_memory
operator has been changed to grow_memory.

llvm-svn: 252201
2015-11-05 20:16:37 +00:00
Andrey Bokhanko 94e1d5831b [x86] Additional small fix for MCU psABI support
This patch fixes one more thing in MCU psABI support: LongDoubleWidth should be set to 64.

Differential Revision: http://reviews.llvm.org/D14285

llvm-svn: 252156
2015-11-05 12:43:09 +00:00
Tim Northover 4c5cb9c1da Fix va_arg on watchOS.
As in other contexts, alignments can go up to 16 bytes in a va_list.

llvm-svn: 251821
2015-11-02 19:32:23 +00:00
Andrey Bokhanko 158b8b898c [x86] Front-end part of MCU psABI support
This patch implements two things in front-end for MCU psABI support:

1) "long double type is the same as double."
2) "New predefined C/C++ pre-processor symbols: iamcu and iamcu__.

Differential Revision: http://reviews.llvm.org/D14205

llvm-svn: 251786
2015-11-02 09:54:17 +00:00
Tim Northover 5627d3935a ARMv7k: implement ABI changes for watchOS from standard iOS.
llvm-svn: 251710
2015-10-30 16:30:45 +00:00
Dehao Chen bd3c94e84b Update debug-info-scope test to remove "FIXME", which is fixed in r251689
llvm-svn: 251691
2015-10-30 05:08:43 +00:00
John McCall 03107a4ef0 Add support for __builtin_{add,sub,mul}_overflow.
Patch by David Grayson!

llvm-svn: 251651
2015-10-29 20:48:01 +00:00
Reid Kleckner 11a17198e0 Fix the calling convention of Mingw64 long double values
GCC uses the x87DoubleExtended model for long doubles, and passes them
indirectly by address through function calls.

Also replace the existing mingw-long-double assembly emitting test with
an IR-level test.

llvm-svn: 251567
2015-10-28 22:29:52 +00:00
Artem Belevich 5d40ae3a46 Allow linking multiple bitcode files.
Linking options for particular file depend on the option that specifies the file.
Currently there are two:

* -mlink-bitcode-file links in complete content of the specified file.
* -mlink-cuda-bitcode links in only the symbols needed by current TU.
   Linked symbols are internalized. This bitcode linking mode is used to
   link device-specific bitcode provided by CUDA.

Files are linked in order they are specified on command line.

-mlink-cuda-bitcode replaces -fcuda-uses-libdevice flag.

Differential Revision: http://reviews.llvm.org/D13913

llvm-svn: 251427
2015-10-27 17:56:59 +00:00
Reid Kleckner 012f1acca7 [ms-inline-asm] Test case for alignment directive change in LLVM r251418
llvm-svn: 251419
2015-10-27 17:34:29 +00:00
Eric Christopher 99af5b2ea7 Handle target builtin options that are all required rather than
only one of a group of possibilities.

This changes the syntax in the builtin files to represent:

, as the and operator
| as the or operator

The former syntax matches how the backend tablegen files represent
multiple subtarget features being required.

Updated the builtin and intrinsic headers accordingly for the new
syntax.

llvm-svn: 251388
2015-10-27 06:11:03 +00:00
Michael Kuperstein 6890188ea3 [X86] Mark inregs correctly for MCU psABI
The MCU psABI calling convention is somewhat, but not quite, like -mregparm 3.
In particular, the rules involving structs are different.

Differential Revision: http://reviews.llvm.org/D13978

llvm-svn: 251224
2015-10-25 08:18:20 +00:00
Artyom Skrobov 05d85aee2e [ARM] Renaming +t2dsp feature into +dsp, as discussed on llvm-dev
llvm-svn: 251124
2015-10-23 17:19:02 +00:00
Craig Topper a6324c9463 Disable trigraph and escaped newline expansion on all types of raw string literals not just ASCII type.
llvm-svn: 251025
2015-10-22 15:35:21 +00:00
Andrea Di Biagio 8bb12d0a77 [x86] Fix maskload/store intrinsic definitions in avxintrin.h
According to the Intel documentation, the mask operand of a maskload and
maskstore intrinsics is always a vector of packed integer/long integer values.
This patch introduces the following two changes:
 1. It fixes the avx maskload/store intrinsic definitions in avxintrin.h.
 2. It changes BuiltinsX86.def to match the correct gcc definitions for avx
    maskload/store (see D13861 for more details).

Differential Revision: http://reviews.llvm.org/D13861

llvm-svn: 250816
2015-10-20 11:19:54 +00:00
Michael Kuperstein b1ec50d56a [X86] Enable soft float ABI for x86
The Intel MCU psABI requires floating-point values to be passed in-reg.
This makes the x86-32 ABI code respect "-mfloat-abi soft" and generate float inreg arguments.

Differential Revision: http://reviews.llvm.org/D13554

llvm-svn: 250689
2015-10-19 08:09:43 +00:00
Craig Topper e33f51fa91 [X86] Add fxsr feature name for fxsave/fxrestore builtins.
llvm-svn: 250498
2015-10-16 06:22:36 +00:00
George Burgess IV a51c4077c5 Make __builtin_object_size more conservative
r246877 made __builtin_object_size substantially more aggressive with
unknown bases if Type=1 or Type=3, which causes issues when we encounter
code like this:

struct Foo {
  int a;
  char str[1];
};

const char str[] = "Hello, World!";
struct Foo *f = (struct Foo *)malloc(sizeof(*f) + strlen(str));
strcpy(&f->str, str);

__builtin_object_size(&f->str, 1) would hand back 1, which is
technically correct given the type of Foo, but the type of Foo lies to
us about how many bytes are available in this case.

This patch adds support for this "writing off the end" idiom -- we now
answer conservatively when we're given the address of the very last
member in a struct.

Differential Revision: http://reviews.llvm.org/D12169

llvm-svn: 250488
2015-10-16 01:49:01 +00:00
George Burgess IV 2a6150d932 [Sema] Fix address-of + enable_if overloading logic
Previously, our logic when taking the address of an overloaded function
would not consider enable_if attributes, so long as all of the enable_if
conditions on a given candidate were true. So, two functions with
identical signatures (one with enable_if attributes, the other without),
would be considered equally good overloads. If we were calling the
function instead of taking its address, then the function with enable_if
attributes would be preferred.

This patch makes us prefer the candidate with enable_if regardless of if
we're calling or taking the address of an overloaded function.

Differential Revision: http://reviews.llvm.org/D13795

llvm-svn: 250486
2015-10-16 01:17:38 +00:00
Eric Christopher c276e80022 Mark this test as requiring and x86 registered target.
llvm-svn: 250475
2015-10-16 00:14:36 +00:00
Eric Christopher 15709991d0 Add an error when calling a builtin that requires features that don't
match the feature set of the function that they're being called from.

This ensures that we can effectively diagnose some[1] code that would
instead ICE in the backend with a failure to select message.

Example:

__m128d foo(__m128d a, __m128d b) {
  return __builtin_ia32_addsubps(b, a);
}

compiled for normal x86_64 via:

clang -target x86_64-linux-gnu -c

would fail to compile in the back end because the normal subtarget
features for x86_64 only include sse2 and the builtin requires sse3.

[1] We're still not erroring on:

__m128i bar(__m128i const *p) { return _mm_lddqu_si128(p); }

where we should fail and error on an always_inline function being
inlined into a function that doesn't support the subtarget features
required.

llvm-svn: 250473
2015-10-15 23:47:11 +00:00
Eric Christopher abde1c2b51 The target-feature command line option doesn't take a comma delimited
string, so split them into multiple options.

llvm-svn: 250449
2015-10-15 20:04:42 +00:00
Eric Christopher 4fb4fbc5d6 Add the minimum target features that these tests depend upon.
llvm-svn: 250448
2015-10-15 20:04:40 +00:00
Craig Topper da9fe56bf6 [X86] Add command line switches for xsave/xsaveopt/xsavec/xsaves. Macro defines for the same. And add the flags to correct CPU names.
llvm-svn: 250368
2015-10-15 05:23:38 +00:00
Eric Christopher cd875efa78 Canonicalize some of the x86 builtin tests and either remove or comment
about optimization options.

llvm-svn: 250271
2015-10-14 05:40:21 +00:00
Eric Christopher 442c9b6b41 Remove the optimization option from this test as it is unnecessary
and front end tests should avoid this if possible.

llvm-svn: 250270
2015-10-14 05:40:11 +00:00
Eric Christopher e45972719e Move the adc-builtins test to the pattern of the other builtins
tests by predefining _MM_MALLOC_H rather than use -ffreestanding.

llvm-svn: 250203
2015-10-13 18:40:21 +00:00
Amjad Aboud 2b9b8a5921 [X86] Add XSAVE intrinsic family
Add intrinsics for the
  XSAVE instructions (XSAVE/XSAVE64/XRSTOR/XRSTOR64)
  XSAVEOPT instructions (XSAVEOPT/XSAVEOPT64)
  XSAVEC instructions (XSAVEC/XSAVEC64)
  XSAVES instructions (XSAVES/XSAVES64/XRSTORS/XRSTORS64)

Differential Revision: http://reviews.llvm.org/D13014

llvm-svn: 250158
2015-10-13 12:29:35 +00:00
Craig Topper 334d46150d [X86] LLVM now prints XOP immediates as unsigned after r250147. Fix expected check string accordingly.
llvm-svn: 250149
2015-10-13 05:15:17 +00:00
NAKAMURA Takumi 38c2f6cb20 Tweak clang/test/CodeGen/debug-prefix-map.c to appease win32 hosts.
!1 = !DIFile(filename: "/var/empty\5C<stdin>", directory: "E:\5Cllvm\5Cbuild\5Ccmake-ninja\5Ctools\5Cclang\5Ctest\5CCodeGen")

llvm-svn: 250136
2015-10-13 00:38:06 +00:00
Saleem Abdulrasool 9e593499b9 test: change argument
This failed on AArch64 due to the type mismatch using int instead of
__builtin_va_list.

llvm-svn: 250112
2015-10-12 21:19:30 +00:00
Saleem Abdulrasool 83346258eb test: relax path matching for windows
The test failed on Windows due to use of \ as a path separator rather than /.

llvm-svn: 250111
2015-10-12 21:19:27 +00:00
Saleem Abdulrasool 436256a713 Support Debug Info path remapping
Add support for the `-fdebug-prefix-map=` option as in GCC.  The syntax is
`-fdebug-prefix-map=OLD=NEW`.  When compiling files from a path beginning with
OLD, change the debug info to indicate the path as start with NEW.  This is
particularly helpful if you are preprocessing in one path and compiling in
another (e.g. for a build cluster with distcc).

Note that the linearity of the implementation is not as terrible as it may seem.
This is normally done once per file with an expectation that the map will be
small (1-2) entries, making this roughly linear in the number of input paths.

Addresses PR24619.

llvm-svn: 250094
2015-10-12 20:21:08 +00:00
George Burgess IV 5f21c71800 [Sema] Make `&function_with_enable_if_attrs` an error
This fixes a bug where one can take the address of a conditionally
enabled function to drop its enable_if guards. For example:

  int foo(int a) __attribute__((enable_if(a > 0, "")));
  int (*p)(int) = &foo;
  int result = p(-1); // compilation succeeds; calls foo(-1)

Overloading logic has been updated to reflect this change, as well.

Functions with enable_if attributes that are always true are still
allowed to have their address taken.

Differential Revision: http://reviews.llvm.org/D13607

llvm-svn: 250090
2015-10-12 19:57:04 +00:00
Eric Christopher a7260af7e5 Handle sse turning on mmx, but no -mmx not turning off SSE.
Rationale :

// sse3
__m128d test_mm_addsub_pd(__m128d A, __m128d B) {
  return _mm_addsub_pd(A, B);
}

// mmx
void shift(__m64 a, __m64 b, int c) {
  _mm_slli_pi16(a, c);
  _mm_slli_pi32(a, c);
  _mm_slli_si64(a, c);
  _mm_srli_pi16(a, c);
  _mm_srli_pi32(a, c);
  _mm_srli_si64(a, c);
  _mm_srai_pi16(a, c);
  _mm_srai_pi32(a, c);
}

clang -msse3 -mno-mmx file.c -c

For this code we should be able to explicitly turn off MMX
without affecting the compilation of the SSE3 function and then
diagnose and error on compiling the MMX function.

This is a preparatory patch to the actual diagnosis code which is
coming in a future patch. This sets us up to have the correct information
where we need it and verifies that it's being emitted for the backend
to handle.

llvm-svn: 249733
2015-10-08 20:10:18 +00:00
Eric Christopher bbd746db9e Migrate most feature map inclusion to initFeatureMap for the x86 target so
that we can build up an accurate set of features rather than relying on
TargetInfo initialization via handleTargetFeatures to munge the list
of features.

llvm-svn: 249732
2015-10-08 20:10:14 +00:00
David Majnemer e4e3e6a5bf [Sema] Tweak incomplete enum types on MSVC ABI targets
Enums without an explicit, fixed, underlying type are implicitly given a
fixed 'int' type for ABI compatibility with MSVC.  However, we can
enforce the standard-mandated rules on these types as-if we didn't know
this fact if the tag is not part of a definition.

llvm-svn: 249667
2015-10-08 07:45:35 +00:00
David Majnemer c10b8381f7 Update tests touched by r249656
These test updates almost exclusively around the change in behavior
around enum: enums without a definition are considered incomplete except
when targeting MSVC ABIs.  Since these tests are interested in the
'incomplete-enum' behavior, restrict them to %itanium_abi_triple.

llvm-svn: 249660
2015-10-08 06:31:22 +00:00
David Majnemer 3f02150d31 [MSVC Compat] Enable ABI impacting non-conforming behavior independently of -fms-compatibility
No ABI for C++ currently makes it possible to implement the standard
100% perfectly.  We wrongly hid some of our compatible behavior behind
-fms-compatibility instead of tying it to the compiler ABI.

llvm-svn: 249656
2015-10-08 04:53:31 +00:00
Douglas Katzman 3459ce2e5e Stop messing with the 'g' group of options in CompilerInvocation.
With this change, most 'g' options are rejected by CompilerInvocation.
They remain only as Driver options. The new way to request debug info
from cc1 is with "-debug-info-kind={line-tables-only|limited|standalone}"
and "-dwarf-version={2|3|4}". In the absence of a command-line option
to specify Dwarf version, the Toolchain decides it, rather than placing
Toolchain-specific logic in CompilerInvocation.

Also fix a bug in the Windows compatibility argument parsing
in which the "rightmost argument wins" principle failed.

Differential Revision: http://reviews.llvm.org/D13221

llvm-svn: 249655
2015-10-08 04:24:12 +00:00
Reid Kleckner 129552b375 [WinEH] Remove NewMSEH and enable its behavior by default
Testing has shown that it is at least as reliable as the old landingpad
pattern matching code.

llvm-svn: 249647
2015-10-08 01:13:52 +00:00
NAKAMURA Takumi 5849728912 clang/test/CodeGen/exceptions-seh-leave-new.c: Use "opt -instnamer" for branch-sensitive checks.
llvm-svn: 249499
2015-10-07 01:29:26 +00:00
Reid Kleckner f8d115338d [SEH] Fix x64 __exception_code in __except blocks
Use llvm.eh.exceptioncode to get the code out of EAX for x64. For
32-bit, the filter is responsible for storing it to memory for us.

llvm-svn: 249497
2015-10-07 01:07:13 +00:00
Ahmed Bougacha 7dfaaf3891 [Headers][X86] Fix stream_load (movntdqa) to accept const*.
Per Intel intrinsics guide:
- _mm256_stream_load_si256 takes `__m256i const *'
- _mm_stream_load_si128 takes `__m128i *', for no good reason.

Let's accept const* for both.

llvm-svn: 249213
2015-10-02 23:29:26 +00:00
Dan Gohman 266b38ab56 [WebAssembly] Add a __builtin_wasm_resize_memory() intrinsic.
llvm-svn: 249179
2015-10-02 20:20:01 +00:00
Dan Gohman d4c5fb597d [WebAssembly] Add a __builtin_wasm_memory_size() intrinsic.
llvm-svn: 249176
2015-10-02 19:38:47 +00:00
Andrea Di Biagio f9989b04bf Make test more resilient to FastIsel changes. NFC.
Currently FastISel doesn't know how to select vector bitcasts.
During instruction selection, fast-isel always falls back to SelectionDAG 
every time it encounters a vector bitcast.
As a consequence of this, all the 'packed vector shift by immedate count'
test cases in avx2-builtins.c are optimized by the DAGCombiner.
In particular, the DAGCombiner would always fold trivial stack loads of
constant shift counts into the operands of packed shift builtins.

This behavior would start changing as soon as I reapply revision 249121.
That revision would teach x86 fast-isel how to select bitcasts between vector
types of the same size.

As a consequence of that change, fast-isel would less often fall back to
SelectionDAG. More importantly, DAGCombiner would no longer be able to 
simplify the code by folding the stack reload of a constant.

No functional change.

llvm-svn: 249142
2015-10-02 15:10:22 +00:00
Chandler Carruth cbe6411401 Fix the SSE4 byte sign extension in a cleaner way, and more thoroughly
test that our intrinsics behave the same under -fsigned-char and
-funsigned-char.

This further testing uncovered that AVX-2 has a broken cmpgt for 8-bit
elements, and has for a long time. This is fixed in the same way as
SSE4 handles the case.

The other ISA extensions currently work correctly because they use
specific instruction intrinsics. As soon as they are rewritten in terms
of generic IR, they will need to add these special casts. I've added the
necessary testing to catch this however, so we shouldn't have to chase
it down again.

I considered changing the core typedef to be signed, but that seems like
a bad idea. Notably, it would be an ABI break if anyone is reaching into
the innards of the intrinsic headers and passing __v16qi on an API
boundary. I can't be completely confident that this wouldn't happen due
to a macro expanding in a lambda, etc., so it seems much better to leave
it alone. It also matches GCC's behavior exactly.

A fun side note is that for both GCC and Clang, -funsigned-char really
does change the semantics of __v16qi. To observe this, consider:

  % cat x.cc
  #include <smmintrin.h>
  #include <iostream>

  int main() {
    __v16qi a = { 1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
    __v16qi b = _mm_set1_epi8(-1);
    std::cout << (int)(a / b)[0] << ", " << (int)(a / b)[1] << '\n';
  }
  % clang++ -o x x.cc && ./x
  -1, 1
  % clang++ -funsigned-char -o x x.cc && ./x
  0, 1

However, while this may be surprising, both Clang and GCC agree.

Differential Revision: http://reviews.llvm.org/D13324

llvm-svn: 249097
2015-10-01 23:40:12 +00:00
Chandler Carruth 9143378db0 Patch over a really horrible bug in our vector builtins that showed up
recently when we started using direct conversion to model sign
extension. The __v16qi type we use for SSE v16i8 vectors is defined in
terms of 'char' which may or may not be signed! This causes us to
generate pmovsx and pmovzx depending on the setting of -funsigned-char.

This patch just forms an explicitly signed type and uses that to
formulate the sign extension. While this gets the correct behavior
(which we now verify with the enhanced test) this is just the tip of the
ice berg. Now that I know what to look for, I have found errors of this
sort *throughout* our vector code. Fortunately, this is the only
specific place where I know of users actively having their code
miscompiled by Clang due to this, so I'm keeping the fix for those users
minimal and targeted.

I'll be sending a proper email for discussion of how to fix these
systematically, what the implications are, and just how widely broken
this is... From what I can tell, we have never shipped a correct set of
builtin headers for x86 when users rely on -funsigned-char. Oops.

llvm-svn: 248980
2015-10-01 02:21:34 +00:00
Jingyue Wu f1eca25b16 [CUDA] fix codegen for __nvvm_atom_cas_*
Summary: __nvvm_atom_cas_* returns the old value instead of whether the swap succeeds.

Reviewers: eliben, tra

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D13306

llvm-svn: 248951
2015-09-30 21:49:32 +00:00
Jeroen Ketema 55a8e80de8 [ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions
This is the clang commit associated with llvm r248887.

This commit changes the interface of the vld[1234], vld[234]lane, and vst[1234],
vst[234]lane ARM neon intrinsics and associates an address space with the
pointer that these intrinsics take. This changes, e.g.,

<2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32)

to

<2 x i32> @llvm.arm.neon.vld1.v2i32.p0i8(i8*, i32)

This change ensures that address spaces are fully taken into account in the ARM
target during lowering of interleaved loads and stores.

Differential Revision: http://reviews.llvm.org/D13127

llvm-svn: 248888
2015-09-30 10:56:56 +00:00
Nemanja Ivanovic 236904ea9e Addition of interfaces the FE to conform to Table A-2 of ELF V2 ABI V1.1
This patch corresponds to review:
http://reviews.llvm.org/D13190

Implemented the following interfaces to conform to ELF V2 ABI version 1.1.

vector signed __int128 vec_adde (vector signed __int128, vector signed __int128, vector signed __int128);
vector unsigned __int128 vec_adde (vector unsigned __int128, vector unsigned __int128, vector unsigned __int128);
vector signed __int128 vec_addec (vector signed __int128, vector signed __int128, vector signed __int128);
vector unsigned __int128 vec_addec (vector unsigned __int128, vector unsigned __int128, vector unsigned __int128);
vector signed int vec_addc(vector signed int __a, vector signed int __b);
vector bool char vec_cmpge (vector signed char __a, vector signed char __b);
vector bool char vec_cmpge (vector unsigned char __a, vector unsigned char __b);
vector bool short vec_cmpge (vector signed short __a, vector signed short __b);
vector bool short vec_cmpge (vector unsigned short __a, vector unsigned short __b);
vector bool int vec_cmpge (vector signed int __a, vector signed int __b);
vector bool int vec_cmpge (vector unsigned int __a, vector unsigned int __b);
vector bool char vec_cmple (vector signed char __a, vector signed char __b);
vector bool char vec_cmple (vector unsigned char __a, vector unsigned char __b);
vector bool short vec_cmple (vector signed short __a, vector signed short __b);
vector bool short vec_cmple (vector unsigned short __a, vector unsigned short __b);
vector bool int vec_cmple (vector signed int __a, vector signed int __b);
vector bool int vec_cmple (vector unsigned int __a, vector unsigned int __b);
vector double vec_double (vector signed long long __a);
vector double vec_double (vector unsigned long long __a);
vector bool char vec_eqv(vector bool char __a, vector bool char __b);
vector bool short vec_eqv(vector bool short __a, vector bool short __b);
vector bool int vec_eqv(vector bool int __a, vector bool int __b);
vector bool long long vec_eqv(vector bool long long __a, vector bool long long __b);
vector signed short vec_madd(vector signed short __a, vector signed short __b, vector signed short __c);
vector signed short vec_madd(vector signed short __a, vector unsigned short __b, vector unsigned short __c);
vector signed short vec_madd(vector unsigned short __a, vector signed short __b, vector signed short __c);
vector unsigned short vec_madd(vector unsigned short __a, vector unsigned short __b, vector unsigned short __c);
vector bool long long vec_mergeh(vector bool long long __a, vector bool long long __b);
vector bool long long vec_mergel(vector bool long long __a, vector bool long long __b);
vector bool char vec_nand(vector bool char __a, vector bool char __b);
vector bool short vec_nand(vector bool short __a, vector bool short __b);
vector bool int vec_nand(vector bool int __a, vector bool int __b);
vector bool long long vec_nand(vector bool long long __a, vector bool long long __b);
vector bool char vec_orc(vector bool char __a, vector bool char __b);
vector bool short vec_orc(vector bool short __a, vector bool short __b);
vector bool int vec_orc(vector bool int __a, vector bool int __b);
vector bool long long vec_orc(vector bool long long __a, vector bool long long __b);
vector signed long long vec_sub(vector signed long long __a, vector signed long long __b);
vector signed long long vec_sub(vector bool long long __a, vector signed long long __b);
vector signed long long vec_sub(vector signed long long __a, vector bool long long __b);
vector unsigned long long vec_sub(vector unsigned long long __a, vector unsigned long long __b);
vector unsigned long long vec_sub(vector bool long long __a, vector unsigned long long __b);
vector unsigned long long vec_sub(vector unsigned long long __V2 ABI V1.1


http://ror float vec_sub(vector float __a, vector float __b);
unsigned char vec_extract(vector bool char __a, int __b);
signed short vec_extract(vector signed short __a, int __b);
unsigned short vec_extract(vector bool short __a, int __b);
signed int vec_extract(vector signed int __a, int __b);
unsigned int vec_extract(vector bool int __a, int __b);
signed long long vec_extract(vector signed long long __a, int __b);
unsigned long long vec_extract(vector unsigned long long __a, int __b);
unsigned long long vec_extract(vector bool long long __a, int __b);
double vec_extract(vector double __a, int __b);
vector bool char vec_insert(unsigned char __a, vector bool char __b, int __c);
vector signed short vec_insert(signed short __a, vector signed short __b, int __c);
vector bool short vec_insert(unsigned short __a, vector bool short __b, int __c);
vector signed int vec_insert(signed int __a, vector signed int __b, int __c);
vector bool int vec_insert(unsigned int __a, vector bool int __b, int __c);
vector signed long long vec_insert(signed long long __a, vector signed long long __b, int __c);
vector unsigned long long vec_insert(unsigned long long __a, vector unsigned long long __b, int __c);
vector bool long long vec_insert(unsigned long long __a, vector bool long long __b, int __c);
vector double vec_insert(double __a, vector double __b, int __c);
vector signed long long vec_splats(signed long long __a);
vector unsigned long long vec_splats(unsigned long long __a);
vector signed __int128 vec_splats(signed __int128 __a);
vector unsigned __int128 vec_splats(unsigned __int128 __a);
vector double vec_splats(double __a);
int vec_all_eq(vector double __a, vector double __b);
int vec_all_ge(vector double __a, vector double __b);
int vec_all_gt(vector double __a, vector double __b);
int vec_all_le(vector double __a, vector double __b);
int vec_all_lt(vector double __a, vector double __b);
int vec_all_nan(vector double __a);
int vec_all_ne(vector double __a, vector double __b);
int vec_all_nge(vector double __a, vector double __b);
int vec_all_ngt(vector double __a, vector double __b);
int vec_any_eq(vector double __a, vector double __b);
int vec_any_ge(vector double __a, vector double __b);
int vec_any_gt(vector double __a, vector double __b);
int vec_any_le(vector double __a, vector double __b);
int vec_any_lt(vector double __a, vector double __b);
int vec_any_ne(vector double __a, vector double __b);
vector unsigned char vec_sbox_be (vector unsigned char);
vector unsigned char vec_cipher_be (vector unsigned char, vector unsigned char);
vector unsigned char vec_cipherlast_be (vector unsigned char, vector unsigned char);
vector unsigned char vec_ncipher_be (vector unsigned char, vector unsigned char);
vector unsigned char vec_ncipherlast_be (vector unsigned char, vector unsigned char);
vector unsigned int vec_shasigma_be (vector unsigned int, const int, const int);
vector unsigned long long vec_shasigma_be (vector unsigned long long, const int, const int);
vector unsigned short vec_pmsum_be (vector unsigned char, vector unsigned char);
vector unsigned int vec_pmsum_be (vector unsigned short, vector unsigned short);
vector unsigned long long vec_pmsum_be (vector unsigned int, vector unsigned int);
vector unsigned __int128 vec_pmsum_be (vector unsigned long long, vector unsigned long long);
vector unsigned char vec_gb (vector unsigned char);
vector unsigned long long vec_bperm (vector unsigned __int128 __a, vector unsigned char __b);

Removed the folowing interfaces either because their signatures have changed
in version 1.1 of the ABI or because they were implemented for ELF V2 ABI but
have actually been deprecated in version 1.1.

vector signed char vec_eqv(vector bool char __a, vector signed char __b);
vector signed char vec_eqv(vector signed char __a, vector bool char __b);
vector unsigned char vec_eqv(vector bool char __a, vector unsigned char __b);
vector unsigned char vec_eqv(vector unsigned char __a, vector bool char __b);
vector signed short vec_eqv(vector bool short __a, vector signed short __b);
vector signed short vec_eqv(vector signed short __a, vector bool short __b);
vector unsigned short vec_eqv(vector bool short __a, vector unsigned short __b);
vector unsigned short vec_eqv(vector unsigned short __a, vector bool short __b);
vector signed int vec_eqv(vector bool int __a, vector signed int __b);
vector signed int vec_eqv(vector signed int __a, vector bool int __b);
vector unsigned int vec_eqv(vector bool int __a, vector unsigned int __b);
vector unsigned int vec_eqv(vector unsigned int __a, vector bool int __b);
vector signed long long vec_eqv(vector bool long long __a, vector signed long long __b);
vector signed long long vec_eqv(vector signed long long __a, vector bool long long __b);
vector unsigned long long vec_eqv(vector bool long long __a, vector unsigned long long __b);
vector unsigned long long vec_eqv(vector unsigned long long __a, vector bool long long __b);
vector float vec_eqv(vector bool int __a, vector float __b);
vector float vec_eqv(vector float __a, vector bool int __b);
vector double vec_eqv(vector bool long long __a, vector double __b);
vector double vec_eqv(vector double __a, vector bool long long __b);
vector unsigned short vec_nand(vector bool short __a, vector unsigned short __b);

llvm-svn: 248813
2015-09-29 18:13:34 +00:00
John McCall 8460bcaa33 Honor the casted-to alignment of an explicit cast even when
Sema thinks the cast is a no-op, as it does when (e.g.) the
only thing that changes is an alignment attribute.

Fixed PR24944.

llvm-svn: 248775
2015-09-29 04:37:40 +00:00
Artem Belevich 236cfdc4be [CUDA] 32-bit NVPTX should have 32-bit long type.
Currently it's 64-bit which will lead to mismatch between host and
device code if we compile for i386.

Differential Revision: http://reviews.llvm.org/D13181

llvm-svn: 248753
2015-09-28 22:54:08 +00:00
Artyom Skrobov d3ae09bcc8 Recommit r248154: [ARM] Handle DSP feature as an ArchExtKind
Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in
a hand-rolled tricky condition block in lib/Basic/Targets.cpp, with a FIXME:
attached.

http://reviews.llvm.org/D12937 moved the handling of the DSP feature over to
ARMTargetParser.def in LLVM, to be in line with other architecture extensions.

This is the corresponding patch to clang, to clear the FIXME: and update
the tests.

Differential Revision: http://reviews.llvm.org/D12938

llvm-svn: 248521
2015-09-24 17:34:05 +00:00
Daniel Sanders e0395a7f7f [mips] Relax -mnan=2008 acceptance to permit MIPS32R2 and MIPS64R2.
Summary:
Strictly speaking, the MIPS*R2 ISA's should not permit -mnan=2008 since this
feature was added in MIPS*R3. However, other toolchains permit this and we
should do the same.

Reviewers: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D13057

llvm-svn: 248481
2015-09-24 10:22:17 +00:00
Akira Hatanaka 510d7c71e2 Remove attributes minsize and optsize, which conflict with optnone.
This commit fixes an assert that is triggered when optnone is being
added to an IR function that is already marked with minsize and optsize.

rdar://problem/22723716

Differential Revision: http://reviews.llvm.org/D13004

llvm-svn: 248191
2015-09-21 18:52:24 +00:00
James Molloy 93bd4e9979 Revert "[ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def"
This was committed without the code review (http://reviews.llvm.org/D12938) being approved.

This reverts commit r248154.

llvm-svn: 248173
2015-09-21 16:34:58 +00:00
Artyom Skrobov 7428f1ef64 [ARM] Handle +t2dsp feature as an ArchExtKind in ARMTargetParser.def
Currently, the availability of DSP instructions (ACLE 6.4.7) is handled in
a hand-rolled tricky condition block in lib/Basic/Targets.cpp, with a FIXME:
attached.

http://reviews.llvm.org/D12937 moved the handling of +t2dsp over to
ARMTargetParser.def in LLVM, to be in line with other architecture extensions.

This is the corresponding patch to clang, to clear the FIXME: and update
the tests.

Differential Revision: http://reviews.llvm.org/D12938

llvm-svn: 248154
2015-09-21 13:19:25 +00:00
Simon Pilgrim 12919f7e49 [X86][SSE] Replace 128-bit SSE41 PMOVSX intrinsics with native IR
128-bit vector integer sign extensions correctly lower to the pmovsx instructions even for debug builds.

This patch removes the builtins and reimplements the _mm_cvtepi*_epi* intrinsics __using builtin_shufflevector (to extract the bottom most subvector) and __builtin_convertvector (to actually perform the sign extension).

Differential Revision: http://reviews.llvm.org/D12835

llvm-svn: 248092
2015-09-19 15:12:38 +00:00
Alexander Musman fbbc0b8cec Fix for assertion fail for pragma weak on typedef.
Example:
typedef int __td3;
#pragma weak td3 = __td3

Differential Revision: http://reviews.llvm.org/D12904

llvm-svn: 247975
2015-09-18 07:40:22 +00:00
Charles Davis c7d5c94f78 Support __builtin_ms_va_list.
Summary:
This change adds support for `__builtin_ms_va_list`, a GCC extension for
variadic `ms_abi` functions. The existing `__builtin_va_list` support is
inadequate for this because `va_list` is defined differently in the Win64
ABI vs. the System V/AMD64 ABI.

Depends on D1622.

Reviewers: rsmith, rnk, rjmccall

CC: cfe-commits

Differential Revision: http://reviews.llvm.org/D1623

llvm-svn: 247941
2015-09-17 20:55:33 +00:00
Reid Kleckner 01485654db Use the MSVC SEH personalities on Mingw
Mingw generally wraps an old copy of msvcrt.dll which has these
personalities, so things should work out, or so I hear. I haven't tested
it.

llvm-svn: 247902
2015-09-17 17:04:13 +00:00
Asaf Badouh 2718051dd7 re-apply r.247881
fixed the tests.

llvm-svn: 247892
2015-09-17 14:53:37 +00:00
Asaf Badouh 8a61250709 revert r.247881 due to tests failures
llvm-svn: 247883
2015-09-17 13:09:33 +00:00
NAKAMURA Takumi 007f75dab7 Appease clang/test/CodeGen/avx512dq-builtins.c for -Asserts, for now.
llvm-svn: 247882
2015-09-17 12:33:34 +00:00
Asaf Badouh a0e5e71ef1 [X86][AVX512DQ] add new intrinsics
convert i64 to FP and vice versa
reduceps & reducepd
rangeps & rangepd
all in their 512bit versions


Differential Revision: http://reviews.llvm.org/D11716

llvm-svn: 247881
2015-09-17 11:56:04 +00:00
NAKAMURA Takumi f9c52dc3e7 Make clang/test/CodeGen/catch-undef-behavior.c* capable of -Asserts with "opt -instnamer".
It reverts r231717.

llvm-svn: 247667
2015-09-15 09:50:24 +00:00
Piotr Padlewski d679d7e924 Generating assumption loads of vptr after ctor call (fixed)
Generating call assume(icmp %vtable, %global_vtable) after constructor
call for devirtualization purposes.

For more info go to:
http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html

Edit:
Fixed version because of PR24479 and other bug caused in chrome.
After this patch got reverted because of ScalarEvolution bug (D12719)
Merged after John McCall big patch (Added Address).

http://reviews.llvm.org/D11859
http://reviews.llvm.org/D12865

llvm-svn: 247646
2015-09-15 00:37:06 +00:00
Evgeniy Stepanov 6b2a61d3a5 Revert "Always_inline codegen rewrite" and 2 follow-ups.
Revert "Update cxx-irgen.cpp test to allow signext in alwaysinline functions."
Revert "[CodeGen] Remove wrapper-free always_inline functions from COMDATs"
Revert "Always_inline codegen rewrite."

Reason for revert: PR24793.

llvm-svn: 247620
2015-09-14 21:35:16 +00:00
Rachel Craik 022bdc7d73 C11 _Bool bitfield diagnostic
Summary: Implement DR262 (for C). This patch will mainly affect bitfields of type _Bool

Reviewers: fraggamuffin, rsmith

Subscribers: hubert.reinterpretcast, cfe-commits

Differential Revision: http://reviews.llvm.org/D10018

llvm-svn: 247618
2015-09-14 21:27:36 +00:00
Simon Atanasyan 25be8761b9 [mips] Add test case to check ABI flag emissions in case of inline assembler
Follow up to r247546. The test case reproduces the problem fixed by this commit.

llvm-svn: 247548
2015-09-14 11:23:02 +00:00
Evgeniy Stepanov 93db40a147 Always_inline codegen rewrite.
Current implementation may end up emitting an undefined reference for
an "inline __attribute__((always_inline))" function by generating an
"available_externally alwaysinline" IR function for it and then failing to
inline all the calls. This happens when a call to such function is in dead
code. As the inliner is an SCC pass, it does not process dead code.

Libc++ relies on the compiler never emitting such undefined reference.

With this patch, we emit a pair of
1. internal alwaysinline definition (called F.alwaysinline)
2a. A stub F() { musttail call F.alwaysinline }
  -- or, depending on the linkage --
2b. A declaration of F.

The frontend ensures that F.inlinefunction is only used for direct
calls, and the stub is used for everything else (taking the address of
the function, really). Declaration (2b) is emitted in the case when
"inline" is meant for inlining only (like __gnu_inline__ and some
other cases).

This approach, among other nice properties, ensures that alwaysinline
functions are always internal, making it impossible for a direct call
to such function to produce an undefined symbol reference.

This patch is based on ideas by Chandler Carruth and Richard Smith.

llvm-svn: 247494
2015-09-12 01:07:37 +00:00
Evgeniy Stepanov 67037ee21e Revert "Specify target triple in alwaysinline tests."
Revert "Always_inline codegen rewrite."

Breaks gdb & lldb tests.
Breaks on Fedora 22 x86_64.

llvm-svn: 247491
2015-09-11 23:48:37 +00:00
Evgeniy Stepanov 6dbfdaa6ab Specify target triple in alwaysinline tests.
This should fix the tests on Windows (failing due to mangling differencies).

llvm-svn: 247473
2015-09-11 21:10:12 +00:00
Evgeniy Stepanov 072e83500e Always_inline codegen rewrite.
Current implementation may end up emitting an undefined reference for
an "inline __attribute__((always_inline))" function by generating an
"available_externally alwaysinline" IR function for it and then failing to
inline all the calls. This happens when a call to such function is in dead
code. As the inliner is an SCC pass, it does not process dead code.

Libc++ relies on the compiler never emitting such undefined reference.

With this patch, we emit a pair of
1. internal alwaysinline definition (called F.alwaysinline)
2a. A stub F() { musttail call F.alwaysinline }
  -- or, depending on the linkage --
2b. A declaration of F.

The frontend ensures that F.inlinefunction is only used for direct
calls, and the stub is used for everything else (taking the address of
the function, really). Declaration (2b) is emitted in the case when
"inline" is meant for inlining only (like __gnu_inline__ and some
other cases).

This approach, among other nice properties, ensures that alwaysinline
functions are always internal, making it impossible for a direct call
to such function to produce an undefined symbol reference.

This patch is based on ideas by Chandler Carruth and Richard Smith.

llvm-svn: 247465
2015-09-11 20:29:07 +00:00
Akira Hatanaka aecca041c9 Record function attribute "stackrealign" instead of using backend option
-force-align-stack.

Also, make changes to the driver so that -mno-stack-realign is no longer
an option exposed to the end-user that disallows stack realignment in
the backend.

Differential Revision: http://reviews.llvm.org/D11815

llvm-svn: 247451
2015-09-11 18:55:09 +00:00
Reid Kleckner 9e8f2b46b2 Update test expectations for LLVM asm printing change
llvm-svn: 247434
2015-09-11 17:27:53 +00:00
Reid Kleckner fb06c84be8 [SEH] Port __try / __leave test to new IR
It turns out that the IR we already generate for __leave is fine, so no
code changes were needed.

llvm-svn: 247424
2015-09-11 16:29:27 +00:00
David Blaikie fc473554a6 [opaque pointer type] update test cases for explicit pointee types on global aliases
llvm-svn: 247380
2015-09-11 03:22:18 +00:00
Reid Kleckner 2586aac908 [SEH] Use cleanupendpad so that WinEHPrepare gets the coloring right
Cleanupendpad is a lot like catchendpad, so we can reuse the same
EHScopeStack type.

llvm-svn: 247349
2015-09-10 22:11:13 +00:00
Piotr Padlewski 4bed31b9bf Revert "Generating assumption loads of vptr after ctor call (fixed)"
It seems that there is small bug, and we can't generate assume loads
when some virtual functions have internal visibiliy
This reverts commit 982bb7d966947812d216489b3c519c9825cacbf2.

llvm-svn: 247332
2015-09-10 20:18:30 +00:00
Reid Kleckner bb34b60359 [SEH] Use catchret in the new EH IR like we do for C++
Also add tests for SEH with the new IRGen.

llvm-svn: 247318
2015-09-10 18:39:41 +00:00
Peter Collingbourne 2c7f7e31c4 CFI: Introduce -fsanitize=cfi-icall flag.
This flag causes the compiler to emit bit set entries for functions as well
as runtime bitset checks at indirect call sites. Depends on the new function
bitset mechanism.

Differential Revision: http://reviews.llvm.org/D11857

llvm-svn: 247238
2015-09-10 02:17:40 +00:00
John McCall 9a2c1c9603 Don't crash when emitting a block under returns_nonnull.
rdar://22071955

llvm-svn: 247228
2015-09-10 00:57:46 +00:00
Sanjay Patel daf34e9d85 convert builtin_unpredictable on a switch into metadata for LLVM
llvm-svn: 247203
2015-09-09 22:39:06 +00:00
Piotr Padlewski 255652e828 Generating assumption loads of vptr after ctor call (fixed)
Generating call assume(icmp %vtable, %global_vtable) after constructor
call for devirtualization purposes.

For more info go to:
http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html

Edit:
Fixed version because of PR24479.
After this patch got reverted because of ScalarEvolution bug (D12719)
Merged after John McCall big patch (Added Address).

http://reviews.llvm.org/D11859

llvm-svn: 247199
2015-09-09 22:20:28 +00:00
Alexandros Lamprineas 3834d2ca08 [ARM] "cortex-r5f" and "cortex-m4f" are unknown names for clang.
The tests in test/CodeGen/arm-target-features.c are currently
passing but warning messages are suppressed. These tests are now
synchronized with the corresponding changes in Target Parser.

This patch will fix the regressions in clang caused by r247136

Differential Revision: http://reviews.llvm.org/D12722

llvm-svn: 247138
2015-09-09 11:29:06 +00:00
Michael Zolotukhin 84df12375c Introduce __builtin_nontemporal_store and __builtin_nontemporal_load.
Summary:
Currently clang provides no general way to generate nontemporal loads/stores.
There are some architecture specific builtins for doing so (e.g. in x86), but
there is no way to generate non-temporal store on, e.g. AArch64. This patch adds
generic builtins which are expanded to a simple store with '!nontemporal'
attribute in IR.

Differential Revision: http://reviews.llvm.org/D12313

llvm-svn: 247104
2015-09-08 23:52:33 +00:00
John McCall 0a49015629 Collect SEH captures in a set instead of a vector to avoid
doing redundant work if a variable is used multiple times.

Fixes PR24751.

llvm-svn: 247075
2015-09-08 21:15:22 +00:00
NAKAMURA Takumi 64319286d0 clang/test/CodeGen/complex-convert.c: Appease for targeting powerpc64-*.
llvm-svn: 247015
2015-09-08 14:19:13 +00:00
Jakub Kuderski f50ab0ffce findDominatingStoreToReturn in CGCall.cpp didn't check if a candidate store
instruction used the ReturnValue as pointer operand or value operand. This
led to wrong code gen - in later stages (load-store elision code) the found
store and its operand would be erased, causing ReturnValue to become a <badref>.

The patch adds a check that makes sure that ReturnValue is a pointer operand of
store instruction. Regression test is also added.

This fixes PR24386.
Differential Revision: http://reviews.llvm.org/D12400

llvm-svn: 247003
2015-09-08 10:36:42 +00:00
NAKAMURA Takumi f7bee71c26 Fix clang/test/CodeGen/mips-varargs.c for -Asserts, possibly typo.
llvm-svn: 246994
2015-09-08 09:37:09 +00:00
John McCall 7f416cc426 Compute and preserve alignment more faithfully in IR-generation.
Introduce an Address type to bundle a pointer value with an
alignment.  Introduce APIs on CGBuilderTy to work with Address
values.  Change core APIs on CGF/CGM to traffic in Address where
appropriate.  Require alignments to be non-zero.  Update a ton
of code to compute and propagate alignment information.

As part of this, I've promoted CGBuiltin's EmitPointerWithAlignment
helper function to CGF and made use of it in a number of places in
the expression emitter.

The end result is that we should now be significantly more correct
when performing operations on objects that are locally known to
be under-aligned.  Since alignment is not reliably tracked in the
type system, there are inherent limits to this, but at least we
are no longer confused by standard operations like derived-to-base
conversions and array-to-pointer decay.  I've also fixed a large
number of bugs where we were applying the complete-object alignment
to a pointer instead of the non-virtual alignment, although most of
these were hidden by the very conservative approach we took with
member alignment.

Also, because IRGen now reliably asserts on zero alignments, we
should no longer be subject to an absurd but frustrating recurring
bug where an incomplete type would report a zero alignment and then
we'd naively do a alignmentAtOffset on it and emit code using an
alignment equal to the largest power-of-two factor of the offset.

We should also now be emitting much more aggressive alignment
attributes in the presence of over-alignment.  In particular,
field access now uses alignmentAtOffset instead of min.

Several times in this patch, I had to change the existing
code-generation pattern in order to more effectively use
the Address APIs.  For the most part, this seems to be a strict
improvement, like doing pointer arithmetic with GEPs instead of
ptrtoint.  That said, I've tried very hard to not change semantics,
but it is likely that I've failed in a few places, for which I
apologize.

ABIArgInfo now always carries the assumed alignment of indirect and
indirect byval arguments.  In order to cut down on what was already
a dauntingly large patch, I changed the code to never set align
attributes in the IR on non-byval indirect arguments.  That is,
we still generate code which assumes that indirect arguments have
the given alignment, but we don't express this information to the
backend except where it's semantically required (i.e. on byvals).
This is likely a minor regression for those targets that did provide
this information, but it'll be trivial to add it back in a later
patch.

I partially punted on applying this work to CGBuiltin.  Please
do not add more uses of the CreateDefaultAligned{Load,Store}
APIs; they will be going away eventually.

llvm-svn: 246985
2015-09-08 08:05:57 +00:00
Simon Pilgrim 437cc973fb [X86][SSE4A] Added SSE4A IR + assembly codegen builtin tests
llvm-svn: 246974
2015-09-07 20:10:11 +00:00
Simon Pilgrim 0d9d748bf1 [X86][SSSE3] Added SSSE3 IR + assembly codegen builtin tests
Transferred SSSE3 instructions from sse-builtins.c

llvm-svn: 246948
2015-09-06 17:06:22 +00:00
Simon Pilgrim ff88a0da31 [X86]][SSE3] Added SSE41 IR + assembly codegen builtin tests
Transferred SSE41 instructions from sse-builtins.c

llvm-svn: 246947
2015-09-06 16:38:17 +00:00
Alexandros Lamprineas 94d75dba14 Refactoring of how ARMTargetInfo handles default target features.
Differential Revision: http://reviews.llvm.org/D11299

llvm-svn: 246946
2015-09-06 16:15:45 +00:00
Simon Pilgrim 8391ac7001 [X86]][SSE3] Added SSE3 IR + assembly codegen builtin tests
llvm-svn: 246945
2015-09-06 14:45:13 +00:00
Simon Pilgrim de06f31885 [X86]][SSE42] Added SSE42 IR + assembly codegen builtin tests
llvm-svn: 246944
2015-09-06 14:05:33 +00:00
George Burgess IV b40cd567c3 Fix a bug in __builtin_object_size cast removal
Apparently there are many cast kinds that may cause implicit pointer
arithmetic to happen. In light of this, the cast ignoring logic
introduced in r246877 has been changed to only ignore a small set of
cast kinds, and a test for this behavior has been added.

Thanks to Richard for catching this before it became a bug report. :)

llvm-svn: 246890
2015-09-04 22:36:18 +00:00
George Burgess IV 3a03fabdd0 Increase accuracy of __builtin_object_size.
Improvements:

- For all types, we would give up in a case such as:
    __builtin_object_size((char*)&foo, N);
  even if we could provide an answer to
    __builtin_object_size(&foo, N);
  We now provide the same answer for both of the above examples in all
  cases.

- For type=1|3, we now support subobjects with unknown bases, as long
  as the designator is valid.

Thanks to Richard Smith for the review + design planning.

Review: http://reviews.llvm.org/D12169
llvm-svn: 246877
2015-09-04 21:28:13 +00:00
Alexey Bataev a7ab1b4206 [X86-64] Allow additional register names in inline assembler.
Patch allows to recognize additional registers x8d, x8b, x8w - x15d, x15b, x15w in inline assembler, already recognized by backend
Differential Revision: http://reviews.llvm.org/D12594

llvm-svn: 246835
2015-09-04 03:42:23 +00:00
Dan Gohman c285307e14 [WebAssembly] Initial WebAssembly support in clang
This implements basic support for compiling (though not yet assembling
or linking) for a WebAssembly target. Note that ABI details are not yet
finalized, and may change.

Differential Revision: http://reviews.llvm.org/D12002

llvm-svn: 246814
2015-09-03 22:51:53 +00:00
Oliver Stannard dc2854c2f1 [ARM] Allow passing/returning of __fp16 arguments
The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be
used as a functon argument or return type (ACLE 1.1 did not).

The current public release of the AAPCS (2.09) states that __fp16 values
should be converted to single-precision before being passed or returned,
but AAPCS 2.10 (to be released shortly) changes this, so that they are
passed in the least-significant 16 bits of either a GPR (for base AAPCS)
or a single-precision register (for AAPCS-VFP). This does not change how
arguments are passed if they get passed on the stack.

This patch brings clang up to compliance with the latest versions of
both of these specs.

We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always
been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support
the alternative format).

llvm-svn: 246764
2015-09-03 12:40:58 +00:00
Oliver Stannard 9253f00d13 Revert 246755 as it breaks buildbots
Original commit message:
[ARM] Allow passing/returning of __fp16 arguments

The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be
used as a functon argument or return type (ACLE 1.1 did not).

The current public release of the AAPCS (2.09) states that __fp16 values
should be converted to single-precision before being passed or returned,
but AAPCS 2.10 (to be released shortly) changes this, so that they are
passed in the least-significant 16 bits of either a GPR (for base AAPCS)
or a single-precision register (for AAPCS-VFP). This does not change how
arguments are passed if they get passed on the stack.

This patch brings clang up to compliance with the latest versions of
both of these specs.

We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always
been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support
the alternative format).

llvm-svn: 246760
2015-09-03 11:46:24 +00:00
Oliver Stannard ee0286201c [ARM] Allow passing/returning of __fp16 arguments
The ACLE (ARM C Language Extensions) 2.0 allows the __fp16 type to be
used as a functon argument or return type (ACLE 1.1 did not).

The current public release of the AAPCS (2.09) states that __fp16 values
should be converted to single-precision before being passed or returned,
but AAPCS 2.10 (to be released shortly) changes this, so that they are
passed in the least-significant 16 bits of either a GPR (for base AAPCS)
or a single-precision register (for AAPCS-VFP). This does not change how
arguments are passed if they get passed on the stack.

This patch brings clang up to compliance with the latest versions of
both of these specs.

We can now set the __ARM_FP16_ARGS ACLE predefine, and we have always
been able to set the __ARM_FP16_FORMAT_IEEE predefine (we do not support
the alternative format).

llvm-svn: 246755
2015-09-03 09:34:53 +00:00
Sanjay Patel a24296b459 add __builtin_unpredictable and convert to metadata
This patch depends on r246688 (D12341).

The goal is to make LLVM generate different code for these functions for a target that
has cheap branches (see PR23827 for more details):

int foo();

int normal(int x, int y, int z) {
   if (x != 0 && y != 0) return foo();
   return 1;
}

int crazy(int x, int y) {
   if (__builtin_unpredictable(x != 0 && y != 0)) return foo();
   return 1;
}

Differential Revision: http://reviews.llvm.org/D12458

llvm-svn: 246699
2015-09-02 20:01:30 +00:00
Hal Finkel 65e1e4dbe0 [PowerPC] Support __builtin_ppc_get_timebase
GCC 4.8+ has a PowerPC-specific intrinsic, __builtin_ppc_get_timebase, to do
what Clang's __builtin_readcyclecounter does. For compatibility with code that
uses GCC's spelling (including glibc), support it as well.

Partially fixes PR23681.

llvm-svn: 246510
2015-08-31 23:55:19 +00:00
Hans Wennborg 2151d12ec0 Fix CHECK directives that weren't checking.
llvm-svn: 246492
2015-08-31 21:48:52 +00:00
Jingyue Wu 2d69f9608e [CUDA] fix codegen for __nvvm_atom_min/max_gen_u*
Summary: Clang should emit "atomicrmw umin/umax" instead of "atomicrmw min/max".

Reviewers: eliben, tra

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D12487

llvm-svn: 246455
2015-08-31 17:25:51 +00:00
Yaron Keren 2dbe3440d5 Fix test for Release builds, the label form is <label>:14, not <label>14.
llvm-svn: 246391
2015-08-30 17:46:43 +00:00
Yaron Keren 43e184ee0c Make test resistant to false matches of numbered (unnamed) labels inside other numbers.
In release builds labels are numbers. Matching just the number may result
in false matches where the label is contained in other numbers, such as
14 inside [114 x i8]. A stricter match requiring start of line or > character
before the label avoids these false matches.

llvm-svn: 246385
2015-08-30 15:24:46 +00:00
Simon Pilgrim e7708a84b9 [X86] Reapplied r246204, r246206, r246211, r246223
(Re)added debug codegen test for F16C, FMA4, XOP + 3DNow! intrinsics

Part of PR24590

llvm-svn: 246363
2015-08-29 17:13:40 +00:00
Eric Christopher a15a35e552 Add a check for a function we're not testing.
llvm-svn: 246355
2015-08-29 02:59:37 +00:00
Renato Golin b9365ae36a Revert "[X86][3DNow] Added debug codegen test for 3DNow! intrinsics"
This reverts commit r246223, as it broke all ARM/AArch64 bots.

llvm-svn: 246323
2015-08-28 19:39:29 +00:00
Renato Golin 0b4112341b Revert "[X86][XOP] Added debug codegen test for XOP intrinsics"
This reverts commit r246211, as it broke all ARM/AArch64 bots.

llvm-svn: 246321
2015-08-28 19:38:05 +00:00
Renato Golin a3265f5be7 Revert "[X86][FMA4] Added debug codegen test for FMA4 intrinsics"
This reverts commit r246206, as it broke all ARM/AArch64 bots.

llvm-svn: 246320
2015-08-28 19:36:27 +00:00
Renato Golin b44e54170e Revert "[X86][F16C] Added debug codegen test for F16C intrinsics"
This reverts commit r246204, as it was breaking all ARM/AArch64 bots.

llvm-svn: 246319
2015-08-28 19:34:53 +00:00
Steven Wu 5528da76ef Revert r246214 and r246213
These two commits causes llvm LTO bootstrap to hang in ScalarEvolution.

llvm-svn: 246282
2015-08-28 07:14:10 +00:00
Ahmed Bougacha 02b7b56af8 [X86] Bump Darwin MaxVectorAlign to 64 when AVX512 is enabled.
Without this, 64-byte vector types (__m512), specified to be 64-byte
aligned in the AVX512 draft SysV ABI, will only be 32-byte aligned.

This is analoguous to AVX, for which we accept 32-byte max alignment.

Differential Revision: http://reviews.llvm.org/D10724

llvm-svn: 246230
2015-08-27 22:42:12 +00:00
Ahmed Bougacha 82b619ea68 [X86] Conditionalize Darwin MaxVectorAlign on the presence of AVX.
There's no point in using a larger alignment if we have no instructions
that would benefit from it.

Differential Revision: http://reviews.llvm.org/D12389

llvm-svn: 246229
2015-08-27 22:30:38 +00:00
Simon Pilgrim c7eaa17fe1 [X86][3DNow] Added debug codegen test for 3DNow! intrinsics
Part of PR24590

llvm-svn: 246223
2015-08-27 22:18:09 +00:00
Piotr Padlewski 525f746710 Generating assumption loads of vptr after ctor call (fixed)
Generating call assume(icmp %vtable, %global_vtable) after constructor
call for devirtualization purposes.

For more info go to:
http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html

Edit:
Fixed version because of PR24479.

http://reviews.llvm.org/D11859

llvm-svn: 246213
2015-08-27 21:35:37 +00:00
Simon Pilgrim 7033a9ce33 [X86][XOP] Added debug codegen test for XOP intrinsics
Part of PR24590

llvm-svn: 246211
2015-08-27 21:32:03 +00:00
Simon Pilgrim 75dffb8df3 [X86][FMA4] Added debug codegen test for FMA4 intrinsics
Part of PR24590

llvm-svn: 246206
2015-08-27 20:41:45 +00:00
Simon Pilgrim 9362270f78 [X86][F16C] Added debug codegen test for F16C intrinsics
Part of PR24590

llvm-svn: 246204
2015-08-27 20:34:02 +00:00
Simon Pilgrim a79dfb3223 [X86] Add __builtin_ia32_undef* intrinsics to test
Minor tweak to rL246083

llvm-svn: 246200
2015-08-27 20:29:13 +00:00
Eric Christopher 3751bce2a9 Target attribute syntax compatibility fix - gcc uses no- rather than mno-.
llvm-svn: 246197
2015-08-27 20:05:48 +00:00
Eric Christopher 5d2db529cb Rename this file to have a processor suffix to help identify.
llvm-svn: 246196
2015-08-27 20:05:46 +00:00
Eric Christopher 3a98b3c1a5 Rewrite the code generation handling for function feature and cpu attributes.
A couple of changes here:

a) Do less work in the case where we don't have a target attribute on the
function. We've already canonicalized the attributes for the function -
no need to do more work.

b) Use the newer canonicalized feature adding functions from TargetInfo
to do the work when we do have a target attribute. This enables us to diagnose
some warnings in the case of conflicting written attributes (only ppc does
this today) and also make sure to get all of the features for a cpu that's
listed rather than just change the cpu.

Updated all testcases accordingly and added a new testcase to verify that we'll
error out on ppc if we have some incompatible options using the existing diagnosis
framework there.

llvm-svn: 246195
2015-08-27 19:59:34 +00:00
Duncan P. N. Exon Smith 8cd9d7acb2 DI: Update DISubprogram testcases after LLVM r246098
llvm-svn: 246099
2015-08-26 22:50:48 +00:00
Ahmed Bougacha 5946ca4fc4 [ARM] Mark mcr/mrc builtin operands as required-immediate.
An early error message is better than the "cannot select" alternative.

llvm-svn: 246094
2015-08-26 22:21:07 +00:00
Reid Kleckner 14e96b4930 [ms-inline-asm] Add field access to MS inline asm identifier lookup
Now we can parse code like this:
  struct A {
    int field;
  };
  int f(A o) {
    __asm mov eax, o.field
  }

Fixes PR19117.

llvm-svn: 246088
2015-08-26 21:57:20 +00:00
Simon Pilgrim 5aba9925c0 [X86][SSE] Add _mm_undefined_* intrinsics
Added missing SSE/AVX 'undefined' intrinsics (PR24040):

_mm_undefined_pd, _mm_undefined_ps + _mm_undefined_si128
_mm256_undefined_pd, _mm256_undefined_ps + _mm256_undefined_si256
_mm512_undefined, _mm512_undefined_ps, _mm512_undefined_pd + _mm512_undefined_epi32

Added builtin intrinsicss:

__builtin_ia32_undef128, __builtin_ia32_undef256 + __builtin_ia32_undef512

Differential Revision: http://reviews.llvm.org/D12052

llvm-svn: 246083
2015-08-26 21:17:12 +00:00
Ahmed Bougacha beb3a9a970 [Headers] Require x86-registered for r245987 codegen tests.
llvm-svn: 245992
2015-08-25 23:42:55 +00:00
Ahmed Bougacha e9abaad105 [Headers][X86] Add -O0 assembly tests for avx2 intrinsics.
We agreed for r245605 that, as long as we don't affect -O0 codegen
too much, it's OK to use native constructs rather than intrinsics.
Let's test that, starting with AVX2 here.

See PR24580.

Differential Revision: http://reviews.llvm.org/D12212

llvm-svn: 245987
2015-08-25 23:09:05 +00:00
Simon Pilgrim fbb8904411 [X86] Remove unnecessary MMX declarations from Intrin.h
As discussed in PR23648 - the intrinsics _m_from_int, _m_to_int and _m_prefetch are defined in mmintrin.h and prfchwintrin.h so we don't need to in Intrin.h

Added tests for _m_from_int and _m_to_int

D11338 already added a test for _m_prefetch

Differential Revision: http://reviews.llvm.org/D12272

llvm-svn: 245975
2015-08-25 21:27:46 +00:00
Michael Kuperstein b62c5bc64d Revert r245923 since it breaks mingw.
llvm-svn: 245929
2015-08-25 11:42:31 +00:00
Michael Kuperstein 2c8f9c2c23 [X86] Expose the various _rot intrinsics on non-MS platforms
_rotl, _rotwl and _lrotl (and their right-shift counterparts) are official x86
intrinsics, and should be supported regardless of environment. This is in contrast
to _rotl8, _rotl16, and _rotl64 which are MS-specific.

Note that the MS documentation for _lrotl is different from the Intel 
documentation. Intel explicitly documents it as a 64-bit rotate, while for MS,
since sizeof(unsigned long) for MSVC is always 4, a 32-bit rotate is implied.

Differential Revision: http://reviews.llvm.org/D12271

llvm-svn: 245923
2015-08-25 07:21:33 +00:00
Ahmed Bougacha 0aacc46220 [ARM NEON] Remove the old AArch64 vset_lane tests. NFC.
They are now properly tested, since r245901.

llvm-svn: 245915
2015-08-25 01:00:05 +00:00
Ahmed Bougacha 8fbd95306d [ARM NEON] Add missing AArch64 vget tests.
llvm-svn: 245901
2015-08-24 23:34:25 +00:00
Simon Pilgrim 503976ad9a Added missing tests for SSE41 pmovsx/pmovzx extension intrinsics
llvm-svn: 245815
2015-08-23 16:19:38 +00:00
Piotr Padlewski fa0e11efdd Revert "Generating assumption loads of vptr after ctor call (fixed)"
Reverting because of 245721

This reverts commit 552658e2b60543c928030b09cc9b5dfcb40c3f28.

llvm-svn: 245727
2015-08-21 19:49:41 +00:00
Piotr Padlewski 910a059e42 Generating assumption loads of vptr after ctor call (fixed)
Generating call assume(icmp %vtable, %global_vtable) after constructor
call for devirtualization purposes.

For more info go to:
http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html

Edit:
Fixed version because of PR24479.

http://reviews.llvm.org/D11859

llvm-svn: 245721
2015-08-21 18:28:00 +00:00
James Y Knight 7160857da3 Properly provide alignment of 'byval' arguments down to llvm.
This is important in the case that the LLVM-inferred llvm-struct
alignment is not the same as the clang-known C-struct alignment.

Differential Revision: http://reviews.llvm.org/D12243

llvm-svn: 245719
2015-08-21 18:19:06 +00:00
Yaron Keren cc84a1bea1 Expand mingw-long-double.c to test for long double alignment.
llvm-svn: 245679
2015-08-21 08:26:31 +00:00
Ahmed Bougacha 5e354cb547 [Headers][X86] Use __builtin_shufflevector in AVX2 broadcasts.
This lets us optimize them better. We agreed to remove the intrinsics,
instead of combining them later, as, at -O0, we generate the expected
instructions. Plus, it's a nice cleanup.

Differential Revision: http://reviews.llvm.org/D10556

llvm-svn: 245605
2015-08-20 20:27:21 +00:00
John McCall 0d461693b6 Fix the layout of bitfields in ms_struct unions: their
alignment is ignored, and they always allocate a complete
storage unit.

Also, change the dumping of AST record layouts: use the more
readable C++-style dumping even in C, include bitfield offset
information in the dump, and don't print sizeof/alignof
information for fields of record type, since we don't do so
for bases or other kinds of field.

rdar://22275433

llvm-svn: 245514
2015-08-19 22:42:36 +00:00
Richard Smith 7747ce2260 Internal-linkage variables with constant-evaluatable initializers do not need to be emitted. (Also reduces the set of variables that need to be eagerly deserialized when using PCH / modules.)
llvm-svn: 245497
2015-08-19 20:49:38 +00:00
Yaron Keren 24b64a9405 Add REQUIRES: x86-registered-target to test since it's required.
llvm-svn: 245462
2015-08-19 17:18:32 +00:00
Yaron Keren 7890a01263 According to i686 ABI, long double size on x86 is 12 bytes not 16 bytes.
See
 https://gcc.gnu.org/onlinedocs/gcc-3.2/gcc/i386-and-x86-64-Options.html

llvm-svn: 245459
2015-08-19 17:02:32 +00:00
George Burgess IV bdb5b2687a Make __builtin_object_size always answer correctly
__builtin_object_size would return incorrect answers for many uses where
type=3. This fixes the inaccuracy by making us emit 0 instead of LLVM's
objectsize intrinsic.

Additionally, there are many cases where we would emit suboptimal (but
correct) answers, such as when arrays are involved. This patch fixes
some of these cases (please see new tests in test/CodeGen/object-size.c
for specifics on which cases are improved)

Resubmit of r245323 with PR24493 fixed.
Patch mostly by Richard Smith.
Differential Revision: http://reviews.llvm.org/D12000
This fixes PR15212.

llvm-svn: 245403
2015-08-19 02:19:07 +00:00
Nico Weber 19999b4816 Revert r245323, it caused PR24493.
llvm-svn: 245342
2015-08-18 20:32:55 +00:00
George Burgess IV 232c76213d Make __builtin_object_size always answer correctly
__builtin_object_size would return incorrect answers for many uses where
type=3. This fixes the inaccuracy by making us emit 0 instead of LLVM's
objectsize intrinsic.

Additionally, there are many cases where we would emit suboptimal (but
correct) answers, such as when arrays are involved. This patch fixes
some of these cases (please see new tests in test/CodeGen/object-size.c
for specifics on which cases are improved)

Patch mostly by Richard Smith.
Differential Revision: http://reviews.llvm.org/D12000
This fixes PR15212.

llvm-svn: 245323
2015-08-18 18:18:27 +00:00
Justin Bogner 3c32c83daa Revert "Generating assumption loads of vptr after ctor call (fixed)"
Bootstrap bots were failing:

http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_build/6382/
http://bb.pgr.jp/builders/clang-3stage-i686-linux/builds/2969

This reverts r245264.

llvm-svn: 245267
2015-08-18 05:40:20 +00:00
Piotr Padlewski bc7497abbb Generating assumption loads of vptr after ctor call (fixed)
Generating call assume(icmp %vtable, %global_vtable) after constructor
call for devirtualization purposes.

For more info go to:
http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html

Edit:
Fixed version because of PR24479.

http://reviews.llvm.org/D11859

llvm-svn: 245264
2015-08-18 03:52:00 +00:00
Hans Wennborg 386e442d1d Revert r245257 "Generating assumption loads of vptr after ctor call"
It caused PR24479

llvm-svn: 245260
2015-08-18 00:17:58 +00:00
Piotr Padlewski a3f6f9477b Generating assumption loads of vptr after ctor call
Generating call assume(icmp %vtable, %global_vtable) after constructor
call for devirtualization purposes.

For more info go to:
http://lists.llvm.org/pipermail/cfe-dev/2015-July/044227.html

http://reviews.llvm.org/D11859

llvm-svn: 245257
2015-08-17 23:33:49 +00:00
John Brawn 2106b7525c The alias.c test now requires arm-registered-target
This should fix a buildbot failure

llvm-svn: 244760
2015-08-12 15:55:55 +00:00
John Brawn 495008edde Add test for PR24379
The fix for this is in LLVM but it depends on how clang handles the alias
attribute, so add a test to the clang tests to make sure everything works
together as expected.

Differential Revision: http://reviews.llvm.org/D11980

llvm-svn: 244756
2015-08-12 15:15:27 +00:00
Filipe Cabecinhas 7af183d841 Propagate SourceLocations through to get a Loc on float_cast_overflow
Summary:
float_cast_overflow is the only UBSan check without a source location attached.
This patch propagates SourceLocations where necessary to get them to the
EmitCheck() call.

Reviewers: rsmith, ABataev, rjmccall

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D11757

llvm-svn: 244568
2015-08-11 04:19:28 +00:00
Derek Schuff 33d60bfc0d add comment
llvm-svn: 244542
2015-08-11 00:19:54 +00:00
Derek Schuff 9cfd488443 Add NaCl to long double/fp128 mangling test
Summary:
NaCl is a platform where long double is the same as double.
Its mangling is spelled with "long double" but its ABI lowering is the same
as double.

Reviewers: rnk, chh

Subscribers: jfb, cfe-commits, dschuff

Differential Revision: http://reviews.llvm.org/D11922

llvm-svn: 244541
2015-08-11 00:19:53 +00:00
Derek Schuff 4044f6197a Add NaCl (a target where long double = double) to long double ABI test
A test was recently (r244468) added to cover long double calling convention
codegen, distinguishing between Android and GNU conventions (where long doubles
are fp128 and x86_fp80, respectively). Native Client is a target where long
doubles are the same as doubles. This change augments the test to cover
that case.

Also rename the test to test/codeGen/X86_64-longdouble.c

Differential Revision: http://reviews.llvm.org/D11921

llvm-svn: 244524
2015-08-10 23:02:37 +00:00
Chih-Hung Hsieh 00b6f74935 Fix test case to work with -Asserts builds.
When clang is built with -DLLVM_ENABLE_ASSERTIONS=Off,
it does not create names for IR values.

Differential Revision: http://reviews.llvm.org/D11437

llvm-svn: 244502
2015-08-10 20:58:54 +00:00
Chih-Hung Hsieh 241a890bd7 Correct x86_64 fp128 calling convention
These changes are for Android x86_64 targets to be compatible
with current Android g++ and conform to AMD64 ABI.

https://llvm.org/bugs/show_bug.cgi?id=23897
  * Return type of long double (fp128) should be fp128, not x86_fp80.
  * Vararg of long double (fp128) could be in register and overflowed to memory.

https://llvm.org/bugs/show_bug.cgi?id=24111
  * Return value of long double (fp128) _Complex should be in memory like a structure of {fp128,fp128}.

Differential Revision: http://reviews.llvm.org/D11437

llvm-svn: 244468
2015-08-10 17:33:31 +00:00
Peter Collingbourne eeebc41b58 AST: Implement mangling support for function types without a prototype.
Function types without prototypes can arise when mangling a function type
within an overloadable function in C. We mangle these as the absence of
any parameter types (not even an empty parameter list).

Differential Revision: http://reviews.llvm.org/D11848

llvm-svn: 244374
2015-08-07 23:25:47 +00:00
James Y Knight 57fc89f029 [Sparc] XFAIL CodeGen/atomic_ops test.
llvm-svn: 244370
2015-08-07 22:52:34 +00:00
Michael Kuperstein d7b9392f59 [X86] Add support for _MM_ALIGN16
Differential Revision: http://reviews.llvm.org/D11753

llvm-svn: 244201
2015-08-06 08:24:38 +00:00
Reid Kleckner 124955aade Add -gcodeview and -gdwarf to control which type Clang emits
Summary:
By default, 'clang' emits dwarf and 'clang-cl' emits codeview.  You can
force emission of one or both by passing -gcodeview and -gdwarf to
either driver.

Reviewers: dblaikie, hans

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D11742

llvm-svn: 244097
2015-08-05 18:51:13 +00:00
James Y Knight 81167fb799 Add missing atomic libcall support.
Support for emitting libcalls for __atomic_fetch_nand and
__atomic_{add,sub,and,or,xor,nand}_fetch was missing; add it, and some
test cases.

Differential Revision: http://reviews.llvm.org/D10847

llvm-svn: 244063
2015-08-05 16:57:36 +00:00
Asaf Badouh c68e347c25 [X86][AVX512VLBW] add pack, cvt, mulhi and madd intrinsics
Differential Revision: http://reviews.llvm.org/D11642

llvm-svn: 243867
2015-08-03 07:51:00 +00:00
Asaf Badouh 73b639f650 [X86][AVX512VLDQ] add reduce/range/cvt intrinsics
add 128 & 256 width intrinsic versions of reduce/range and cvt i64 to FP and vice versa

Differential Revision: http://reviews.llvm.org/D11598

llvm-svn: 243848
2015-08-02 12:43:08 +00:00
Duncan P. N. Exon Smith 38a7f11a5a DI: Update testcases for LLVM assembly change
Update testcases after LLVM change r243774.

Most of these had no need to check `tag:` field, but did so as a way of
getting to the `name:` field.  In a few cases I've converted the `tag:`
checks to `arg:` or `CHECK-NOT: arg:`.

llvm-svn: 243775
2015-07-31 18:59:37 +00:00
Ulrich Weigand ca25643a05 [SystemZ] Add support for vecintrin.h vector built-in functions
This patch adds support for the System Z vector built-in functions.
The API-defined header file has the name vecintrin.h.

The user-level functions are defined in the same style as the clang
version of altivec.h, making heavy use of the __overloadable__ and
__always_inline__ attributes.  Where possible the functions expand to
generic operations rather than specific built-in functions, in the hope
that that form can be optimised better.

Where a built-in routine is specified to require an immediate integer
argument, the __enable_if__ attribute is used to verify the argument is
in fact constant and in the appropriate range.

Based on a patch by Richard Sandiford.

llvm-svn: 243643
2015-07-30 14:10:43 +00:00
Ulrich Weigand 3c5038a535 Add support for System z vector language extensions
The z13 vector facility has an associated language extension,
closely modeled on AltiVec/VSX.  The main differences are:

- vector long, vector float and vector pixel are not supported

- vector long long and vector double are supported (like VSX)

- comparison operators return a vector rather than a scalar integer

- shift operators behave like the OpenCL shift operators

- vector bool is only supported as argument to certain operators;
  some operators allow mixing a bool with a non-bool vector 

This patch adds clang support for the extension.  It is closely modelled
on the AltiVec support.  Similarly to the -faltivec option, there's a
new -fzvector option to enable the extensions (as well as an -mzvector
alias for compatibility with GCC).  There's also a separate LangOpt.

The extension as implemented here is intended to be compatible with
the -mzvector extension recently implemented by GCC.

Based on a patch by Richard Sandiford.

Differential Revision: http://reviews.llvm.org/D11001

llvm-svn: 243642
2015-07-30 14:08:36 +00:00
Michael Kuperstein 2229ca71fd [X86] Recognize "flags" as an identifier, not a register in Intel-syntax inline asm
This contains the test-case for r243630.

Patch by: marina.yatsina@intel.com
Differential Revision: http://reviews.llvm.org/D11513

llvm-svn: 243632
2015-07-30 10:10:47 +00:00
Asaf Badouh 1998eb2077 [X86][AVX512BW] add convert i16 to i8 and unpack intrinsics
Differential Revision: http://reviews.llvm.org/D11564

llvm-svn: 243514
2015-07-29 12:34:20 +00:00
Chih-Hung Hsieh 2c656c9417 Add -femulated-tls flag to select the emulated TLS model.
This will be used for old targets like Android that do not
support ELF TLS models.

Differential Revision: http://reviews.llvm.org/D10524

llvm-svn: 243441
2015-07-28 16:27:56 +00:00
Kristof Beyls 918f8ab7c6 RegParmMax must be 0 for AArch64, as the regparm function attribute is not supported on AArch64.
llvm-svn: 243417
2015-07-28 14:23:47 +00:00
Adhemerval Zanella 3916c910d1 [AArch64] Implement __builtin_thread_pointer
This path add the aarch64 __builtin_thread_pointer support.  It will be
lowered to llvm.aarch64.thread.pointer.

llvm-svn: 243413
2015-07-28 13:10:10 +00:00
Asaf Badouh 93aa4c808a [X86][AVX512VL] add AVX512VL intrinsics 4 out of 4
Differential Revision: http://reviews.llvm.org/D11526

llvm-svn: 243409
2015-07-28 12:04:40 +00:00
Asaf Badouh b7cf71b63d [X86][AVX512VL] add AVX512VL intrinsics 3 out of 4
http://reviews.llvm.org/D11526

llvm-svn: 243406
2015-07-28 11:14:09 +00:00
Asaf Badouh 78ee5cc8e1 [X86][AVX512VL] add AVX512VL intrinsics 2 out of 4
http://reviews.llvm.org/D11526

llvm-svn: 243402
2015-07-28 10:30:56 +00:00
Asaf Badouh 74da38706e [X86][AVX512VL] add AVX512VL intrinsics 1 out of 4
http://reviews.llvm.org/D11526

llvm-svn: 243394
2015-07-28 08:26:14 +00:00
Simon Pilgrim 917c4d41ea Fixed test in rL243305
llvm-svn: 243314
2015-07-27 19:49:54 +00:00
Simon Pilgrim f81966d04b [X86] Add missing _m_prefetch intrinsic
The 3DNOW/PRFCHW cpu targets define both the PREFETCHW (set cache line modified) and PREFETCH (set cache line exclusive) instructions but only the _m_prefetchw (PREFETCHW) intrinsic is included in the header. This patch adds the missing _m_prefetch intrinsic.

I'm basing this off AMD documentation - the intel docs on the support for PREFETCHW isn't clear whether Silvermont/Broadwell properly support PREFETCH but given that the intrinsic implementation is a default __builtin_prefetch call, it is safe whatever.

Fix for PR23648

Differential Revision: http://reviews.llvm.org/D11338

llvm-svn: 243305
2015-07-27 19:01:52 +00:00
David Majnemer 72f8c5e0c9 Try to make the buildbots happy
This test was missing a triple causing it to error out on windows
targets.  They accept a much smaller alignment value.

llvm-svn: 243234
2015-07-26 02:16:35 +00:00
David Majnemer 6cd35912c0 [CodeGen] Don't UBSan-ize the argument to __builtin_frame_address
__builtin_frame_address requires its argument to be a constant
expression which already implies that it cannot have undefined behavior.
However, we used EmitScalarExpr to emit the argument causing UBSan to
try to check for overflow.

Instead, use the constant expression emission system.

This fixes PR24256.

llvm-svn: 243206
2015-07-25 05:57:24 +00:00
Chih-Hung Hsieh 0b0eeaaaf6 Correct x86_64 Android fp128 mangled name
These changes are for Android x86_64 targets to be compatible with current Android g++.
https://llvm.org/bugs/show_bug.cgi?id=23897
Use 'g' and 'Cg' for "long double" and "long double _Complex" mangled type names.

Differential Revision: http://reviews.llvm.org/D11466

llvm-svn: 243133
2015-07-24 18:12:54 +00:00
Asaf Badouh f6a58b6dff [X86][AVX512F] Add FP scalar intrinsics
intrinsics for: add/sub/mul/div/min/max in their FP scalar versions

Differential Revision: http://reviews.llvm.org/D11418

llvm-svn: 243009
2015-07-23 12:13:32 +00:00
Asaf Badouh 7d99966e91 [X86][AVX512BW] add madd and maddubs intrinsics
Differential Revision: http://reviews.llvm.org/D11420

llvm-svn: 242986
2015-07-23 07:07:25 +00:00
Asaf Badouh ffeb624483 [X86][AVX512F] add FP arithmetic intrinsics
add/div/mul/sub include rounding versions


Differential Revision: http://reviews.llvm.org/D11354

llvm-svn: 242790
2015-07-21 15:27:28 +00:00
David Majnemer 1bf0f8ede6 [MS Compat] Add support for __declspec(noalias)
The attribute '__declspec(noalias)' communicates that the function only
accesses memory pointed to by its pointer-typed arguments.

llvm-svn: 242728
2015-07-20 22:51:52 +00:00
Yunzhong Gao d65200cbfd Fix quoting of #pragma comment for PS4.
This is the PS4 counterpart to r229376, which quotes the library name if the
name contains space. It was discovered that if a library name contains both
double-quote and space characters, quoting the name might produce unexpected
results, but we are mostly concerned with a Windows host environment, which
does not allow double-quote or slashes in file/folder names.

Differential Revision: http://reviews.llvm.org/D11275

llvm-svn: 242689
2015-07-20 17:46:56 +00:00
Benjamin Kramer b596056413 [CodeGen] Flip lanes when lowering __builtin_palignr with one lane
Otherwise we'd pick the wrong lane for the resulting shuffle and
miscompile code. PR24187.

llvm-svn: 242678
2015-07-20 15:31:17 +00:00
Alexey Bataev 91e5860fad [X86, inlineasm] Improve analysis of x,Y0,Yi,Ym,Yt,L,e,Z,s asm constraints (patch by Alexey Frolov)
Improve Sema checking of 9 existing inline asm constraints (‘x’, ‘Y*’, ‘L’, ‘e’, ‘Z’, ‘s’).
Differential Revision: http://reviews.llvm.org/D10536

llvm-svn: 242665
2015-07-20 12:08:00 +00:00
Asaf Badouh d4419ca657 [X86][AVX512BW] add clang intrinsics for pmulhrsw / pmulhuw / pmulhw
also made minor fix in "test_mm512_maskz_permutex2var_epi16"

Differential Revision: http://reviews.llvm.org/D11336

llvm-svn: 242635
2015-07-19 08:47:31 +00:00
Steven Wu 3db51cbc21 Fix test case in r242565
llvm-svn: 242571
2015-07-17 20:49:01 +00:00
Steven Wu 546a19628b Fix -save-temp when using objc-arc, sanitizer and profiling
Currently, -save-temp will cause ObjCARC optimization to be dropped,
sanitizer pass to run early in the pipeline, and profiling
instrumentation to run twice.
Fix the issue by properly disable all passes in the optimization
pipeline when generating bitcode output and parse some of the Language
Options even when the input is bitcode so the passes can be setup
correctly.

llvm-svn: 242565
2015-07-17 20:09:56 +00:00
Aaron Ballman 7572e58b66 Disable #pragma redefine_extname for C++ code as it does not make sense in such a context.
Patch by Andrey Bokhanko!

llvm-svn: 242420
2015-07-16 17:06:53 +00:00
Akira Hatanaka 580efb2475 [ARM] Pass subtarget feature "+no-movt" instead of passing backend option
"-arm-use-movt=0".
        
This change is needed since backend options do not make it to the backend
when doing LTO and are not capable of changing the behavior of code-gen
passes on a per-function basis.

rdar://problem/21529937

Differential Revision: http://reviews.llvm.org/D11025

llvm-svn: 242368
2015-07-16 00:43:00 +00:00
Bill Schmidt f4aa8fe4aa [PPC64] Update tests for vec_sld
Revision 224297 modified the behavior of vec_sld for little endian so
that LLVM will generate the correct corresponding vsldoi instruction.
I neglected to update the existing tests, which continued to pass
because they were not specific enough.  This patch adds enough
specificity to the tests to make them useful for BE and LE testing of
vec_sld.

llvm-svn: 242313
2015-07-15 18:55:02 +00:00
Nemanja Ivanovic 6c363ed67a Add missing builtins to altivec.h for ABI compliance (vol. 4)
This patch corresponds to review:
http://reviews.llvm.org/D11184

A number of new interfaces for altivec.h (as mandated by the ABI):
vector float vec_cpsgn(vector float, vector float)
vector double vec_cpsgn(vector double, vector double)
vector double vec_or(vector bool long long, vector double)
vector double vec_or(vector double, vector bool long long)
vector double vec_re(vector double)
vector signed char vec_cntlz(vector signed char)
vector unsigned char vec_cntlz(vector unsigned char)
vector short vec_cntlz(vector short)
vector unsigned short vec_cntlz(vector unsigned short)
vector int vec_cntlz(vector int)
vector unsigned int vec_cntlz(vector unsigned int)
vector signed long long vec_cntlz(vector signed long long)
vector unsigned long long vec_cntlz(vector unsigned long long)
vector signed char vec_nand(vector bool signed char, vector signed char)
vector signed char vec_nand(vector signed char, vector bool signed char)
vector signed char vec_nand(vector signed char, vector signed char)
vector unsigned char vec_nand(vector bool unsigned char, vector unsigned char)
vector unsigned char vec_nand(vector unsigned char, vector bool unsigned char)
vector unsigned char vec_nand(vector unsigned char, vector unsigned char)
vector short vec_nand(vector bool short, vector short)
vector short vec_nand(vector short, vector bool short)
vector short vec_nand(vector short, vector short)
vector unsigned short vec_nand(vector bool unsigned short, vector unsigned short)
vector unsigned short vec_nand(vector unsigned short, vector bool unsigned short)
vector unsigned short vec_nand(vector unsigned short, vector unsigned short)
vector int vec_nand(vector bool int, vector int)
vector int vec_nand(vector int, vector bool int)
vector int vec_nand(vector int, vector int)
vector unsigned int vec_nand(vector bool unsigned int, vector unsigned int)
vector unsigned int vec_nand(vector unsigned int, vector bool unsigned int)
vector unsigned int vec_nand(vector unsigned int, vector unsigned int)
vector signed long long vec_nand(vector bool long long, vector signed long long)
vector signed long long vec_nand(vector signed long long, vector bool long long)
vector signed long long vec_nand(vector signed long long, vector signed long long)
vector unsigned long long vec_nand(vector bool long long, vector unsigned long long)
vector unsigned long long vec_nand(vector unsigned long long, vector bool long long)
vector unsigned long long vec_nand(vector unsigned long long, vector unsigned long long)
vector signed char vec_orc(vector bool signed char, vector signed char)
vector signed char vec_orc(vector signed char, vector bool signed char)
vector signed char vec_orc(vector signed char, vector signed char)
vector unsigned char vec_orc(vector bool unsigned char, vector unsigned char)
vector unsigned char vec_orc(vector unsigned char, vector bool unsigned char)
vector unsigned char vec_orc(vector unsigned char, vector unsigned char)
vector short vec_orc(vector bool short, vector short)
vector short vec_orc(vector short, vector bool short)
vector short vec_orc(vector short, vector short)
vector unsigned short vec_orc(vector bool unsigned short, vector unsigned short)
vector unsigned short vec_orc(vector unsigned short, vector bool unsigned short)
vector unsigned short vec_orc(vector unsigned short, vector unsigned short)
vector int vec_orc(vector bool int, vector int)
vector int vec_orc(vector int, vector bool int)
vector int vec_orc(vector int, vector int)
vector unsigned int vec_orc(vector bool unsigned int, vector unsigned int)
vector unsigned int vec_orc(vector unsigned int, vector bool unsigned int)
vector unsigned int vec_orc(vector unsigned int, vector unsigned int)
vector signed long long vec_orc(vector bool long long, vector signed long long)
vector signed long long vec_orc(vector signed long long, vector bool long long)
vector signed long long vec_orc(vector signed long long, vector signed long long)
vector unsigned long long vec_orc(vector bool long long, vector unsigned long long)
vector unsigned long long vec_orc(vector unsigned long long, vector bool long long)
vector unsigned long long vec_orc(vector unsigned long long, vector unsigned long long)
vector signed char vec_div(vector signed char, vector signed char)
vector unsigned char vec_div(vector unsigned char, vector unsigned char)
vector signed short vec_div(vector signed short, vector signed short)
vector unsigned short vec_div(vector unsigned short, vector unsigned short)
vector signed int vec_div(vector signed int, vector signed int)
vector unsigned int vec_div(vector unsigned int, vector unsigned int)
vector signed long long vec_div(vector signed long long, vector signed long long)
vector unsigned long long vec_div(vector unsigned long long, vector unsigned long long)
vector unsigned char vec_mul(vector unsigned char, vector unsigned char)
vector unsigned int vec_mul(vector unsigned int, vector unsigned int)
vector unsigned long long vec_mul(vector unsigned long long, vector unsigned long long)
vector unsigned short vec_mul(vector unsigned short, vector unsigned short)
vector signed char vec_mul(vector signed char, vector signed char)
vector signed int vec_mul(vector signed int, vector signed int)
vector signed long long vec_mul(vector signed long long, vector signed long long)
vector signed short vec_mul(vector signed short, vector signed short)
vector signed long long vec_mergeh(vector signed long long, vector signed long long)
vector signed long long vec_mergeh(vector signed long long, vector bool long long)
vector signed long long vec_mergeh(vector bool long long, vector signed long long)
vector unsigned long long vec_mergeh(vector unsigned long long, vector unsigned long long)
vector unsigned long long vec_mergeh(vector unsigned long long, vector bool long long)
vector unsigned long long vec_mergeh(vector bool long long, vector unsigned long long)
vector double vec_mergeh(vector double, vector double)
vector double vec_mergeh(vector double, vector bool long long)
vector double vec_mergeh(vector bool long long, vector double)
vector signed long long vec_mergel(vector signed long long, vector signed long long)
vector signed long long vec_mergel(vector signed long long, vector bool long long)
vector signed long long vec_mergel(vector bool long long, vector signed long long)
vector unsigned long long vec_mergel(vector unsigned long long, vector unsigned long long)
vector unsigned long long vec_mergel(vector unsigned long long, vector bool long long)
vector unsigned long long vec_mergel(vector bool long long, vector unsigned long long)
vector double vec_mergel(vector double, vector double)
vector double vec_mergel(vector double, vector bool long long)
vector double vec_mergel(vector bool long long, vector double)
vector signed int vec_pack(vector signed long long, vector signed long long)
vector unsigned int vec_pack(vector unsigned long long, vector unsigned long long)
vector bool int vec_pack(vector bool long long, vector bool long long)

llvm-svn: 242171
2015-07-14 17:50:27 +00:00
Asaf Badouh 1626545667 [x86] add 2 bit to ObjCOrBuiltinID and new intrinsics
add 2 bit to ObjCOrBuiltinID (changed from 11bits to 13bits), see discussion in
Add new intrinsics support that already covered by the BE.
All the intrinsics are covered by tests

Differential Revision: http://reviews.llvm.org/D10893

llvm-svn: 242144
2015-07-14 14:02:45 +00:00
David Majnemer c0c42f3dea [MS ABI] Don't generates code for unreferenced inline definitions of library builtins
We should only consider declarations which were written, implicit
declarations shouldn't be considered.

This fixes PR24084.

llvm-svn: 241941
2015-07-10 20:55:38 +00:00
Akira Hatanaka 10bdb2b144 [inlineasm] Attach readonly and readnone to inline-asm instructions.
Previously, clang/llvm treated inline-asm instructions conservatively,
choosing not to eliminate the instructions or hoisting them out of a loop
even when it was safe to do so. This commit makes changes to attach a
readonly or readnone attribute to an inline-asm instruction, which enables
passes such as LICM and EarlyCSE to move or optimize away the instruction.

rdar://problem/11358192

Differential Revision: http://reviews.llvm.org/D10546

llvm-svn: 241930
2015-07-10 18:44:40 +00:00
Ulrich Weigand 03ce2a16bf Respect alignment of nested bitfields
tools/clang/test/CodeGen/packed-nest-unpacked.c contains this test:

struct XBitfield {
  unsigned b1 : 10;
  unsigned b2 : 12;
  unsigned b3 : 10;
};
struct YBitfield {
  char x;
  struct XBitfield y;
} __attribute((packed));
struct YBitfield gbitfield;

unsigned test7() {
  // CHECK: @test7
  // CHECK: load i32, i32* getelementptr inbounds (%struct.YBitfield, %struct.YBitfield* @gbitfield, i32 0, i32 1, i32 0), align 4
  return gbitfield.y.b2;
}

The "align 4" is actually wrong.  Accessing all of "gbitfield.y" as a single
i32 is of course possible, but that still doesn't make it 4-byte aligned as
it remains packed at offset 1 in the surrounding gbitfield object.

This alignment was changed by commit r169489, which also introduced changes
to bitfield access code in CGExpr.cpp.  Code before that change used to take
into account *both* the alignment of the field to be accessed within the
current struct, *and* the alignment of that outer struct itself; this logic
was removed by the above commit.

Neglecting to consider both values can cause incorrect code to be generated
(I've seen an unaligned access crash on SystemZ due to this bug).

In order to always use the best known alignment value, this patch removes
the CGBitFieldInfo::StorageAlignment member and replaces it with a
StorageOffset member specifying the offset from the start of the surrounding
struct to the bitfield's underlying storage.  This offset can then be combined
with the best-known alignment for a bitfield access lvalue to determine the
alignment to use when accessing the bitfield's storage.

Differential Revision: http://reviews.llvm.org/D11034

llvm-svn: 241916
2015-07-10 17:30:00 +00:00
Nemanja Ivanovic 26c3534b84 Add missing builtins to altivec.h for ABI compliance (vol. 3)
This patch corresponds to review:
http://reviews.llvm.org/D10972

Fix for the handling of dependent features that are enabled by default
on some CPU's (such as -mvsx, -mpower8-vector).

Also provides a number of new interfaces or fixes existing ones in
altivec.h.

Changed signatures to conform to ABI:
vector short vec_perm(vector signed short, vector signed short, vector unsigned char)
vector int vec_perm(vector signed int, vector signed int, vector unsigned char)
vector long long vec_perm(vector signed long long, vector signed long long, vector unsigned char)
vector signed char vec_sld(vector signed char, vector signed char, const int)
vector unsigned char vec_sld(vector unsigned char, vector unsigned char, const int)
vector bool char vec_sld(vector bool char, vector bool char, const int)
vector unsigned short vec_sld(vector unsigned short, vector unsigned short, const int)
vector signed short vec_sld(vector signed short, vector signed short, const int)
vector signed int vec_sld(vector signed int, vector signed int, const int)
vector unsigned int vec_sld(vector unsigned int, vector unsigned int, const int)
vector float vec_sld(vector float, vector float, const int)
vector signed char vec_splat(vector signed char, const int)
vector unsigned char vec_splat(vector unsigned char, const int)
vector bool char vec_splat(vector bool char, const int)
vector signed short vec_splat(vector signed short, const int)
vector unsigned short vec_splat(vector unsigned short, const int)
vector bool short vec_splat(vector bool short, const int)
vector pixel vec_splat(vector pixel, const int)
vector signed int vec_splat(vector signed int, const int)
vector unsigned int vec_splat(vector unsigned int, const int)
vector bool int vec_splat(vector bool int, const int)
vector float vec_splat(vector float, const int)

Added a VSX path to:
vector float vec_round(vector float)

Added interfaces:
vector signed char vec_eqv(vector signed char, vector signed char)
vector signed char vec_eqv(vector bool char, vector signed char)
vector signed char vec_eqv(vector signed char, vector bool char)
vector unsigned char vec_eqv(vector unsigned char, vector unsigned char)
vector unsigned char vec_eqv(vector bool char, vector unsigned char)
vector unsigned char vec_eqv(vector unsigned char, vector bool char)
vector signed short vec_eqv(vector signed short, vector signed short)
vector signed short vec_eqv(vector bool short, vector signed short)
vector signed short vec_eqv(vector signed short, vector bool short)
vector unsigned short vec_eqv(vector unsigned short, vector unsigned short)
vector unsigned short vec_eqv(vector bool short, vector unsigned short)
vector unsigned short vec_eqv(vector unsigned short, vector bool short)
vector signed int vec_eqv(vector signed int, vector signed int)
vector signed int vec_eqv(vector bool int, vector signed int)
vector signed int vec_eqv(vector signed int, vector bool int)
vector unsigned int vec_eqv(vector unsigned int, vector unsigned int)
vector unsigned int vec_eqv(vector bool int, vector unsigned int)
vector unsigned int vec_eqv(vector unsigned int, vector bool int)
vector signed long long vec_eqv(vector signed long long, vector signed long long)
vector signed long long vec_eqv(vector bool long long, vector signed long long)
vector signed long long vec_eqv(vector signed long long, vector bool long long)
vector unsigned long long vec_eqv(vector unsigned long long, vector unsigned long long)
vector unsigned long long vec_eqv(vector bool long long, vector unsigned long long)
vector unsigned long long vec_eqv(vector unsigned long long, vector bool long long)
vector float vec_eqv(vector float, vector float)
vector float vec_eqv(vector bool int, vector float)
vector float vec_eqv(vector float, vector bool int)
vector double vec_eqv(vector double, vector double)
vector double vec_eqv(vector bool long long, vector double)
vector double vec_eqv(vector double, vector bool long long)
vector bool long long vec_perm(vector bool long long, vector bool long long, vector unsigned char)
vector double vec_round(vector double)
vector double vec_splat(vector double, const int)
vector bool long long vec_splat(vector bool long long, const int)
vector signed long long vec_splat(vector signed long long, const int)
vector unsigned long long vec_splat(vector unsigned long long,
vector bool int vec_sld(vector bool int, vector bool int, const int)
vector bool short vec_sld(vector bool short, vector bool short, const int)

llvm-svn: 241904
2015-07-10 13:11:34 +00:00
Ulrich Weigand 6e2cea6f0c Respect alignment when loading up a coerced function argument
Code in CGCall.cpp that loads up function arguments that need to be
coerced to a different type may in some cases ignore the fact that
the source of the argument is not naturally aligned. This may cause
incorrect code to be generated. In some places in CreateCoercedLoad,
we already have setAlignment calls to address this, but I ran into one
where it was missing, causing wrong code generation on SystemZ.

However, in that location, we do not actually know what alignment of
the source location we can rely on; the callers do not pass anything
to this routine. This is already an issue in other places in
CreateCoercedLoad; and the same problem exists for CreateCoercedStore.

To avoid pessimising code, and to fix the FIXMEs already in place,
this patch also adds an alignment argument to the CreateCoerced*
routines and uses it instead of forcing an alignment of 1. The
callers are changed to pass in the best information they have.

This actually requires changes in a number of existing test cases
since we now get better alignment in many places.

Differential Revision: http://reviews.llvm.org/D11033

llvm-svn: 241898
2015-07-10 11:31:43 +00:00
Reid Kleckner 8819a4065f Re-enable 32-bit SEH after the alignment fix
llvm-svn: 241878
2015-07-10 00:16:25 +00:00
Reid Kleckner e7844ea7f8 Disable 32-bit SEH, again
Move the diagnostic back to codegen so that we can compile ATL on the
self-host bot. We don't actually end up emitting code for the __try, so
the diagnostic won't be hit.

llvm-svn: 241761
2015-07-08 23:57:03 +00:00
Reid Kleckner 338635389f [SEH] Re-enable SEH on x86 Windows after r241699
llvm-svn: 241704
2015-07-08 18:27:10 +00:00
Adrian Prantl bc068586ac Revert "Revert r241620 and follow-up commits" and move the initialization
of the llvm targets from clang/CodeGen into ClangCheck.cpp and CIndex.cpp.

llvm-svn: 241653
2015-07-08 01:00:30 +00:00
Reid Kleckner 15d152d3ac [SEH] Switch from frameaddress(0) to localaddress
This should do the right thing for stack realignment prologues.

llvm-svn: 241644
2015-07-07 23:23:31 +00:00
Adrian Prantl 142ec39739 Revert r241620 and follow-up commits while investigating linux buildbot failures.
llvm-svn: 241642
2015-07-07 23:19:46 +00:00
Reid Kleckner 98cb8ba64c Update clang for intrinsic rename of framerecover to localrecover
llvm-svn: 241634
2015-07-07 22:26:07 +00:00
Adrian Prantl e50371b948 Wrap clang modules and pch files in an object file container.
This patch adds ObjectFilePCHContainerOperations uses the LLVM backend
to put the contents of a PCH into a __clangast section inside a COFF, ELF,
or Mach-O object file container.

This is done to facilitate module debugging by makeing it possible to
store the debug info for the types defined by a module alongside the AST.

rdar://problem/20091852

llvm-svn: 241620
2015-07-07 20:11:29 +00:00
Akira Hatanaka 3fb33a5d18 [ARM] Pass subtarget feature "+long-calls" instead of passing backend option
"-arm-long-calls".

This change allows using -mlong-calls/-mno-long-calls for LTO and enabling or
disabling long call on a per-function basis.

rdar://problem/21529937

Differential Revision: http://reviews.llvm.org/D9414

llvm-svn: 241565
2015-07-07 06:42:05 +00:00
Adrian Prantl 3d2c051cf6 Debug info: Emit distinct __block_literal_generic types for blocks with
different function signatures. (Previously clang would emit all block
pointer types with the type of the first block pointer in the compile
unit.)

rdar://problem/21602473

llvm-svn: 241534
2015-07-07 00:49:35 +00:00
Reid Kleckner 9fe7f2396b Revert "Revert 241171, 241187, 241199 (32-bit SEH)."
This reverts commit r241244, but restricts SEH support to Win64.

This way, Chromium builds will still fall back on TUs with SEH, and
Clang developers can work on this incrementally upstream while patching
this small predicate locally. It'll also make it easier to review small
fixes.

llvm-svn: 241533
2015-07-07 00:36:30 +00:00
Eric Christopher af4d608d13 Handle arbitrary whitespace in the target attribute support.
This allows us to deal a bit more gracefully with inclusions done
by macros, token pasting, or just code layout/formatting.

llvm-svn: 241525
2015-07-06 23:51:59 +00:00
Adrian Prantl 498fff661d Debug info: Don't emit a bogus location for the global block pointer type
(__block_literal_generic).

The arbitrary nature of the location confuses lldb and prevents type
uniquing.

rdar://problem/21602473

llvm-svn: 241511
2015-07-06 21:31:35 +00:00
Teresa Johnson 8749d80431 Resubmit "Pass down the -flto option to the -cc1 job" (r239481)
The patch is the same except for the addition of a new test for the
issue that required reverting the dependent llvm commit.

--Original Commit Message--

Pass down the -flto option to the -cc1 job, and from there into the
CodeGenOptions and onto the PassManagerBuilder. This enables gating
the new EliminateAvailableExternally module pass on whether we are
preparing for LTO.

If we are preparing for LTO (e.g. a -flto -c compile), the new pass is not
included as we want to preserve available externally functions for possible
link time inlining.

llvm-svn: 241467
2015-07-06 16:23:00 +00:00
NAKAMURA Takumi 86042f1d2e clang/test/CodeGen/builtins-ppc-vsx.c: Fix for -Asserts.
llvm-svn: 241401
2015-07-05 08:37:54 +00:00
Nemanja Ivanovic 1c7ad715ec Add missing builtins to altivec.h for ABI compliance (vol. 2)
This patch corresponds to review:
http://reviews.llvm.org/D10875

The bulk of the second round of additions to altivec.h.
The following interfaces were added:
vector double vec_floor(vector double)
vector double vec_madd(vector double, vector double, vector double)
vector float vec_msub(vector float, vector float, vector float)
vector double vec_msub(vector double, vector double, vector double)
vector float vec_mul(vector float, vector float)
vector double vec_mul(vector double, vector double)
vector float vec_nmadd(vector float, vector float, vector float)
vector double vec_nmadd(vector double, vector double, vector double)
vector double vec_nmsub(vector double, vector double, vector double)
vector double vec_nor(vector double, vector double)
vector double vec_or(vector double, vector double)
vector float vec_rint(vector float)
vector double vec_rint(vector double)
vector float vec_nearbyint(vector float)
vector double vec_nearbyint(vector double)
vector float vec_sqrt(vector float)
vector double vec_sqrt(vector double)
vector double vec_rsqrte(vector double)
vector double vec_sel(vector double, vector double, vector unsigned long long)
vector double vec_sel(vector double, vector double, vector unsigned long long)
vector double vec_sub(vector double, vector double)
vector double vec_trunc(vector double)
vector double vec_xor(vector double, vector double)
vector double vec_xor(vector double, vector bool long long)
vector double vec_xor(vector bool long long, vector double)

New VSX paths for the following interfaces:
vector float vec_madd(vector float, vector float, vector float)
vector float vec_nmsub(vector float, vector float, vector float)
vector float vec_rsqrte(vector float)
vector float vec_trunc(vector float)
vector float vec_floor(vector float)

llvm-svn: 241399
2015-07-05 06:40:52 +00:00