1f17bf6171
Correct function comments.
...
llvm-svn: 47606
2008-02-26 17:50:59 +00:00
80d6b87934
De-tabify
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llvm-svn: 47600
2008-02-26 10:57:23 +00:00
69a10f4112
Add support for intermodule tail calls on x86/32bit with
...
GOT-style position independent code. Before only tail calls to
protected/hidden functions within the same module were optimized.
Now all function calls are tail call optimized.
llvm-svn: 47594
2008-02-26 10:21:54 +00:00
b01b99ec78
Change the lowering of arguments for tail call optimized
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calls. Before arguments that could overwrite each other were
explicitly lowered to a stack slot, not giving the register allocator
a chance to optimize. Now a sequence of copyto/copyfrom virtual
registers ensures that arguments are loaded in (virtual) registers
before they are lowered to the stack slot (and might overwrite each
other). Also parameter stack slots are marked mutable for
(potentially) tail calling functions.
llvm-svn: 47593
2008-02-26 09:19:59 +00:00
a790af3a88
Revert the assert for MUL_LOHI with an unused high result; Chris
...
pointed out that this isn't correct at -O0.
llvm-svn: 47575
2008-02-25 22:43:48 +00:00
65b404d61c
Revise previous patch per review.
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llvm-svn: 47573
2008-02-25 22:29:22 +00:00
0be2f3b941
Add an assert to verify that we don't see an
...
{S,U}MUL_LOHI with an unused high value.
llvm-svn: 47569
2008-02-25 22:15:55 +00:00
2ff975e749
Remove the hack that turned an {S,U}MUL_LOHI with an unused high
...
result into a MUL late in the X86 codegen process. ISD::MUL is
once again Legal on X86, so this is no longer needed. And, the
hack was suboptimal; see PR1874 for details.
llvm-svn: 47567
2008-02-25 21:57:04 +00:00
1f372edd97
Convert MaskedValueIsZero and all its users to use APInt. Also add
...
a SignBitIsZero function to simplify a common use case.
llvm-svn: 47561
2008-02-25 21:11:39 +00:00
32d84b1772
Expand removal of MMX memory copies to allow 1 level
...
of TokenFactor underneath chain (seems to be enough)
llvm-svn: 47554
2008-02-25 19:20:14 +00:00
42cb72e52c
Turning on remat of pic loads.
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llvm-svn: 47524
2008-02-23 02:07:42 +00:00
4d17671997
No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case.
...
llvm-svn: 47522
2008-02-23 01:47:44 +00:00
09f410b6d7
Split ParameterAttributes.h, putting the complicated
...
stuff into ParamAttrsList.h. Per feedback from
ParamAttrs changes.
llvm-svn: 47504
2008-02-22 22:17:59 +00:00
eac159c1f0
MMX vectors are passed 4-byte aligned.
...
llvm-svn: 47483
2008-02-22 17:47:28 +00:00
94ba37f8e3
Allow re-materialization of pic load (controlled by -remat-pic-load for now).
...
llvm-svn: 47476
2008-02-22 09:25:47 +00:00
ab8bfc28c8
copy mmx values from/to memory with GPRs on x86-32
...
instead of with mmx registers. This horribleness is apparently
done by gcc to avoid having to insert emms in places that really
should have it. This is the second half of rdar://5741668.
llvm-svn: 47474
2008-02-22 05:18:04 +00:00
997b3a65ca
Start using GPR's to copy around mmx value instead of mmx regs.
...
GCC apparently does this, and code depends on not having to do
emms when this happens. This is x86-64 only so far, second half
should handle x86-32.
rdar://5741668
llvm-svn: 47470
2008-02-22 02:09:43 +00:00
5d8fa828f1
A few minor updates, removing implemented stuff and adding a couple of
...
new things.
llvm-svn: 47458
2008-02-21 21:16:49 +00:00
e86c91f5b2
Dan implemented one multiply issue. Replace it with another. :)
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llvm-svn: 47431
2008-02-21 06:51:29 +00:00
95528943e9
Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet
...
llvm-svn: 47430
2008-02-21 06:45:13 +00:00
b6b69208ba
Poorly named option.
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llvm-svn: 47400
2008-02-20 20:57:32 +00:00
18991d78fa
Fix newly-introduced 4.3 warnings
...
llvm-svn: 47375
2008-02-20 12:07:57 +00:00
40d67c59d5
Remove bunch of gcc 4.3-related warnings from Target
...
llvm-svn: 47369
2008-02-20 11:22:39 +00:00
579f07135a
Unbreak build with gcc 4.3: provide missed includes and silence most annoying warnings.
...
llvm-svn: 47367
2008-02-20 11:08:44 +00:00
7626ab33d8
Disable for now. This is pessimizing code.
...
llvm-svn: 47354
2008-02-20 02:29:17 +00:00
5ce8dd93ef
Add hidden option -x86-fold-and-in-test to test the effect the test / and folding change.
...
llvm-svn: 47351
2008-02-19 23:36:51 +00:00
97b9662f78
Don't fold and's into test instructions if they have multiple uses.
...
This compiles test-nofold.ll into:
_test:
movl $15, %ecx
andl 4(%esp), %ecx
testl %ecx, %ecx
movl $42, %eax
cmove %ecx, %eax
ret
instead of:
_test:
movl 4(%esp), %eax
movl %eax, %ecx
andl $15, %ecx
testl $15, %eax
movl $42, %eax
cmove %ecx, %eax
ret
llvm-svn: 47330
2008-02-19 17:37:35 +00:00
3b56f506e7
Me not like duplicated comments.
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llvm-svn: 47300
2008-02-19 02:05:16 +00:00
6200c225e0
- When DAG combiner is folding a bit convert into a BUILD_VECTOR, it should check if it's essentially a SCALAR_TO_VECTOR. Avoid turning (v8i16) <10, u, u, u> to <10, 0, u, u, u, u, u, u>. Instead, simply convert it to a SCALAR_TO_VECTOR of the proper type.
...
- X86 now normalize SCALAR_TO_VECTOR to (BIT_CONVERT (v4i32 SCALAR_TO_VECTOR)). Get rid of X86ISD::S2VEC.
llvm-svn: 47290
2008-02-18 23:04:32 +00:00
c589243107
Chris pointed out that it's not necessary to set i64 MUL to Expand
...
on x86-32 since i64 itself is not a Legal type. And, update some
comments.
llvm-svn: 47282
2008-02-18 19:34:53 +00:00
a827205670
Add a note about sext from i1 plus flags use.
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llvm-svn: 47278
2008-02-18 18:30:13 +00:00
a589ee11bb
Don't mark scalar integer multiplication as Expand on x86, since x86
...
has plain one-result scalar integer multiplication instructions.
This avoids expanding such instructions into MUL_LOHI sequences that
must be special-cased at isel time, and avoids the problem with that
code that provented memory operands from being folded.
This fixes PR1874, addressesing the most common case. The uncommon
cases of optimizing multiply-high operations will require work
in DAGCombiner.
llvm-svn: 47277
2008-02-18 17:55:26 +00:00
1f6520842c
move PR2053 to here.
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llvm-svn: 47237
2008-02-17 19:43:57 +00:00
fedcf477b5
I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support.
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llvm-svn: 47213
2008-02-16 14:46:26 +00:00
9b254eed32
llvm.memory.barrier, and impl for x86 and alpha
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llvm-svn: 47204
2008-02-16 01:24:58 +00:00
7b1431785b
Handle \n's in value names for more targets. The asm printers
...
really really really need refactoring :(
llvm-svn: 47171
2008-02-15 19:04:54 +00:00
318c41f9e8
If the llvm name contains an unprintable character, don't print it in
...
the global comment. This prevents printing things like:
... # foo
bar
when the name is "foo\nbar".
llvm-svn: 47170
2008-02-15 18:56:05 +00:00
67b818f503
Remove warning about 64-bit code on processor
...
that doesn't support it. Per Chris.
llvm-svn: 47162
2008-02-15 18:09:51 +00:00
401a4d72d5
nocona, core2 and penryn support 64 bit.
...
llvm-svn: 47149
2008-02-15 01:22:41 +00:00
4c95dbd69f
In TargetLowering::LowerCallTo, don't assert that
...
the return value is zero-extended if it isn't
sign-extended. It may also be any-extended.
Also, if a floating point value was returned
in a larger floating point type, pass 1 as the
second operand to FP_ROUND, which tells it
that all the precision is in the original type.
I think this is right but I could be wrong.
Finally, when doing libcalls, set isZExt on
a parameter if it is "unsigned". Currently
isSExt is set when signed, and nothing is
set otherwise. This should be right for all
calls to standard library routines.
llvm-svn: 47122
2008-02-14 17:28:50 +00:00
53e1b3f9d5
Change how FP immediates are handled.
...
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.
This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.
As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.
llvm-svn: 47121
2008-02-14 08:57:00 +00:00
eb63b09206
upgrade some entries, remove stuff that is done.
...
llvm-svn: 47109
2008-02-14 06:19:02 +00:00
5bc0957f5b
the mid-level optimizer removes this stuff.
...
llvm-svn: 47108
2008-02-14 05:43:18 +00:00
b43983b274
this one is easy.
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llvm-svn: 47107
2008-02-14 05:41:38 +00:00
3bd37f549a
This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
...
llvm-svn: 47106
2008-02-14 05:39:46 +00:00
9ca025f1dc
Assigning an APInt to 0 with plain assignment gives it a one-bit
...
size. Initialize these APInts to properly-sized zero values.
llvm-svn: 47099
2008-02-13 23:07:24 +00:00
e1d9ee66ed
Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
...
to pass the mask APInt by value, not by reference.
llvm-svn: 47096
2008-02-13 22:28:48 +00:00
21ad494f67
Enable exception handling int JIT
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llvm-svn: 47079
2008-02-13 18:39:37 +00:00
eea32990a9
readme updates
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llvm-svn: 47051
2008-02-13 07:06:12 +00:00
244183ef0d
commuteInstr() can now commute non-ssa machine instrs.
...
llvm-svn: 47043
2008-02-13 02:46:49 +00:00
Arnold Schwaighofer