Commit Graph

61 Commits

Author SHA1 Message Date
Alkis Evlogimenos c794a9060f Refactor VirtRegMap out of RegAllocLinearScan as the first part of bug
251 (providing a generic machine code rewriter/spiller).

llvm-svn: 11780
2004-02-23 23:08:11 +00:00
Alkis Evlogimenos 52de9e214c Add number of spilled registers statistic.
llvm-svn: 11759
2004-02-23 18:45:32 +00:00
Alkis Evlogimenos d780ce6462 Remove implementation of default constructor as it is useless now.
llvm-svn: 11755
2004-02-23 18:28:35 +00:00
Alkis Evlogimenos f83cb74b57 Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr
llvm-svn: 11738
2004-02-23 06:10:13 +00:00
Alkis Evlogimenos d42c2f24ec Fix comments in PhysRegTracker and rename isPhysRegAvail to isRegAvail to be consistent with the other two
llvm-svn: 11723
2004-02-23 01:25:05 +00:00
Alkis Evlogimenos 1410859484 Pull PhysRegTracker out of RegAllocLinearScan as it can be used by other allocators as well
llvm-svn: 11720
2004-02-23 00:53:31 +00:00
Alkis Evlogimenos 486b12b71a Move LiveIntervals.h to lib/CodeGen since it shouldn't be exposed to other parts of the compiler
llvm-svn: 11719
2004-02-23 00:50:15 +00:00
Alkis Evlogimenos cb352300c9 Print basic block boundaries in machine instruction debug output.
llvm-svn: 11704
2004-02-22 05:46:04 +00:00
Alkis Evlogimenos 22de21ea80 Fix crash in debug output.
llvm-svn: 11659
2004-02-20 06:41:12 +00:00
Alkis Evlogimenos bcc99a83ee Fix instruction numbering in debug output.
llvm-svn: 11655
2004-02-20 06:29:51 +00:00
Alkis Evlogimenos 76eca062ea Too many changes in one commit:
1. LiveIntervals now implement a 4 slot per instruction model. Load,
   Use, Def and a Store slot. This is required in order to correctly
   represent caller saved register clobbering on function calls,
   register reuse in the same instruction (def resues last use) and
   also spill code added later by the allocator. The previous
   representation (2 slots per instruction) was insufficient and as a
   result was causing subtle bugs.

2. Fixes in spill code generation. This was the major cause of
   failures in the test suite.

3. Linear scan now has core support for folding memory operands. This
   is untested and not enabled (the live interval update function does
   not attempt to fold loads/stores in instructions).

4. Lots of improvements in the debugging output of both live intervals
   and linear scan. Give it a try... it is beautiful :-)

In summary the above fixes all the issues with the recent reserved
register elimination changes and get the allocator very close to the
next big step: folding memory operands.

llvm-svn: 11654
2004-02-20 06:15:40 +00:00
Alkis Evlogimenos 3cf546037e Fix RA::verifyAssignment()
llvm-svn: 11629
2004-02-19 19:24:17 +00:00
Alkis Evlogimenos d0a60b71fc Rename reloads/spills to loads/stores.
llvm-svn: 11619
2004-02-19 06:19:09 +00:00
Alkis Evlogimenos b490a12501 Implement assignment correctness verification.
llvm-svn: 11609
2004-02-18 23:15:23 +00:00
Alkis Evlogimenos 2c5ddd20ba Eliminate the use of spill (reserved) registers.
llvm-svn: 11476
2004-02-15 10:24:21 +00:00
Alkis Evlogimenos ddcb4ad53e Use std::numeric_limits<float>::infinity() instead of
std::numeric_limits<float>::max() for weighting preallocated
intervals.

llvm-svn: 11427
2004-02-14 00:44:07 +00:00
Alkis Evlogimenos 8cdd0215bf Remove getAllocatedRegNum(). Use getReg() instead.
llvm-svn: 11393
2004-02-13 21:01:20 +00:00
Alkis Evlogimenos 80da865f77 Change MachineBasicBlock's vector of MachineInstr pointers into an
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340
2004-02-12 02:27:10 +00:00
Chris Lattner 5dd5be3ec3 Do not use MachineOperand::isVirtualRegister either!
llvm-svn: 11283
2004-02-10 21:12:22 +00:00
Alkis Evlogimenos e82a70766e Increase code clarity.
llvm-svn: 11151
2004-02-06 18:08:18 +00:00
Alkis Evlogimenos cd2e7ffcc6 Eliminate uneeded lookups by passing a Virt2PhysMap::iterator instead
of the virtual register to certain functions.

llvm-svn: 11143
2004-02-06 03:15:40 +00:00
Alkis Evlogimenos 327426411e Modify the two address instruction pass to remove the duplicate
operand of the instruction and thus simplify the register allocation.

llvm-svn: 11124
2004-02-04 22:17:40 +00:00
Alkis Evlogimenos 3d100ef0ca When an instruction like: A += B had both A and B virtual registers
spilled, A was loaded from its stack location twice. This fixes the bug.

llvm-svn: 11093
2004-02-03 01:13:07 +00:00
Alkis Evlogimenos 6e34205653 Fix debugging output.
llvm-svn: 11088
2004-02-02 22:00:32 +00:00
Alkis Evlogimenos 2cecace9b2 Create an object for tracking physical register usage. This will look
much better when I get rid of the reserved registers.

llvm-svn: 11066
2004-02-02 07:30:36 +00:00
Alkis Evlogimenos 9b9c0485fd Change weight array into a vector and make it as big as the number of
registers (not as the max number of registers).

Change toSpill from a std::set into a std::vector<bool>.

Use the reverse iterator adapter to do a reverse scan of allocatable
registers.

llvm-svn: 11061
2004-02-01 20:13:26 +00:00
Alkis Evlogimenos 5e05a59bf8 Use std::map::count() instead of std::map::find() != std::map::end()
where appropriate.

llvm-svn: 11060
2004-02-01 18:39:53 +00:00
Alkis Evlogimenos 91dcc03c39 Use MRegisterInfo::isPhysicalRegister and
MRegisterInfo::isVirtualRegister.

llvm-svn: 11045
2004-02-01 01:27:01 +00:00
Alkis Evlogimenos 73df113676 Add option to join live intervals. Two intervals are joined if there
is a move between two registers, at least one of the registers is
virtual and the two live intervals do not overlap.

This results in about 40% reduction in intervals, 30% decrease in the
register allocators running time and a 20% increase in peephole
optimizations (mainly move eliminations).

The option can be enabled by passing -join-liveintervals where
appropriate.

llvm-svn: 10965
2004-01-22 23:08:45 +00:00
Alkis Evlogimenos e1c24c06f9 Remove unneeded check. An interval in active, by definition overlaps
with the current one.

llvm-svn: 10959
2004-01-22 20:07:18 +00:00
Alkis Evlogimenos 4716d76d22 Improve debugging output. Remove unneeded virtReg->0 mapping when
virtReg lives on the stack. Now a virtual register has an entry in the
virtual->physical map or the virtual->stack slot map but never in
both.

llvm-svn: 10958
2004-01-22 19:24:43 +00:00
Alkis Evlogimenos d844972574 Handle printing of intervals that are not assign to any physical
register yet (2nd try).

llvm-svn: 10896
2004-01-16 20:33:13 +00:00
Alkis Evlogimenos 8672af1cc8 Handle printing of intervals that are not assign to any physical
register yet.

llvm-svn: 10895
2004-01-16 20:29:42 +00:00
Alkis Evlogimenos d86933d21d Fold open interval ends handling into
LiveIntervals::Interval::expiredAt() and simplify regalloc code.

llvm-svn: 10894
2004-01-16 20:17:05 +00:00
Alkis Evlogimenos a0865cec3f Improve debugging output.
llvm-svn: 10834
2004-01-14 00:09:36 +00:00
Alkis Evlogimenos 65bc990bda Indentation and whitespace cleanups.
llvm-svn: 10820
2004-01-13 20:42:08 +00:00
Alkis Evlogimenos 6b1ec75da9 Fix bug introduced by previous commit: check if fixed intervals
overlap before adding their spill weight.

llvm-svn: 10819
2004-01-13 20:37:01 +00:00
Alkis Evlogimenos ae5b3d4f74 Add a separate list of fixed intervals. This improves the running time
of the register allocator as follows:

       before   after
mesa   2.3790  1.5994
vpr    2.6008  1.2078
gcc    1.9840  0.5273
mcf    0.2569  0.0470
eon    1.8468  1.4359
twolf  0.9475  0.2004
burg   1.6807  1.3300
lambda 1.2191  0.3764

Speedups range anyware from 30% to over 400% :-)

llvm-svn: 10712
2004-01-07 09:20:58 +00:00
Alkis Evlogimenos a64d71203e Minor cleanups.
llvm-svn: 10711
2004-01-07 05:31:12 +00:00
Alkis Evlogimenos 9f62b96206 Remove declared but undefined method.
llvm-svn: 10710
2004-01-07 02:29:33 +00:00
Alkis Evlogimenos 2fa1aef707 Remove simple coalescing.
llvm-svn: 10695
2004-01-05 08:24:57 +00:00
Alkis Evlogimenos a158dc8104 Reserve ECX and EDI instead of EBX and EDI. Since EBX is a callee
saved register it has a longer free range than ECX (which is defined
every time there is a fnuction call) which makes ECX a better register
to reserve.

llvm-svn: 10635
2003-12-28 18:03:52 +00:00
Alkis Evlogimenos 43b587d94d Add coalescing to register allocator. A hint is added to each interval
which denotes the register we would like to be assigned to (virtual or
physical). In register allocation, if this hint exists and we can map
it to a physical register (it is either a physical register or it is a
virtual register that already got assigned to a physical one) we use
that register if it is available instead of a random one in the free
pool.

llvm-svn: 10634
2003-12-28 17:58:18 +00:00
Alkis Evlogimenos 2e8c984c58 Improve debugging output when choosing a register to spill.
llvm-svn: 10604
2003-12-24 18:53:31 +00:00
Alkis Evlogimenos 7d7d7e89d4 Change the way free regusters are computed and perform better
allocation in the presence of preallocated intervals.

llvm-svn: 10595
2003-12-23 18:00:33 +00:00
Alkis Evlogimenos 690e1b8de2 Remove verifyIntervals() since it doesn't actually work right now.
llvm-svn: 10570
2003-12-21 20:41:26 +00:00
Alkis Evlogimenos 2665d9c6f9 Change weight into a float so that we can take into account the
nesting level when computing it. Right now the allocator uses:

    w = sum_over_defs_uses( 10 ^ nesting level );

llvm-svn: 10569
2003-12-21 20:19:10 +00:00
Alkis Evlogimenos c09b77ea35 Add support for inactive intervals. This effectively reuses registers
for live ranges that fall into assigned registers' holes.

llvm-svn: 10566
2003-12-21 05:43:40 +00:00
Chris Lattner 8f88cdfa22 Prune some #includes
Add a statistic for # reloads

llvm-svn: 10518
2003-12-18 20:25:31 +00:00
Alkis Evlogimenos e5e2bd6777 Modify linear scan register allocator to use the two-address
instruction pass. This also fixes all remaining bugs for this new
allocator to pass all tests under test/Programs.

llvm-svn: 10515
2003-12-18 13:15:02 +00:00