168a44a70e
[CostModel][X86] Improve extract/insert element costs (PR43605)
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This tries to improve the accuracy of extract/insert element costs by accounting for subvector extraction/insertion for >128-bit vectors and the shuffling of elements to/from the 0'th index.
It also adds INSERTPS for f32 types and PINSR/PEXTR costs for integer types (at the moment we assume the same cost as MOVD/MOVQ - which isn't always true).
Differential Revision: https://reviews.llvm.org/D74976
2020-02-27 15:54:13 +00:00
eaa41e103c
[CostModel][X86] Try to check against common prefixes before using target-specific cpu checks
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SLM/GLM is still a mess so not all of them have been updated yet.
2020-02-24 11:59:07 +00:00
e827fe09b3
[CostModel][X86] Fix constant vector XOP rights shifts
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We'll constant fold these cases so they are as cheap as vector left shift cases.
Noticed while improving funnel shift costs.
llvm-svn: 346760
2018-11-13 16:40:10 +00:00
cd9ccf8824
[CostModel][X86] Split off BtVer2 cost checks
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llvm-svn: 330433
2018-04-20 13:50:33 +00:00
34b397a318
[CostModel][X86] Add some specific cpu targets to the cost models
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We're mostly testing with generic isa attributes, but PR36550 will require testing of specific target's scheduler models as well.
llvm-svn: 330056
2018-04-13 19:30:15 +00:00
60fc843fc6
[CostModel][X86] Regenerate vector shift cost tests with update_analyze_test_checks.py
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llvm-svn: 329400
2018-04-06 15:14:34 +00:00
d0ef9d8e93
[X86][AVX1] Account for cost of extract/insert of 256-bit shifts
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llvm-svn: 303023
2017-05-14 20:52:11 +00:00
de4467b182
[X86][AVX1] Account for cost of extract/insert of 256-bit shifts by splat
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llvm-svn: 303021
2017-05-14 20:02:34 +00:00
aa8dffb69b
[X86][SSE] Account for cost of extract/insert of v32i8 vector shifts
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llvm-svn: 303012
2017-05-14 17:36:07 +00:00
4599eaa09a
[X86][XOP] Account for cost of extract/insert of 256-bit vector shifts
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llvm-svn: 303010
2017-05-14 13:38:53 +00:00
6ed996cdf0
[CostModel][X86] Fix AVX512BW vector shift costs for vXi16 types
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We already have patterns in place to support 128/256-bit shifts without AVX512VL
llvm-svn: 292077
2017-01-15 20:44:00 +00:00
a6c1974e06
[CostModel][X86] Drop separate AVX512VL checks - they match existing AVX512 costs
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Keep the tests though.
llvm-svn: 292076
2017-01-15 20:19:28 +00:00
9b169e3c22
[CostModel][X86] Update vector shift tests to correctly check by non-constant uniform values.
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Use shuffle( scslar_to_vector, zeroinitializer) pattern instead of shuffle( vec, zeroinitializer)
llvm-svn: 292075
2017-01-15 20:10:28 +00:00
5a81fefad3
[X86][AVX512BW] Vectorize v64i8 vector shifts
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Differential Revision: https://reviews.llvm.org/D28447
llvm-svn: 291665
2017-01-11 10:36:51 +00:00
b6d4fa6551
[CostModel][X86] Add AVX512VL vector shift cost tests.
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llvm-svn: 291585
2017-01-10 19:04:12 +00:00
9c58950eeb
[CostModel][X86] Fixed vXi8 uniform shift costs.
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The 'fast' costs should only work for shifts by uniform constants (uniform non-constant are lowered using the slow default implementation).
Logical shifts were not taking into account that we must mask the psrlw result, so the costs needed to be doubled.
Added missing AVX2/AVX512BW costs as well.
llvm-svn: 291391
2017-01-08 14:14:36 +00:00
1fa5487c05
[CostModel][X86] Moved legal uniform shift costs earlier.
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XOP was prematurely matching, doubling the cost of ashr/lshr uniform shifts.
llvm-svn: 291390
2017-01-08 13:12:03 +00:00
a470296367
[CostModel][X86] Fix AVX2 v16i16 shift 'splat' costs.
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llvm-svn: 291366
2017-01-07 22:08:09 +00:00
82e3e05fe2
[CostModel][X86] Match 256-bit vector shift 'splat' costs for AVX2 and above
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We were matching against general vector shift costs before the uniform splat costs
llvm-svn: 291365
2017-01-07 21:47:10 +00:00
a4109d6433
[CostModel][AVX512BW] Add v32i16 vector shift costs for avx512bw targets.
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llvm-svn: 291354
2017-01-07 17:54:10 +00:00
9cbcc5ff0b
[CostModel][X86] Add AVX512 and 512-bit vector shift cost tests.
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llvm-svn: 291269
2017-01-06 19:41:26 +00:00
6ac1e98b09
[X86][SSE] Add SSE41/AVX1 costs for vector shifts.
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We were defaulting to SSE2 costs which weren't taking into account the availability of PBLENDW/PBLENDVB to improve merging of per-element shift results.
llvm-svn: 284939
2016-10-23 16:49:04 +00:00
a18ae9bd70
[CostModel] Fixed AVX integer shift costs
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Targets with AVX but without AVX2 were incorrectly reporting costs of 256-bit integer shifts.
llvm-svn: 250611
2015-10-17 13:23:38 +00:00
acbf51ab60
[X86] Added LSHR cost model tests
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There are several dodgy costings due to AVX1 legalizing 256-bit integer vectors that need fixing.
As discussed in D8690.
llvm-svn: 249983
2015-10-11 17:29:26 +00:00
Simon Pilgrim