Commit Graph

425060 Commits

Author SHA1 Message Date
Philip Reames a4a438f05a [riscv] Add coverage for fixed length vector loops using LMUL 2022-05-25 07:42:21 -07:00
Ivan Kosarev 046f901735 [TableGen] Undeprecate 'field' when used with the CodeEmitterGen backend.
Differential Revision: https://reviews.llvm.org/D126290
2022-05-25 15:15:19 +01:00
Michał Górny e40c4dd662 [llvm-rc] Avoid which(1) dependency in windres-prefix.test
Rely on lit substitution to provide the path to llvm-windres instead
of redundantly calling which(1) with the subtituted absolute path.
This fixes test failure on the happy systems without which(1) installed.

Differential Revision: https://reviews.llvm.org/D126366
2022-05-25 16:14:47 +02:00
Groverkss fb857ded70 [MLIR][Presburger] Add inverse to IntegerRelation
This patch adds support for obtaining inverse of a relation.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D126327
2022-05-25 19:37:52 +05:30
Nikita Popov 6346a026af [PhaseOrdering] Add test for unprofitable loop load PRE backedge splitting (NFC) 2022-05-25 16:06:41 +02:00
Groverkss 3c057ac2c2 [MLIR][Presburger] Add getDomainSet, getRangeSet to IntegerRelation
This patch adds support for obtaining a set corresponding to the domain/range
of the relation.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D126326
2022-05-25 19:35:56 +05:30
Louis Dionne 8383351d45 [libc++] Remove conditional include 2022-05-25 10:04:54 -04:00
Simon Moll 6e12711081 [VP][fix] Don't discard masks in reductions
When expanding VP reductions to non VP-code, the reduction pass was
ignoring the mask before. Fix this by keeping the mask and selecting
neutral elements where the mask is zero.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D126362
2022-05-25 15:54:45 +02:00
Paul Robinson d8dda57ae7 [PS5] Default to -fno-rtti 2022-05-25 06:48:21 -07:00
Louis Dionne d8afac7a2b [libc++] Use Python subprocess instead of libc++'s own utilities
Once we move off entirely from the legacy testing framework, this will
allow removing a bunch of code.

Differential Revision: https://reviews.llvm.org/D126303
2022-05-25 09:33:22 -04:00
Haojian Wu a17fc7fd86 Fix unused-variable warning, NFC. 2022-05-25 15:25:03 +02:00
Haojian Wu c673d67bc7 [AST] Dont invalidate a ref-type var decl if it has no initializer.
This would allow more AST nodes being preserved for broken code, and
have a more consistent valid bit for ref-type var decl (currently, a
ref-type var decl with a broken initializer is valid).

Per https://reviews.llvm.org/D76831#1973053, the initializer of a variable
should play no part in its "invalid" bit.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D122935
2022-05-25 15:14:35 +02:00
Nico Weber 788463e72a [pseudo-gen] Add -o flag, make --grammar required
Virtually all LLVM tools accept a `-o` flag, so add one. This will make it
possible to possibly add a --write-if-changed flag later. It also makes it
so that the file isn't partially written if the tool oesn't run successfully.

Marking --grammar as `Required` allows removing some manual
verification code for it.

Differential Revision: https://reviews.llvm.org/D126373
2022-05-25 09:11:42 -04:00
Ivan Kosarev b3c856d10c [MLIR][NFC] Fix the Conversion/MemRefToSPIRV/alloc.mlir test.
Caught with D125604.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D126292
2022-05-25 13:58:19 +01:00
zhongyunde 58b76492c1 [tests] precommit tests for D126040
Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D126356
2022-05-25 20:39:04 +08:00
Vy Nguyen fae6bd7563 [lld-macho] Support -non_global_symbols_strip_list, -non_global_symbols_no_strip_list, -x
PR/55600

Differential Revision: https://reviews.llvm.org/D126046
2022-05-25 19:22:04 +07:00
Sanjay Patel d5ebba2aa6 [x86] add test with volatile load; NFC
Test for D126353
2022-05-25 08:19:29 -04:00
Aaron Ballman f96aa834d7 Test C DR conformance (part three of many)
This adds more of the tests for the first 100 DRs in C and updates
their status on the status page.
2022-05-25 08:18:16 -04:00
Nathan James 09ef6da8dc
[clang-tidy] Update docs for SimplifyDeMorganRelaxed
Forgot to add this to f3c1d28176
2022-05-25 13:12:20 +01:00
Nathan James f3c1d28176
[clang-tidy] Extend SimplifyBooleanExpr demorgan support.
Adds an option SimplifyDemorganRelaxed which, when enabled, will transform negated conjunctions or disjunctions when neither operand is a negation.
Default value is `false`.

Reviewed By: LegalizeAdulthood

Differential Revision: https://reviews.llvm.org/D126162
2022-05-25 13:09:00 +01:00
lorenzo chelini 1ad9b26622 [MLIR][Linalg] Adjust documentation (NFC)
Adjust docs for tensor.pad, tensor.collapse_shape and tensor.expand_shape.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D126370
2022-05-25 13:57:11 +02:00
Shraiysh Vaishay 512d06b045 [mlir][openmp] Add check for types of operands in omp.atomic.write
This patch makes sure that the address dereferences to value in
omp.atomic.write operation.

Reviewed By: kiranchandramohan, peixin

Differential Revision: https://reviews.llvm.org/D126272
2022-05-25 17:22:16 +05:30
Nico Weber c85688a22b [gn build] (manually) port some of cd2292ef82 2022-05-25 07:19:41 -04:00
David Green 18cb3b3506 [ARM] Fix vcvtb/t.f16 input liveness
The `vcvtb.f16.f32 Sd, Sn` (and vcvtt.f16.f32) instruction convert a f32
into a f16, writing either the top or bottom halves of the register.
That means that half of the input register Sd is used in the output.
This wasn't being modelled in the instructions, leading later analyses
to believe that the registers were dead where they were not, generating
invalid scheduling

Fix that be specifying the input Sda register for the instructions too,
allowing them to be set for cases like vector inserts. Most of the
changes are plumbing through the constraint string, cstr.

Differential Revision: https://reviews.llvm.org/D126118
2022-05-25 12:16:26 +01:00
Anastasia Stulova 730dc4e9bc [Clang] Added options for integrated backend.
Following the new flow for external object code emission,
provide flags to switch between integrated and external
backend similar to the integrated assembler options.

SPIR-V target is the only user of this functionality at
this point.

This patch also updated SPIR-V documentation to clarify
that integrated object code emission for SPIR-V is an
experimental feature.

Differential Revision: https://reviews.llvm.org/D125679
2022-05-25 12:07:33 +01:00
David Sherwood 87936c7b13 [LoopVectorize] Fix assertion failure in fixReduction when tail-folding
When compiling the attached new test in scalable-reductions-tf.ll we
were hitting this assertion in fixReduction:

  Assertion `isa<PHINode>(U) && "Reduction exit must feed Phi's or select"

The loop contains a reduction and an intermediate store of the reduction
value. When vectorising with tail-folding the contains of 'U' in the
assertion above happened to be a scatter_store. It turns out that we
were still creating a widen recipe for the invariant store, despite
knowing that we can actually sink it. The simplest fix is to change
buildVPlanWithVPRecipes so that we look for invariant stores before
attempting to widen it.

Differential Revision: https://reviews.llvm.org/D126295
2022-05-25 11:46:32 +01:00
Haojian Wu f1df6515e3 [pseudo] Add missing dependency, fix shared library build. 2022-05-25 12:38:23 +02:00
Florian Hahn c6e45ea074
[VPlan] Exit earlier when trying to widen with scalar VFs.
This simplifies the code a bit, suggested in D124718.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D125029
2022-05-25 11:05:23 +01:00
Haojian Wu cd2292ef82 [pseudo] A basic implementation of compiling cxx grammar at build time.
The main idea is to compile the cxx grammar at build time, and construct
the core pieces (Grammar, LRTable) of the pseudoparse based on the compiled
data sources.

This is a tiny implementation, which is good for start:

- defines how the public API should look like;
- integrates the cxx grammar compilation workflow with the cmake system.
- onlynonterminal symbols of the C++ grammar are compiled, anything
  else are still doing the real compilation work at runtime, we can opt-in more
  bits in the future;
- splits the monolithic clangPsuedo library for better layering;

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D125667
2022-05-25 11:26:06 +02:00
Javed Absar 8919447c71 [mlir] Fix warning `missing base in copy ctor`
This suppresse annoying warning when building mlir.
```
 warning: base class ‘class mlir::PassWrapper<{anonymous}::TestStatisticPass,
  mlir::OperationPass<void> >’ should be explicitly initialized in the copy constructor [-Wextra]
```

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D126209
2022-05-25 10:24:00 +01:00
Nigel Perks 089036444e [XCORE][CodeGen][NFC] Revert: Use ArrayRef in TargetLowering functions
Revert 6365bde658

Restore more readable version in line with other targets,
which did not apply the change.

Differential Revision: https://reviews.llvm.org/D123661
2022-05-25 10:09:59 +01:00
Sven van Haastregt 0d7f8d42fd [OpenCL] Remove argument names from async copy builtins
This simplifies completeness comparisons against OpenCLBuiltins.td and
also makes the header no longer "claim" the argument name identifiers.

Continues the direction set out in D119560.
2022-05-25 10:05:25 +01:00
Gabor Marton f75bc5bfc8 [analyzer] Fix symbol simplification assertion failure
Fixes https://github.com/llvm/llvm-project/issues/55546

The assertion mentioned in the issue is triggered because an
inconsistency is formed in the Sym->Class and Class->Sym relations. A
simpler but similar inconsistency is demonstrated here:
https://reviews.llvm.org/D114887 .

Previously in `removeMember`, we didn't remove the old symbol's
Sym->Class relation. Back then, we explained it with the following two
bullet points:
> 1) This way constraints for the old symbol can still be found via it's
> equivalence class that it used to be the member of.
> 2) Performance and resource reasons. We can spare one removal and thus one
> additional tree in the forest of `ClassMap`.

This patch do remove the old symbol's Sym->Class relation in order to
keep the Sym->Class relation consistent with the Class->Sym relations.
Point 2) above has negligible performance impact, empirical measurements
do not show any noticeable difference in the run-time. Point 1) above
seems to be a not well justified statement. This is because we cannot
create a new symbol that would be equal to the old symbol after the
simplification had happened. The reason for this is that the SValBuilder
uses the available constant constraints for each sub-symbol.

Differential Revision: https://reviews.llvm.org/D126281
2022-05-25 10:55:50 +02:00
LLVM GN Syncbot 9ffb5944a6 [gn build] Port 7af89a379c 2022-05-25 08:31:45 +00:00
LLVM GN Syncbot b81171ce19 [gn build] Port 29a5a7c6d4 2022-05-25 08:31:44 +00:00
Florian Hahn 1ba42dd04b
[VPlan] Use MapVector for LiveOuts for deterministic iteration.
During code-gen, we iterate over the LiveOuts and the differences in
iteration order can cause slightly different outputs.
2022-05-25 09:30:02 +01:00
Nikolas Klauser 7af89a379c [libc++] Implement ranges::fill{, _n}
Reviewed By: var-const, #libc

Spies: libcxx-commits, mgorny

Differential Revision: https://reviews.llvm.org/D123462
2022-05-25 10:27:13 +02:00
Lewis Revill 29a5a7c6d4 [RISCV] Add pre-emit pass to make more instructions compressible
When optimizing for size, this pass searches for instructions that are
prevented from being compressed by one of the following:

1. The use of a single uncompressed register.
2. A base register + offset where the offset is too large to be
   compressed and the base register may or may not already be compressed.

In the first case, if there is a compressed register available, then the
uncompressed register is copied to the compressed register and its uses
replaced. This is only done if there are enough uses that code size
would be improved.

In the second case, if a compressed register is available, then the
original base register is copied and adjusted such that:

new_base_register = base_register + adjustment
base_register + large_offset = new_base_register + small_offset

and the uses of the base register are replaced with the new base
register. Again this is only done if there are enough uses for code size
to be improved.

This pass was authored by Lewis Revill, with large offset optimization
added by Craig Blackmore.

Differential Revision: https://reviews.llvm.org/D92105
2022-05-25 09:25:02 +01:00
Alexander Belyaev b3c5c22c13 [mlir] Add `complex.atan2` operation.
Differential Revision: https://reviews.llvm.org/D126357
2022-05-25 10:11:44 +02:00
Nikita Popov 8a6698b523 [ValueTracking] Loads with !dereferenceable metadata cannot be undef/poison
A load with !dereferenceable or !dereferenceable_or_null metadata
must return a well-defined (non-undef/poison) value. Effectively
they imply !noundef. This is the same as we do for the
dereferenceable(N) attribute.

This should fix https://github.com/llvm/llvm-project/issues/55672,
or at least the specific case discussed there.

Differential Revision: https://reviews.llvm.org/D126296
2022-05-25 09:54:04 +02:00
Louis Dionne 643df8fa8e [libc++] Make sure that all headers can be included with modules enabled
This commit ensures that we can include all libc++ headers with modules
enabled. It adds a test to ensure that this doesn't regress, which is
necessary because our modules CI job does not build in all Standard modes.

Differential Revision: https://reviews.llvm.org/D125331
2022-05-25 03:44:48 -04:00
Adrian Kuegel 9698a445c6 Fix warning by handling OMPC_fail in switch statement. 2022-05-25 09:33:41 +02:00
Sunil Kuravinakop ca27f3e3b2 [Clang][OpenMP] Support for omp nothing
Patch to support "#pragma omp nothing"

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D123286
2022-05-24 23:59:31 -05:00
Sunil Kuravinakop 232bf8189e [OpenMP] atomic compare fail : Parser & AST support
This is a support for " #pragma omp atomic compare fail ". It has Parser & AST support for now.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D123235
2022-05-24 23:56:42 -05:00
Craig Topper 66db5312bd [RISCV] Fix vnsrl/vnsra isel patterns that are dropping VL.
We were incorrectly using VLMax instead of the passed VL.

Reviewed By: khchen, reames

Differential Revision: https://reviews.llvm.org/D126319
2022-05-24 21:38:59 -07:00
Mehdi Chinoune 360411957b [flang][MSVC] Fix building with `/permissive-` flag
CLOCK_REALTIME is POSIX defined and never available with MSVC, even without /permissive-.
The difference is that the template is never instantiated and the compiler ignores the undefined identifier.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D125262
2022-05-24 23:36:04 -05:00
Fraser Cormack fd93736657 [RISCV] Replace untested code with assert
We found untested code where negative frame indices were ostensibly
handled despite it being in a block guarded by !MFI.isFixedObjectIndex.

While the implementation of MachineFrameInfo::isFixedObjectIndex
suggests this is possible (i.e., if a frame index was more negative - less than the
number of fixed objects), I couldn't find any test in tree -- for any
target -- where a negative frame index wasn't also a fixed object
offset. I couldn't find a way of creating such a object with the
public MachineFrameInfo creation APIs. Even
MachineFrameInfo::getObjectIndexBegin starts counting at the negative
number of fixed objects, so such frame indices wouldn't be covered by
loops using the provided begin/end methods.

Given all this, an assert that any object encountered in the block is
non-negative seems reasonable.

Reviewed By: StephenFan, kito-cheng

Differential Revision: https://reviews.llvm.org/D126278
2022-05-25 05:03:53 +01:00
David Blaikie e59f648d69 Move GCC-compatible pod-packing change to v15/old behavior available at v14 and below
Since this didn't make it into the v14 release - anyone requesting the
v14 ABI shouldn't get this GCC-compatible change that isn't backwards
compatible with v14 Clang.

Differential Revision: https://reviews.llvm.org/D126334
2022-05-25 03:03:27 +00:00
Konstantin Varlamov b06049bc3b [libc++][NFC] Add more tests to `move_{iterator,sentinel}`.
More test coverage for the parts added by the One Ranges Proposal.

Differential Revision: https://reviews.llvm.org/D124906
2022-05-24 19:56:12 -07:00
Chen Zheng 80c4910f3d Revert "[MachineSink] replace MachineLoop with MachineCycle"
This reverts commit 62a9b36fcf.
Cause build failure on lldb incremental buildbot:
https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/43994/changes
2022-05-24 22:43:37 -04:00