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479 Commits

Author SHA1 Message Date
Chris Lattner 9d41ecc95b Make sure that bool,byte and short arguments are the right type when loaded 
from memory.

llvm-svn: 25346
 2006-01-15 22:22:01 +00:00
Chris Lattner 53312c6342 Disable a broken optimization 
llvm-svn: 25340
 2006-01-15 19:15:46 +00:00
Chris Lattner e96523474b Don't print a label for the first MBB in a function. 
Compile this:

%_2E_str_8 = external global [75 x sbyte]
implementation   ; Functions:
declare int %printf(sbyte*, ...)
void %test()
        %tmp.101 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([75 x sbyte]* %_2E_str_8, int 0, int 0) )             ; <int> [#uses=0]
        unreachable
}

to this:

main_endif_2E_8:
        save -96, %o6, %o6
        sethi %hi(_2E_str_8), %l0
        add %l0, %lo(_2E_str_8), %o0
        call printf
        nop

instead of this:

main_endif_2E_8:
        save -96, %o6, %o6
        sethi %hi(_2E_str_8), %l0
        or %g0, %lo(_2E_str_8), %l1   ;; extra instruction
        add %l1, %l0, %o0
        call printf
        nop

llvm-svn: 25335
 2006-01-15 09:26:27 +00:00
Chris Lattner aea3cccd55 Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksave/stackrestore. 
llvm-svn: 25332
 2006-01-15 08:55:25 +00:00
Chris Lattner c5101b4ffa Implement DYNAMIC_STACKALLOC for V8 
llvm-svn: 25330
 2006-01-15 08:43:57 +00:00
Chris Lattner e5ca28b74d reorder passes 
llvm-svn: 25326
 2006-01-15 07:19:53 +00:00
Nate Begeman 2fba8a3aaa bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Chris Lattner 8e2f52e645 expand unsupported stacksave/stackrestore nodes 
llvm-svn: 25272
 2006-01-13 02:42:53 +00:00
Chris Lattner 556f14a6cb Fix branches on FP compares 
llvm-svn: 25249
 2006-01-12 17:05:32 +00:00
Chris Lattner fd41d94486 fix a bug in my previous checkin 
llvm-svn: 25244
 2006-01-12 07:38:04 +00:00
Chris Lattner 071c9637c3 Give V8ISD nodes symbolic names in dumps 
llvm-svn: 25243
 2006-01-12 07:31:15 +00:00
Chris Lattner 504b63c873 invert the sense of this switch and its name 
llvm-svn: 25234
 2006-01-12 01:28:56 +00:00
Nate Begeman 1b8121b227 Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner b41e92b04c This is no longer needed 
llvm-svn: 25219
 2006-01-11 19:52:46 +00:00
Chris Lattner 41c7f4a9ce Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a 
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.

llvm-svn: 25212
 2006-01-11 07:49:38 +00:00
Chris Lattner caf4d92f85 Fix a bug in i32->f64 conversion lowering 
llvm-svn: 25211
 2006-01-11 07:27:40 +00:00
Chris Lattner d3839c74d6 Unbreak ret void :-/ 
llvm-svn: 25210
 2006-01-11 07:15:43 +00:00
Chris Lattner 8e0bee11e3 Write this pattern in canonical form, allowing more patterns to match. 
This implements Regression/CodeGen/SparcV8/xnor.ll

llvm-svn: 25209
 2006-01-11 07:14:01 +00:00
Evan Cheng 7785e5b3a4 New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace 
hasInFlag, hasOutFlag.

llvm-svn: 25155
 2006-01-09 18:28:21 +00:00
Chris Lattner efbb8da3f5 silence a bogus gcc warning 
llvm-svn: 25129
 2006-01-06 17:56:38 +00:00
Jim Laskey deeafa0f00 Had expand logic backward. 
llvm-svn: 25105
 2006-01-05 01:47:43 +00:00
Jim Laskey 762e9ec06c Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.

llvm-svn: 25104
 2006-01-05 01:25:28 +00:00
Evan Cheng 779dd94721 Remove some dead code. 
llvm-svn: 25102
 2006-01-05 00:26:14 +00:00
Evan Cheng 14c53b45f5 Added field noResults to Instruction. 
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.

llvm-svn: 25017
 2005-12-26 09:11:45 +00:00
Evan Cheng 9ae486047e * Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead. 
* Added a pseudo instruction (for each target) that represent "return void".
  This is a workaround for lack of optional flag operand (return void is not
  lowered so it does not have a flag operand.)

llvm-svn: 24997
 2005-12-23 22:14:32 +00:00
Chris Lattner 4f52796f79 not a good idea 
llvm-svn: 24991
 2005-12-23 07:37:47 +00:00
Chris Lattner 55823ae03f fix something-o 
llvm-svn: 24987
 2005-12-23 07:08:39 +00:00
Chris Lattner 5427aab5f8 implement vaarg. Varargs now should work. 
llvm-svn: 24986
 2005-12-23 06:37:38 +00:00
Chris Lattner 5ee896aad9 implement vastart. The dag isel compiles this: 
void test3(va_list Y);
void test2(int F, ...) {
  va_list X;
  va_start(X, F);
  test3(X);
}

into this:

test2:
        save -104, %o6, %o6
        st %i5, [%i6+88]
        st %i4, [%i6+84]
        st %i3, [%i6+80]
        st %i2, [%i6+76]
        st %i1, [%i6+72]
        add %i6, 72, %o0
        st %o0, [%i6+-4]
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

The simple isel emits:

test2:
        save -96, %o6, %o6
        st %i0, [%i6+68]
        st %i1, [%i6+72]
        st %i2, [%i6+76]
        st %i3, [%i6+80]
        st %i4, [%i6+84]
        st %i5, [%i6+88]
        or %g0, 1, %l0
        or %g0, 4, %l1
        umul %l0, %l1, %l0
        add %l0, 7, %l0
        and %l0, -8, %l0
        sub %o6, %l0, %o6
        add %o6, 96, %l0
        add %i6, 72, %l1
        st %l1, [%l0]
        ld [%l0], %o0
        call test3
        nop
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24985
 2005-12-23 06:24:04 +00:00
Chris Lattner 6e6d5a1fa1 remove benchmark list, remove issues addressed by the dag-dag isel 
llvm-svn: 24984
 2005-12-23 06:09:30 +00:00
Chris Lattner c46fc2482c make sure bit_converts are expanded 
llvm-svn: 24978
 2005-12-23 05:13:35 +00:00
Chris Lattner 5ce81edbf6 fix the int<->fp instructions, which apparently take a single float register 
to represent the int part (because it's always 32-bits)

llvm-svn: 24976
 2005-12-23 05:00:16 +00:00
Chris Lattner c9849274bd Use BIT_CONVERT to simplify this code 
llvm-svn: 24975
 2005-12-23 02:31:39 +00:00
Chris Lattner 4c141d047c clean up .td file by using evan's new FLAG thing 
llvm-svn: 24967
 2005-12-22 21:18:39 +00:00
Jim Laskey 9e296bee9a Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Chris Lattner 72575d882b remove dead code 
llvm-svn: 24896
 2005-12-21 05:27:51 +00:00
Chris Lattner fc94dff7dc Run lower-switch after lower-invoke. 
Only run lower-allocations and lower-select for the simple isel

llvm-svn: 24881
 2005-12-20 08:00:11 +00:00
Chris Lattner 10c7f67d78 Reserve G1 for frame offset stuff and use it to handle large stack frames. 
For example, instead of emitting this:

test:
        save -40112, %o6, %o6   ;; imm too large
        add %i6, -40016, %o0    ;; imm too large
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

emit this:

test:
        sethi 4194264, %g1
        or %g1, 848, %g1
        save %o6, %g1, %o6
        sethi 4194264, %g1
        add %g1, %i6, %g1
        add %i1, 944, %o0
        call caller
        nop
        restore %g0, %g0, %g0
        retl
        nop

which doesn't cause the assembler to barf.

llvm-svn: 24880
 2005-12-20 07:56:31 +00:00
Chris Lattner 7767a654b0 Fix pifft by correcting the case when a i64/f64 straddles O5 and memory: 
we were storing into [FP+88] instead of [FP+92].
Improve codegen by emitting [FP+92], instead of emitting a copy of FP into
another GPR which wouldn't be coallesced because FP isn't register allocated.

llvm-svn: 24859
 2005-12-19 07:57:53 +00:00
Chris Lattner 631c9df853 don't emit 'add %o6, 0, %o6' instructions 
llvm-svn: 24857
 2005-12-19 02:51:12 +00:00
Chris Lattner 5b9c9f9d36 Fix calls to functions returning i64 
llvm-svn: 24856
 2005-12-19 02:15:51 +00:00
Chris Lattner 655fac2c95 Correct bool truncstore operand order 
llvm-svn: 24855
 2005-12-19 02:06:50 +00:00
Chris Lattner 2c792ccc62 add the other bool zextload as well 
llvm-svn: 24854
 2005-12-19 01:44:58 +00:00
Chris Lattner 766170c6ee implement zextload bool 
llvm-svn: 24853
 2005-12-19 01:43:04 +00:00
Chris Lattner 9be456300e mark some unsupported ops as unsupported 
llvm-svn: 24852
 2005-12-19 01:39:40 +00:00
Chris Lattner e59941810a Fix syntax for indirect calls. This fixes Olden/mst 
llvm-svn: 24850
 2005-12-19 01:22:53 +00:00
Chris Lattner bead785656 Keep stack frames 8-byte aligned. This fixes olden/voronoi 
llvm-svn: 24849
 2005-12-19 01:15:13 +00:00
Chris Lattner 9078c84654 apparently rdy isn't actually a psuedo instruction. Use rd %y 
llvm-svn: 24848
 2005-12-19 00:53:02 +00:00
Chris Lattner d2e885e321 add fneg/fabs support for doubles 
llvm-svn: 24847
 2005-12-19 00:50:12 +00:00
Chris Lattner 14ee61ef00 Various cleanups to this pass, no functionality change 
llvm-svn: 24846
 2005-12-19 00:46:20 +00:00
Chris Lattner d2a07eebcd add bool truncstores 
llvm-svn: 24845
 2005-12-19 00:19:21 +00:00
Chris Lattner 15bd5ea92f Elimiante SP and FP, which weren't members of the IntRegs register class 
llvm-svn: 24844
 2005-12-19 00:06:52 +00:00
Chris Lattner f5f80cb947 The sun assembler only supports .xword in V9 mode. 
llvm-svn: 24842
 2005-12-18 23:36:45 +00:00
Chris Lattner 1ac15547d6 Configure the asmwriter to allow constant pools to be printed correctly 
llvm-svn: 24841
 2005-12-18 23:35:05 +00:00
Chris Lattner 030672f16b add support for integer extloads 
llvm-svn: 24840
 2005-12-18 23:18:37 +00:00
Chris Lattner c70ed7721b Add support for undef 
llvm-svn: 24839
 2005-12-18 23:10:57 +00:00
Chris Lattner 4c3c3ac218 Add support for calls to external symbols 
llvm-svn: 24838
 2005-12-18 23:07:11 +00:00
Chris Lattner 388f3043b0 we have no memcpy 
llvm-svn: 24837
 2005-12-18 23:00:27 +00:00
Chris Lattner c65cd5a03e Fix a crash on a call with no arguments 
llvm-svn: 24836
 2005-12-18 22:57:47 +00:00
Chris Lattner 1958690ff2 Change return lowering so that we can autogen the matching code. 
llvm-svn: 24832
 2005-12-18 21:03:04 +00:00
Chris Lattner 02e9904ee5 Implement Calls for V8. This would be completely autogenerated except for 
a small bug in tblgen.  When that is fixed, we can remove the ISD::Call case
in Select.

llvm-svn: 24830
 2005-12-18 15:55:15 +00:00
Chris Lattner a0be18c9a4 Implement the full V8 ABI for incoming arguments. 
llvm-svn: 24825
 2005-12-18 13:33:06 +00:00
Chris Lattner 8d1db078cb Push ops list, asm string, and pattern all the way up to InstV8. Move the 
InstV8 class to the InstrFormats file where it belongs.

llvm-svn: 24824
 2005-12-18 08:21:00 +00:00
Chris Lattner 7cee2c9a5b Give V8 select_cc, in the spirit of the PPC backend 
llvm-svn: 24823
 2005-12-18 08:13:54 +00:00
Chris Lattner 9de2958138 remove some unused instructions 
llvm-svn: 24822
 2005-12-18 07:15:17 +00:00
Chris Lattner a9f0d108b1 V8 doesn't have FP extload 
llvm-svn: 24821
 2005-12-18 07:13:32 +00:00
Chris Lattner d6806875d0 simplifications, fix typo 
llvm-svn: 24820
 2005-12-18 07:09:06 +00:00
Chris Lattner 4492b1b7a0 Add frameindex support 
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions

llvm-svn: 24818
 2005-12-18 06:59:57 +00:00
Chris Lattner 9dcfe37e76 Tighten up some checks 
llvm-svn: 24817
 2005-12-18 06:40:34 +00:00
Chris Lattner 5580e69df6 Add constant pool support, including folding into addresses. 
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]

llvm-svn: 24813
 2005-12-18 02:37:35 +00:00
Chris Lattner 726075fdf8 Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes, 
allowing us to compile this:

to this:

%G1 = external global int
%G2 = external global int
void %test() {
        %X = load int* %G1
        store int %X, int* %G2
        ret void
}

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        ld [%l0+%lo(G1)], %l0
        sethi %hi(G2), %l1
        st %l0, [%l1+%lo(G2)]
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        sethi %hi(G1), %l0
        or %g0, %lo(G1), %l1
        ld [%l1+%l0], %l0
        sethi %hi(G2), %l1
        or %g0, %lo(G2), %l2
        st %l0, [%l2+%l1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24812
 2005-12-18 02:27:00 +00:00
Chris Lattner a983c3df1c Add initial support for global variables, and fix a bug in addr mode selection 
where we didn't select the operands.

llvm-svn: 24811
 2005-12-18 02:10:39 +00:00
Chris Lattner a49b652a62 Claiming that branch targets are registers is not very wholesome. Change them 
to be basic blocks.  Also, add uncond branches.

llvm-svn: 24810
 2005-12-18 01:46:58 +00:00
Chris Lattner b29957500e Add unordered comparisons 
llvm-svn: 24809
 2005-12-18 01:41:39 +00:00
Chris Lattner e58481be36 Add patterns to the rest of the int condbranches and some of the fp branches 
llvm-svn: 24808
 2005-12-18 01:38:19 +00:00
Chris Lattner 9cf4bb2867 Add initial conditional branch support. This doesn't actually work yet due 
to a bug in the scheduler.

llvm-svn: 24807
 2005-12-18 01:20:35 +00:00
Chris Lattner 00759eac78 Eliminate CMPri, which is a synonym for SUBCCri 
llvm-svn: 24805
 2005-12-17 23:52:08 +00:00
Chris Lattner 5a6b03c1b8 add fneg,fabs,fsqrt instructions 
llvm-svn: 24803
 2005-12-17 23:20:27 +00:00
Chris Lattner 32f19262d5 Add patterns for fround/fextend and the funny fsmuld instruction 
llvm-svn: 24802
 2005-12-17 23:14:30 +00:00
Chris Lattner 06952dfced Add FP +,-,*,/ 
llvm-svn: 24801
 2005-12-17 23:10:46 +00:00
Chris Lattner 89078880f2 Give patterns to F3_3 instructions 
llvm-svn: 24800
 2005-12-17 23:05:35 +00:00
Chris Lattner 829572cdca Implement 64-bit add/sub, make sure to receive and return 64-bit args with 
the right halves in the right regs

llvm-svn: 24799
 2005-12-17 22:55:57 +00:00
Chris Lattner ebfa06a2de implement div and rem 
llvm-svn: 24798
 2005-12-17 22:39:19 +00:00
Chris Lattner 8eaf9f4cb3 implement MULHU/MULHS for 64-bit multiplies 
llvm-svn: 24797
 2005-12-17 22:30:00 +00:00
Chris Lattner 4abe9528f9 Add patterns for multiply, simplify Y register handling stuff, add RDY instruction 
llvm-svn: 24796
 2005-12-17 22:22:53 +00:00
Chris Lattner 2616a0b56f Make the addressing modes smarter 
llvm-svn: 24795
 2005-12-17 21:25:27 +00:00
Chris Lattner 19ff62dc67 remove some unused instructions 
llvm-svn: 24794
 2005-12-17 21:13:50 +00:00
Chris Lattner e39ab718c0 add andn/orn/xorn patterns. This allows us to compile this: 
long %test(ubyte, short, long %X, long %Y) {
  %A = xor long %X, -1
  %B = and long %Y, %A
  ret long %B
}

to this:

test:
        save -96, %sp, %sp
        andn %i4, %i2, %i0
        andn %i5, %i3, %i1
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

test:
        save -96, %sp, %sp
        xor %i2, -1, %l0
        xor %i3, -1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

The simpleisel emits:  :(

test:
        save -96, %sp, %sp
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l0
        or %g0, -1, %l1
        xor %i2, %l0, %l0
        xor %i3, %l1, %l1
        and %i4, %l0, %i0
        and %i5, %l1, %i1
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 24793
 2005-12-17 21:05:49 +00:00
Chris Lattner ea752cc50a Add support for 64-bit arguments 
llvm-svn: 24792
 2005-12-17 20:59:06 +00:00
Chris Lattner 6be83f9959 Sparc doesn't have sext_inreg 
llvm-svn: 24791
 2005-12-17 20:50:42 +00:00
Chris Lattner d10995cb26 add patterns for FP stores 
llvm-svn: 24790
 2005-12-17 20:47:16 +00:00
Chris Lattner 490a6edf52 Add [reg+reg] integer stores 
llvm-svn: 24789
 2005-12-17 20:44:36 +00:00
Chris Lattner b57bb13253 Add store patterns 
llvm-svn: 24788
 2005-12-17 20:42:55 +00:00
Chris Lattner 7e7c355154 add fp load patterns, switch rest of loads and stores to use addrmodes 
llvm-svn: 24786
 2005-12-17 20:32:47 +00:00
Chris Lattner c4f3a7adea Add integer load[r+r] forms. 
llvm-svn: 24785
 2005-12-17 20:26:45 +00:00
Chris Lattner 1c02c45f18 Rename load/store instructions to include an RI suffix 
llvm-svn: 24784
 2005-12-17 20:18:49 +00:00
Chris Lattner 4fa86e1d55 Add patterns for the rest of the loads. Add 'ri' suffixes to the load and store insts 
llvm-svn: 24783
 2005-12-17 20:18:24 +00:00
Chris Lattner 5d15f9ed60 Add basic addressing mode support and one load. 
llvm-svn: 24782
 2005-12-17 20:04:49 +00:00
Chris Lattner 5e68639009 Use a combination of sethi and or to build arbitrary immediates. 
llvm-svn: 24780
 2005-12-17 19:41:43 +00:00
Chris Lattner 8546257435 Use sethi to build large immediates with zeros at the bottom 
llvm-svn: 24779
 2005-12-17 19:37:00 +00:00