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479 Commits

Author SHA1 Message Date
Brian Gaeke 84b4c9208d Hack it so we do not try to allocate values to G0. 
llvm-svn: 12184
 2004-03-06 05:31:32 +00:00
Brian Gaeke 901cfa9e2e Make prolog align stack properly. Make epilog not touch any registers. 
llvm-svn: 12183
 2004-03-06 05:31:21 +00:00
Brian Gaeke 5a1c7a8be3 Emit register names in lowercase, as required by the assembler. 
llvm-svn: 12182
 2004-03-06 05:30:21 +00:00
Brian Gaeke 639b04aca3 Teach getRegClassForType where to find FP registers 
llvm-svn: 12180
 2004-03-06 03:54:13 +00:00
Brian Gaeke 0c76d1146f Asm output is looking a lot better; not correct for all operands yet though. 
llvm-svn: 12143
 2004-03-05 08:39:09 +00:00
Brian Gaeke 9c609df3c9 Support -print-machineinstrs 
llvm-svn: 12124
 2004-03-04 19:22:16 +00:00
Brian Gaeke 82ec4a561b Asm printer support, based on x86 - only prints mnemonics for now 
llvm-svn: 12113
 2004-03-04 06:00:41 +00:00
Brian Gaeke 8ace44fe0d Double-FP pseudo-registers. 
llvm-svn: 12112
 2004-03-04 05:15:03 +00:00
Brian Gaeke 92c95f812d Subtract instructions; minor cleanups 
llvm-svn: 12111
 2004-03-04 04:37:45 +00:00
Brian Gaeke d2e89190d9 Floating point regs 
llvm-svn: 12110
 2004-03-04 04:37:22 +00:00
Brian Gaeke 956fb06a4a Simple copyConstantToReg support, SETHIi and ORri 
llvm-svn: 12107
 2004-03-04 00:56:25 +00:00
Brian Gaeke 165ff998e0 Support add - note, still missing important copyConstantToRegister stuff 
llvm-svn: 12106
 2004-03-03 23:03:14 +00:00
Brian Gaeke 427cec1395 TargetCacheInfo has been removed; its only uses were to propagate a constant 
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.

llvm-svn: 12043
 2004-03-01 06:43:29 +00:00
Chris Lattner ed01da8f0b Adjust to change in TII ctor arguments 
llvm-svn: 11987
 2004-02-29 06:31:44 +00:00
Chris Lattner ca89812db7 These two virtual methods are never called. 
llvm-svn: 11984
 2004-02-29 05:59:33 +00:00
Chris Lattner e5f08917ae Implement initial prolog/epilog code insertion methods. 
llvm-svn: 11979
 2004-02-29 05:18:30 +00:00
Chris Lattner b1862e4d3b Add an instruction selector capable of selecting 'ret void' 
llvm-svn: 11973
 2004-02-29 00:27:00 +00:00
Chris Lattner 72bb8fcb15 Change this so that LLC actually tries to run the code generator, though it will 
immediately abort due to lack of an instruction selector. :)

llvm-svn: 11963
 2004-02-28 20:21:45 +00:00
Chris Lattner 1a3ee3e961 Finegrainify namespacification 
llvm-svn: 11958
 2004-02-28 19:52:49 +00:00
Chris Lattner e40fd90b0b Tab completion is our friend. 
llvm-svn: 11957
 2004-02-28 19:45:39 +00:00
Chris Lattner 0179fb5881 Clean up rules 
llvm-svn: 11956
 2004-02-28 19:43:40 +00:00
Chris Lattner 74598091a1 Bring this directory into "it actually compiles" land 
llvm-svn: 11955
 2004-02-28 19:37:18 +00:00
Chris Lattner 3290952f8b Fix multiple inclusion problem 
llvm-svn: 11954
 2004-02-28 19:31:32 +00:00
Misha Brukman 1743c4090d Instructions to call and return from functions. 
llvm-svn: 11858
 2004-02-26 00:37:12 +00:00
Misha Brukman 564654d654 SparcV8 regs are really 32-bit, not 64! Thanks, Chris. 
llvm-svn: 11835
 2004-02-25 21:03:02 +00:00
Misha Brukman f8dcdcc83b Clean up the tablegen descriptions for SparcV8. 
llvm-svn: 11834
 2004-02-25 21:02:21 +00:00
Misha Brukman 2122b969f9 Fix the SparcV8 register definitions that were imported from PPC template. 
llvm-svn: 11833
 2004-02-25 21:00:05 +00:00
Misha Brukman 0e3a7ca53e SparcV8 has different types of instructions, but F1 is only used for CALL. 
llvm-svn: 11832
 2004-02-25 20:52:20 +00:00
Brian Gaeke 9a5bd7fca7 SparcV8 skeleton 
llvm-svn: 11828
 2004-02-25 19:28:19 +00:00