llvm-project

Commit Graph

Author	SHA1	Message	Date
Marek Olsak	a45dae458d	Revert "AMDGPU: Make m0 unallocatable" This reverts commit 124ad83dae04514f943902446520c859adee0e96. llvm-svn: 287932	2016-11-25 16:03:15 +00:00
Matt Arsenault	9e5c7b1031	AMDGPU: Make m0 unallocatable m0 may need to be written for spill code, so we don't want general code uses relying on the value stored in it. This introduces a few code quality regressions where copies from m0 are not coalesced into copies of a copy of m0. llvm-svn: 287841	2016-11-24 00:26:40 +00:00
Changpeng Fang	75f0968b39	AMDGCN/SI: Implement readlane/readfirstlane intrinsics Summary: This patch implements readlane/readfirstlane intrinsics. TODO: need to define a new register class to consider the case that the source could be a vector register or M0. Reviewed by: arsenm and tstellarAMD Differential Revision: http://reviews.llvm.org/D22489 llvm-svn: 279660	2016-08-24 20:35:23 +00:00

Author

SHA1

Message

Date

Marek Olsak

a45dae458d

Revert "AMDGPU: Make m0 unallocatable"

This reverts commit 124ad83dae04514f943902446520c859adee0e96.

llvm-svn: 287932

2016-11-25 16:03:15 +00:00

Matt Arsenault

9e5c7b1031

AMDGPU: Make m0 unallocatable

m0 may need to be written for spill code, so
we don't want general code uses relying on the
value stored in it.

This introduces a few code quality regressions where copies
from m0 are not coalesced into copies of a copy of m0.

llvm-svn: 287841

2016-11-24 00:26:40 +00:00

Changpeng Fang

75f0968b39

AMDGCN/SI: Implement readlane/readfirstlane intrinsics

Summary:
  This patch implements readlane/readfirstlane intrinsics.
TODO: need to define a new register class to consider the case
that the source could be a vector register or M0.

Reviewed by:
  arsenm and tstellarAMD

Differential Revision:
  http://reviews.llvm.org/D22489

llvm-svn: 279660

2016-08-24 20:35:23 +00:00

3 Commits