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6558 Commits

Author SHA1 Message Date
Chris Lattner ab85ef9e55 distribute the rest of the contents of X86Instr64bit.td out to 
the right places.  X86Instr64bit.td now dies, long live x86-64!

llvm-svn: 115669
 2010-10-05 20:49:15 +00:00
Chris Lattner 27c763d342 move the rest of the simple 64-bit arithmetic into InstrArithmetic.td 
llvm-svn: 115663
 2010-10-05 20:35:37 +00:00
Chris Lattner c2f5e5764f continue moving 64-bit stuff into X86InstrArithmetic.td 
llvm-svn: 115660
 2010-10-05 20:23:31 +00:00
Chris Lattner 7552d15d19 move 64-bit add and adc to InstrArithmetic. 
llvm-svn: 115632
 2010-10-05 16:59:08 +00:00
Chris Lattner 182e87caaf rewrote two addr constraints so that they are only set, not set and then nestedly cleared. 
llvm-svn: 115631
 2010-10-05 16:52:25 +00:00
Chris Lattner 39c70f4833 split the 32-bit integer arithmetic instructions out to their own file. 
llvm-svn: 115627
 2010-10-05 16:39:12 +00:00
Chris Lattner 1818dd510e integrate the 64-bit shifts into X86InstrShiftRotate.td. Enough for tonight. 
llvm-svn: 115608
 2010-10-05 07:13:35 +00:00
Chris Lattner 1b3aa8678e move 32-bit shift and rotates out to their own file. 
llvm-svn: 115607
 2010-10-05 07:00:12 +00:00
Chris Lattner 89497a990e add new file 
llvm-svn: 115606
 2010-10-05 06:52:35 +00:00
Chris Lattner a68466c202 move sign and zero extensions out to their own file. 
llvm-svn: 115605
 2010-10-05 06:52:26 +00:00
Chris Lattner 84571a1581 move some instructions from Instr64Bit -> InstrInfo. 
bswap32 doesn't read eflags.

llvm-svn: 115604
 2010-10-05 06:47:35 +00:00
Chris Lattner da8c94ef44 move CMOV_FR32 and friends to InstrCompiler, since they are 
pseudo instructions.

Move POPCNT to InstrSSE since they are SSE4 instructions.

llvm-svn: 115603
 2010-10-05 06:41:40 +00:00
Chris Lattner 44a5a2b569 move various pattern matching support goop out of X86Instr64Bit, to live 
with the 32-bit stuff.

llvm-svn: 115602
 2010-10-05 06:37:31 +00:00
Chris Lattner fa9b058eef split conditional moves and setcc's out to their own file. 
llvm-svn: 115601
 2010-10-05 06:33:16 +00:00
Chris Lattner f9594ba4e7 move string pseudo instructions to InstrCompiler consolidate 64-bit and 32-bit together. 
llvm-svn: 115600
 2010-10-05 06:27:48 +00:00
Chris Lattner c184a57e98 move the atomic pseudo instructions out to X86InstrCompiler.td 
llvm-svn: 115599
 2010-10-05 06:22:35 +00:00
Chris Lattner c793f8bca6 move more pseudo instructions out to X86InstrCompiler.td 
llvm-svn: 115598
 2010-10-05 06:10:16 +00:00
Chris Lattner 52d3935dfe move VMX instructions out to their own file. 
llvm-svn: 115597
 2010-10-05 06:06:53 +00:00
Chris Lattner ae33f5d93b continue moving stuff out to X86InstrSystem.td. Move 
control flow stuff out to X86InstrControl.td.  Move
some compiler pseudo instructions and Pat<> patterns
out to X86InstrCompiler.td

llvm-svn: 115596
 2010-10-05 06:04:14 +00:00
Chris Lattner dec85b8c64 refactor .td files a bit, moving system instructions out to X86InstrSystem.td 
llvm-svn: 115591
 2010-10-05 05:32:15 +00:00
Bill Wendling 402e54822b The pshufw instruction came about in MMX2 when SSE was introduced. Don't place 
it in with the SSSE3 instructions.

Steward! Could you place this chair by the aft sun deck? I'm trying to get away
from the Astors. They are such boors!

llvm-svn: 115552
 2010-10-04 20:24:01 +00:00
Anton Korobeynikov d77a443631 va_args support for Win64. 
Patch by Cameron!

llvm-svn: 115480
 2010-10-03 22:52:07 +00:00
Anton Korobeynikov ff85688559 Properly emit stack probe on win64 (for non-mingw targets). 
Based on the patch by Cameron Esfahani!

llvm-svn: 115479
 2010-10-03 22:02:38 +00:00
Eli Friedman bb48e26732 Add 3DNowA instructions. 
llvm-svn: 115477
 2010-10-03 20:23:13 +00:00
Chris Lattner d3593c3a8e the immediate field of pshufw is actually an 8-bit field, not a 8-bit field that is sign extended. This fixes PR8288 
llvm-svn: 115473
 2010-10-03 19:09:13 +00:00
Rafael Espindola 66e08d43d2 Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do 
so and also change X86 for consistency.

Investigating if this can be improved a bit.

llvm-svn: 115469
 2010-10-03 18:59:45 +00:00
Chris Lattner b44b202d66 add support for the prefetch/prefetchw instructions, move femms into 
the right file.  The assembler supports all the 3dnow instructions now,
but not the "3dnowa" ones.

llvm-svn: 115468
 2010-10-03 18:42:30 +00:00
Chris Lattner 3a0a620c2e what the heck, add support for the rest of the 3dNow! binary operations. 
llvm-svn: 115467
 2010-10-03 18:24:18 +00:00
Chris Lattner 45270db916 Implement support for the bizarre 3DNow! encoding (which is unlike anything 
else in X86), and add support for pavgusb.  This is apparently the
only instruction (other than movsx) that is preventing ffmpeg from building
with clang.

If someone else is interested in banging out the rest of the 3DNow! 
instructions, it should be quite easy now.

llvm-svn: 115466
 2010-10-03 18:08:05 +00:00
Chris Lattner ae1a9de083 stub out a header to put 3dNow! instructions into. 
llvm-svn: 115429
 2010-10-02 23:06:23 +00:00
Chris Lattner 4756bbeba0 fix a regression introduced in r115243, in which the instruction 
backing int_x86_ssse3_pshuf_w got removed.  This caused PR8280.

llvm-svn: 115422
 2010-10-02 21:32:15 +00:00
Jim Grosbach 0e854f3d43 Rename the AsmPrinter directory to InstPrinter for those targets that have 
been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.

llvm-svn: 115360
 2010-10-01 22:39:28 +00:00
Benjamin Kramer 14e909a942 Delete token *after* reading from it. 
llvm-svn: 115311
 2010-10-01 12:25:27 +00:00
Dale Johannesen dd224d2333 Massive rewrite of MMX: 
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.

Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics. 

MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces.  Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.

The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.

llvm-svn: 115243
 2010-09-30 23:57:10 +00:00
Jim Grosbach c6e13f7383 Clean up asm writer usage for x86 and msp430 to flag that the writer should 
use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.

llvm-svn: 115238
 2010-09-30 23:40:25 +00:00
Chris Lattner 73a7caee4b preemptively add the rest of the non-n fpstack instructions. 
llvm-svn: 115168
 2010-09-30 17:11:29 +00:00
Chris Lattner 4373badcdf implement support for finit, PR8258 
llvm-svn: 115156
 2010-09-30 16:42:53 +00:00
Chris Lattner adc0dbe470 add support for fstcw, PR8259 
llvm-svn: 115154
 2010-09-30 16:39:29 +00:00
Kevin Enderby bad267fa05 Adds getPointerSize() to the AsmBackend which will be needed by the final patch 
for the dwarf .loc support to emit dwarf line number tables.

llvm-svn: 115153
 2010-09-30 16:38:07 +00:00
Rafael Espindola 70d6e0e0ff Correctly produce R_X86_64_32 or R_X86_64_32S. 
With this patch in

movq    $foo, foo(%rip)
foo:
.long   foo

We produce a R_X86_64_32S for the first relocation and R_X86_64_32 for the
second one.

llvm-svn: 115134
 2010-09-30 03:11:42 +00:00
Eric Christopher 0574cc556a Noticed by inspection when looking for other cmov bits. 
llvm-svn: 115100
 2010-09-29 23:00:29 +00:00
Nick Lewycky 23ebf4b319 Add parens to fix GCC warning: 
lib/Target/X86/X86MCCodeEmitter.cpp: 190: error: suggest parentheses around '&&' within '||'

llvm-svn: 115064
 2010-09-29 18:56:57 +00:00
Chris Lattner 2b43c1cf42 implement rdar://8491845 - Gas supports commuted forms of non-commutable instructions. 
llvm-svn: 115061
 2010-09-29 18:39:16 +00:00
Chris Lattner 8f7851d2b4 fix rdar://8490728 - llvm-mc rejects gpr64 form of 'movmskpd' 
llvm-svn: 115029
 2010-09-29 05:05:03 +00:00
Chris Lattner 52e6020883 add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382 
llvm-svn: 115027
 2010-09-29 04:55:40 +00:00
Chris Lattner 5da7f9fcfd make the x86 mccode emitter emit the 0x67 and 0x66 prefix bytes in the same 
order as cctools for diffability.

llvm-svn: 115022
 2010-09-29 03:43:43 +00:00
Chris Lattner a4e1c74947 implement support for 32-bit address operands in 64-bit mode, which 
are defined to emit the 0x67 prefix byte.  rdar://8482675

llvm-svn: 115021
 2010-09-29 03:33:25 +00:00
Chris Lattner f60062fd55 add basic avx support to the disassembler, also teach it about ssmem/sdmem 
operands.

With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up.  This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'

llvm-svn: 115019
 2010-09-29 02:57:56 +00:00
Chris Lattner ff3a3930a0 add asmparser support for cvttpd2dq by removing some Int_ prefixes. 
Clean up cvttps2dq by removing some redundant implementations of the
same instruction.  rdar://8456382

llvm-svn: 115018
 2010-09-29 02:36:32 +00:00
Chris Lattner ef1c2fc305 implement rdar://8456382 - cvtsd2si support, by removing some Int_ prefixes. 
llvm-svn: 115017
 2010-09-29 02:24:57 +00:00