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21601 Commits

Author SHA1 Message Date
Chris Lattner fb7fd98cd4 Switch constant pool printing over to use the Shared AsmPrinter version 
llvm-svn: 24765
 2005-12-17 07:11:43 +00:00
Chris Lattner b808c8e2e4 Use the shared AsmPrinter code for some basic stuff. No functionality 
change except for fewer .section directives emitted

llvm-svn: 24764
 2005-12-17 07:04:29 +00:00
Evan Cheng 7087cd275b Added an idea about any_extend for performance tuning. 
llvm-svn: 24763
 2005-12-17 06:54:43 +00:00
Chris Lattner 9e2af046e4 Convert the remaining instructions over, branches and calls. Fix a couple 
minor bugs

llvm-svn: 24762
 2005-12-17 06:54:41 +00:00
Chris Lattner 6b669e2680 convert FP instructions to use an asmstring and operand list, allowing FP 
programs to work on V8 again

llvm-svn: 24761
 2005-12-17 06:32:52 +00:00
Evan Cheng bc7708c0e8 Added truncate. 
llvm-svn: 24760
 2005-12-17 02:02:50 +00:00
Evan Cheng b06925d1dd Added anyext, modelled as zext on X86. 
llvm-svn: 24759
 2005-12-17 01:47:57 +00:00
Evan Cheng e58ab48ccb Yet another variant of getTargetNode(). 
llvm-svn: 24758
 2005-12-17 01:44:51 +00:00
Evan Cheng 6b76009393 Added some isel ideas. 
llvm-svn: 24757
 2005-12-17 01:25:19 +00:00
Evan Cheng cb19390ead Added support for cmp, test, and conditional move instructions. 
llvm-svn: 24756
 2005-12-17 01:24:02 +00:00
Evan Cheng 0f68322992 Only lower SELECT when using DAG based isel. 
llvm-svn: 24755
 2005-12-17 01:22:13 +00:00
Evan Cheng 225a4d0d6d X86 lowers SELECT to a cmp / test followed by a conditional move. 
llvm-svn: 24754
 2005-12-17 01:21:05 +00:00
Evan Cheng e22f9181f7 Support for read / write from explicit registers with FlagVT type. 
llvm-svn: 24753
 2005-12-17 01:19:28 +00:00
Evan Cheng a93464d8ac Remove hidden DOS characters. 
llvm-svn: 24752
 2005-12-17 01:03:57 +00:00
Jeff Cohen 59dc6c553d Fix VC++ level 4 warnings. Because a base class has declared these private, VC++ complains it cannot automatically generate this methods. 
llvm-svn: 24751
 2005-12-17 00:19:22 +00:00
Jeff Cohen ea36abe567 Fix VC++ level 4 warnings. 
llvm-svn: 24750
 2005-12-17 00:18:06 +00:00
Jeff Cohen 9504149c1b Turn on string pooling for smaller binaries. 
llvm-svn: 24749
 2005-12-17 00:14:47 +00:00
Jim Laskey 7c462768ed Added source file/line correspondence for dwarf (PowerPC only at this point.) 
llvm-svn: 24748
 2005-12-16 22:45:29 +00:00
Chris Lattner 887af88ce3 Weak and linkonce global vars should still have a .globl emitted for them 
llvm-svn: 24747
 2005-12-16 21:46:14 +00:00
Nate Begeman 672578bd94 Add a second vector type to the VRRC register class, and fix some patterns 
so that tablegen can infer all types.

llvm-svn: 24746
 2005-12-16 09:19:13 +00:00
Chris Lattner 9f2c3a7c4e add some notes 
llvm-svn: 24745
 2005-12-16 07:20:53 +00:00
Chris Lattner fa55745cbc Add a couple more instrs 
llvm-svn: 24744
 2005-12-16 07:18:48 +00:00
Chris Lattner e082426ae7 remove some dead code 
llvm-svn: 24743
 2005-12-16 07:16:02 +00:00
Chris Lattner 70310906e7 asmprint pseudo instrs 
llvm-svn: 24742
 2005-12-16 07:13:26 +00:00
Chris Lattner 68d064a3a6 Autogenerate asmprinter for F3_2 instructions 
llvm-svn: 24741
 2005-12-16 07:10:02 +00:00
Chris Lattner 1e777082a0 Switch F3_1 instructions over to use AsmStrings 
llvm-svn: 24740
 2005-12-16 06:52:00 +00:00
Chris Lattner 4870224a56 Plug in basic hooks for an autogenerated asm printer to fill in. 
llvm-svn: 24739
 2005-12-16 06:34:17 +00:00
Chris Lattner 34e80f0114 Add operand info for F3_[12] instructions, getting V8 back to basic functionality. 
With this, Regression/CodeGen/SparcV8/basictest.ll now passes.  Lets hear it
for regression tests :)

llvm-svn: 24738
 2005-12-16 06:25:42 +00:00
Chris Lattner 0d129ae8b1 A truly trivial testcase to ensure sparcv8 doesn't get completely broken 
again.

llvm-svn: 24737
 2005-12-16 06:24:55 +00:00
Chris Lattner b527f48acd Remove JIT support, which doesn't work. 
llvm-svn: 24736
 2005-12-16 06:06:07 +00:00
Chris Lattner 1e1ca1e9a5 add some simple operand info 
llvm-svn: 24735
 2005-12-16 06:02:58 +00:00
Chris Lattner 08a04cb3f2 rename option for consistency with -mcpu -mattr etc 
llvm-svn: 24734
 2005-12-16 05:19:55 +00:00
Chris Lattner 77e28af47d rename options 
llvm-svn: 24733
 2005-12-16 05:19:35 +00:00
Chris Lattner 78e9e10b53 rename option 
llvm-svn: 24732
 2005-12-16 05:19:18 +00:00
Chris Lattner 3bf72b5c19 Document -mcpu -mattr -triple 
llvm-svn: 24731
 2005-12-16 05:18:53 +00:00
Chris Lattner 76766cb880 provide an option to override the target triple in a module from the commandline. 
llvm-svn: 24730
 2005-12-16 05:00:21 +00:00
Chris Lattner e568b88c98 provide an option to override the target triple in a module from the command 
line.

llvm-svn: 24729
 2005-12-16 04:59:57 +00:00
Chris Lattner 575751151c Update the darwin handling of linkonce & weak functions and GV stubs. This 
should work in all permutations.

llvm-svn: 24728
 2005-12-16 00:22:14 +00:00
Chris Lattner 9f62a2a51d Don't globalize internal functions 
llvm-svn: 24727
 2005-12-16 00:07:30 +00:00
Evan Cheng 74151ba279 * Promote all 1 bit entities to 8 bit. 
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.

llvm-svn: 24726
 2005-12-15 19:49:23 +00:00
Chris Lattner 83e4407379 Don't create SEXTLOAD/ZEXTLOAD instructions that the target doesn't support 
if after legalize.  This fixes IA64 failures.

llvm-svn: 24725
 2005-12-15 19:02:38 +00:00
Evan Cheng 305c6a73b5 Added frameindex, constpool, globaladdr, and externalsym as root nodes of 
leaaddr.

llvm-svn: 24724
 2005-12-15 08:31:04 +00:00
Evan Cheng a2ebc62862 Added constpool, frameindex, and externalsym nodes. 
llvm-svn: 24723
 2005-12-15 08:29:48 +00:00
Evan Cheng 00fcb0017e Handling zero extension of 1 bit value. 
llvm-svn: 24722
 2005-12-15 01:02:48 +00:00
Evan Cheng bc9344477e Use MOV8rm to load 1 bit value. 
llvm-svn: 24721
 2005-12-15 00:59:17 +00:00
Nate Begeman 808f7a8abb Remove a now unused statistic. 
llvm-svn: 24720
 2005-12-14 22:56:16 +00:00
Nate Begeman e37cb604c1 Use the new predicate support that Evan Cheng added to remove some code 
from the DAGToDAG cpp file.  This adds pattern support for vector and
scalar fma, which passes test/Regression/CodeGen/PowerPC/fma.ll, and
does the right thing in the presence of -disable-excess-fp-precision.

Allows us to match:
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  %tmp3 = add <4 x float> %tmp2, %tmp1
  store <4 x float> %tmp3, <4 x float> *%a
  ret void
}

As:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vmaddfp v0, v0, v0, v0
        stvx v0, r2, r3
        blr

Or, with llc -disable-excess-fp-precision,

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v1, v0, v0, v1
        vaddfp v0, v1, v0
        stvx v0, r2, r3
        blr

llvm-svn: 24719
 2005-12-14 22:54:33 +00:00
Nate Begeman 7853983b40 Add a case for float just to make sure the patterns for both precisions 
are matching

llvm-svn: 24718
 2005-12-14 22:51:13 +00:00
Evan Cheng 023aef2f31 Fixed a typo: line 2323: MOVSX16rm8 -> MOVZX16rm8. This was the cause fo 12/14/2005 hbd failure. 
llvm-svn: 24717
 2005-12-14 22:28:18 +00:00
Evan Cheng 3db275d996 Added predicate !NoExcessFPPrecision to FMADD, FMADDS, FMSUB, and FMSUBS. 
llvm-svn: 24716
 2005-12-14 22:07:12 +00:00