Commit Graph

3223 Commits

Author SHA1 Message Date
Matheus Almeida ab5633b70c [mips] Add support to the '.dword' directive.
The '.dword' directive accepts a list of expressions and emits
them in 8-byte chunks in successive locations.

llvm-svn: 204822
2014-03-26 15:44:18 +00:00
Matheus Almeida 3b9c63d29b [mips] Add support to '.set mips64'.
The '.set mips64' directive enables the feature Mips:FeatureMips64
from assembly. Note that it doesn't modify the ELF header as opposed
to the use of -mips64 from the command-line. The reason for this
is that we want to be as compatible as possible with existing assemblers
like GAS.

llvm-svn: 204817
2014-03-26 15:14:32 +00:00
Matheus Almeida a2cd009c51 [mips] Add support to '.set mips64r2'.
The '.set mips64r2' directive enables the feature Mips:FeatureMips64r2
from assembly. Note that it doesn't modify the ELF header as opposed
to the use of -mips64r2 from the command-line. The reason for this
is that we want to be as compatible as possible with existing assemblers
like GAS.

llvm-svn: 204815
2014-03-26 14:52:22 +00:00
Matheus Almeida f79b281421 [mips] Add support for '.option pic2'.
The directive '.option pic2' enables PIC from assembly source.
At the moment none of the macros/directives check the PIC bit
but that's going to be fixed relatively soon. For example, the
expansion of macros like 'la' depend on the relocation model.

llvm-svn: 204803
2014-03-26 13:40:29 +00:00
Daniel Sanders 6dad838f3a [mips] Add tests for t0-t3 for N32/N64
These are aliases of t4-t7 and are provided for compatibility with both the
original ABI documentation (using t4-t7) and GNU As (using t0-t3)

llvm-svn: 204797
2014-03-26 11:46:34 +00:00
Daniel Sanders a4b0c74765 [mips] The register names depend on the ABI being N32/N64 rather than the arch being mips64
Summary: Added test cases for O32 and N32 on MIPS64.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3175

llvm-svn: 204796
2014-03-26 11:39:07 +00:00
Daniel Sanders 85f482b02f [mips] $s8 is an alias for $fp in all ABI's, not just N32/N64.
llvm-svn: 204793
2014-03-26 11:05:24 +00:00
Daniel Sanders 91d4407cd8 [mips] Move the CHECK lines in mips*-register-names.s to make it more obvious which CHECK matches with which insn
This reveals a small mistake in mips-register-names.s ($sp is tested twice and
$s8 is not tested) which will be fixed in a follow-up commit.

llvm-svn: 204792
2014-03-26 10:54:30 +00:00
Rafael Espindola 85a8491a93 Correctly detect if a symbol uses a reserved section index or not.
The logic was incorrect for variables, causing them to end up in the wrong
section if the section had an index >= 0xff00.

llvm-svn: 204771
2014-03-26 00:16:43 +00:00
Rafael Espindola 10be0837ac Create .symtab_shndxr only when needed.
We need .symtab_shndxr if and only if a symbol references a section with an
index >= 0xff00.

The old code was trying to figure out if the section was needed ahead of time,
making it a fairly dependent on the code actually writing the table. It was
also somewhat conservative and would create the section in cases where it was
not needed.

If I remember correctly, the old structure was there so that the sections were
created in the same order gas creates them. That was valuable when MC's support
for ELF was new and we tested with elf-dump.py.

This patch refactors the symbol table creation to another class and makes it
obvious that .symtab_shndxr is really only created when we are about to output
a reference to a section index >= 0xff00.

While here, also improve the tests to use macros. One file is one section
short of needing .symtab_shndxr, the second one has just the right number.

llvm-svn: 204769
2014-03-25 23:44:25 +00:00
Daniel Sanders 71a89d92f6 [mips] '.set at=$0' should be equivalent to '.set noat'
Differential Revision: http://llvm-reviews.chandlerc.com/D3171

llvm-svn: 204714
2014-03-25 13:01:06 +00:00
Daniel Sanders b1d7e53a26 [mips] Correct testcase for .set at=$reg and emit the new warnings for numeric registers too.
Summary:
Remove the XFAIL added in my previous commit and correct the test such that
it correctly tests the expansion of the assembler temporary.

Also added a test to check that $at is always $1 when written by the
user.

Corrected the new assembler temporary warnings so that they are emitted for
numeric registers too.

Differential Revision: http://llvm-reviews.chandlerc.com/D3169

llvm-svn: 204711
2014-03-25 11:16:03 +00:00
Daniel Sanders e231ae9e3a [mips] Fix assembler temporary expansion and add associated warnings about the use of $at.
Summary:
The assembler temporary is normally $at ($1) but can be reassigned using
'.set at=$reg'. Regardless of which register is nominated as the assembler
temporary, $at remains $1 when written by the user.

Adds warnings under the following conditions:
* The register nominated as the assembler temporary is used by the user.
* '.set noat' is in effect and $at is used by the user.
Both of these only work for named registers. I have a follow up commit that makes it work for numeric registers as well.

XFAIL set-at-directive.s since it incorrectly tests that $at is redefined by
'.set at=$reg'. Testcases will follow in a separate commit.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3167

llvm-svn: 204710
2014-03-25 10:57:07 +00:00
Kevin Enderby 89299400ac Fix crashes when assembler directives are used that are not
for Mach-O object files by generating an error instead.

rdar://16335232

llvm-svn: 204687
2014-03-25 00:05:50 +00:00
Ulrich Weigand cae3a17a21 [PowerPC] Generate little-endian object files
As a first step towards real little-endian code generation, this patch
changes the PowerPC MC layer to actually generate little-endian object
files.  This involves passing the little-endian flag through the various
layers, including down to createELFObjectWriter so we actually get basic
little-endian ELF objects, emitting instructions in little-endian order,
and handling fixups and relocations as appropriate for little-endian.

The bulk of the patch is to update most test cases in test/MC/PowerPC
to verify both big- and little-endian encodings.  (The only test cases
*not* updated are those that create actual big-endian ABI code, like
the TLS tests.)

Note that while the object files are now little-endian, the generated
code itself is not yet updated, in particular, it still does not adhere
to the ELFv2 ABI.

llvm-svn: 204634
2014-03-24 18:16:09 +00:00
Daniel Sanders d89b13625e [mips] Add error message when trying to use $at in '.set noat' mode.
Summary:
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3158

llvm-svn: 204621
2014-03-24 16:48:01 +00:00
Daniel Sanders 68fd4c784c [mips] Add regression tests for parenthetic expressions in MIPS assembly.
Summary:
These expressions already worked but weren't tested.

Patch by Robert N. M. Watson and David Chisnall (it was originally two patches)
Their work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3156

llvm-svn: 204612
2014-03-24 15:42:21 +00:00
Daniel Sanders 01f9fc06e7 [mips] Allow dsubu to take an immediate as an alias for dsubiu.
Summary:
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3155

llvm-svn: 204611
2014-03-24 15:38:00 +00:00
Daniel Sanders a771fefb72 [mips] Implement shorthand add / sub forms for MIPS.
Summary:
- If only two registers are passed to a three-register operation, then the
  first argument is both source and destination register.

- If a non-register is passed as the last argument, generate the immediate
  version of the instruction.

Also mark DADD commutative and add scheduling information (to the generic
scheduler), and implement DSUB.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

CC: theraven

Differential Revision: http://llvm-reviews.chandlerc.com/D3148

llvm-svn: 204605
2014-03-24 14:05:39 +00:00
Rafael Espindola cfee7efde9 Teach llvm-readobj to print human friendly description of reserved sections.
llvm-svn: 204584
2014-03-24 05:00:34 +00:00
Rafael Espindola 717aeb6d7b Add back tests that were reverted in r204203.
They pass again with the fix in r204581.

llvm-svn: 204582
2014-03-24 03:48:15 +00:00
Rafael Espindola 022bb76879 Propagate section from base to derived symbol.
We were already propagating the section in

a = b

With this patch we also propagate it for

a = b + 1

llvm-svn: 204581
2014-03-24 03:43:21 +00:00
Rafael Espindola a6e3a599d1 Propagate types from symbol to aliases.
This is similar, but not identical to what gas does. The logic in MC is to just
compute the symbol table after parsing the entire file. GAS is mixed, given

.type b, @object
a = b
b:
.type b, @function

It will propagate the change and make 'a' a function. Given

.type b, @object
b:
a = b
.type b, @function

the type of 'a' is still object.

Since we do the computation in the end, we produce a function in both cases.

llvm-svn: 204555
2014-03-23 03:33:20 +00:00
Saleem Abdulrasool 44419fc3cd ARM IAS: properly handle function entries in .thumb
When a label is parsed, check if there is type information available for the
label.  If so, check if the symbol is a function.  If the symbol is a function
and we are in thumb mode and no explicit thumb_func has been emitted, adjust the
symbol data to indicate that the function definition is a thumb function.

The application of this inferencing is improved value handling in the object
file (the required thumb bit is set on symbols which are thumb functions).  It
also helps improve compatibility with binutils.

The one complication that arises from this handling is the MCAsmStreamer.  The
default implementation of getOrCreateSymbolData in MCStreamer does not support
tracking the symbol data.  In order to support the semantics of thumb functions,
track symbol data in assembly streamer.  Although O(n) in number of labels in
the TU, this is already done in various other streamers and as such the memory
overhead is not a practical concern in this scenario.

llvm-svn: 204544
2014-03-22 19:26:18 +00:00
Rafael Espindola 66f96fe0cb Fix the value computation in
sym_a:
sym_d = sym_a + 1

This is the smallest fix I was able to extract from what got reverted in
r204203.

llvm-svn: 204527
2014-03-21 22:00:29 +00:00
Rafael Espindola 734f105379 Move codegen test over to MC.
llvm-svn: 204490
2014-03-21 17:55:34 +00:00
Rafael Espindola d8eb29ecfd Split out the MC part of this test.
llvm-svn: 204481
2014-03-21 17:16:11 +00:00
Richard Sandiford dc6c2c953d [SystemZ] Add support for z196 float<->unsigned conversions
These complement the older float<->signed instructions.

llvm-svn: 204451
2014-03-21 10:56:30 +00:00
Jiangning Liu db55b02e1c This reverts commit r203762, "ARM: support emission of complex SO expressions".
The commit r203762 introduced silent failure for complext SO expression, and it's even worse than compiler crash.

llvm-svn: 204427
2014-03-21 02:51:01 +00:00
Rafael Espindola f1b10242c0 Convert a CodeGen test into a MC test.
llvm-svn: 204421
2014-03-21 00:55:42 +00:00
Rafael Espindola fc72577d92 Convert another CodeGen test into a MC test.
llvm-svn: 204412
2014-03-20 23:35:00 +00:00
Greg Fitzgerald 1843227551 llvm-objdump output hex to match binutils' objdump
Patch by Ted Woodward

llvm-svn: 204409
2014-03-20 22:55:15 +00:00
Rafael Espindola df1be1f4c5 Convert CodeGen test into a more specific MC test.
llvm-svn: 204406
2014-03-20 22:05:59 +00:00
Kai Nacke 93fe5e810d [MIPS] Add cpu octeon and some instructions
The Octeon cpu from Cavium Networks is mips64r2 based and has an extended
instruction set. In order to utilize this with LLVM, a new cpu feature "octeon"
and a subtarget feature "cnmips" is added. A small set of new instructions
(baddu, dmul, pop, dpop, seq, sne) is also added. LLVM generates dmul, pop and
dpop instructions with option -mcpu=octeon or -mattr=+cnmips.

llvm-svn: 204337
2014-03-20 11:51:58 +00:00
Zoran Jovanovic a0f5328984 Provide an operand for microMIPS wait instruction.
llvm-svn: 204329
2014-03-20 10:41:37 +00:00
Zoran Jovanovic 87d13e5ec1 Implementation of microMIPS 16-bit instructions MOVE and JALR.
Differential Revision: http://llvm-reviews.chandlerc.com/D3112

llvm-svn: 204325
2014-03-20 10:18:24 +00:00
Zoran Jovanovic 28221d8bc1 Mark alias symbols as microMIPS if necessary. Differential Revision: http://llvm-reviews.chandlerc.com/D3080
llvm-svn: 204323
2014-03-20 09:44:49 +00:00
Craig Topper ccb38c5588 Test case for r204305.
llvm-svn: 204316
2014-03-20 06:45:10 +00:00
Saleem Abdulrasool 39f773f939 Reapply 'ARM IAS: support .thumb_set'
Re-apply the change after it was reverted to do conflicts due to another change
being reverted.

llvm-svn: 204306
2014-03-20 06:05:33 +00:00
Rafael Espindola 7fadc0ea7d Look through variables when computing relocations.
Given

bar = foo + 4
	.long bar

MC would eat the 4. GNU as includes it in the relocation. The rule seems to be
that a variable that defines a symbol is used in the relocation and one that
does not define a symbol is evaluated and the result included in the relocation.

Fixing this unfortunately required some other changes:

* Since the variable is now evaluated, it would prevent the ELF writer from
  noticing the weakref marker the elf streamer uses. This patch then replaces
  that with a VariantKind in MCSymbolRefExpr.

* Using VariantKind then requires us to look past other VariantKind to see

	.weakref	bar,foo
	call	bar@PLT

  doing this also fixes

	zed = foo +2
	call zed@PLT

  so that is a good thing.

* Looking past VariantKind means that the relocation selection has to use
  the fixup instead of the target.

This is a reboot of the previous fixes for MC. I will watch the sanitizer
buildbot and wait for a build before adding back the previous fixes.

llvm-svn: 204294
2014-03-20 02:12:01 +00:00
Matheus Almeida 004d61f698 [mips] Making sure that a '.set noreorder' directive is correctly parsed
and emitted and that no NOPs are emitted in a 'noreorder section'.

llvm-svn: 204250
2014-03-19 16:20:19 +00:00
Rafael Espindola a73744e894 Make the test harder by using a non-zero offset.
llvm-svn: 204205
2014-03-19 00:26:58 +00:00
Rafael Espindola 7bbd5c2636 Revert "Add back r203962, r204028 and r204059."
This reverts commit r204178.

llvm-svn: 204203
2014-03-19 00:13:43 +00:00
NAKAMURA Takumi 2e21f63462 Move yet another test that requires ARM to an ARM test directory.
llvm-svn: 204198
2014-03-18 23:12:09 +00:00
Jim Grosbach e93b257c6a Move tests that require ARM to an ARM test directory.
llvm-svn: 204197
2014-03-18 22:43:59 +00:00
Jim Grosbach 448334a738 Darwin: Add assembler directives to create version-min load commands.
Allow object files to be tagged with a version-min load command for iOS
or MacOSX.

Teach macho-dump to understand the version-min load commands for
testcases.

rdar://11337778

llvm-svn: 204190
2014-03-18 22:09:05 +00:00
Rafael Espindola 574bfa12fa Add back r203962, r204028 and r204059.
This reverts commit r204137.

This includes a fix for handling aliases of aliases.

llvm-svn: 204178
2014-03-18 20:40:38 +00:00
Alexander Kornienko 64de613751 Revert r203962 and two revisions depending on it: r204028 and r204059.
The revision I'm reverting breaks handling of transitive aliases. This blocks us
and breaks sanitizer bootstrap:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/2651
(and checked locally by Alexey).

This revision is the result of:

  svn merge -r204059:204058 -r204028:204027 -r203962:203961 .

+ the regression test added to test/MC/ELF/alias.s

Another way to reproduce the regression with clang:
  $ cat q.c
  void a1();
  void a2() __attribute__((alias("a1")));
  void a3() __attribute__((alias("a2")));
  void a1() {}

  $ ~/work/llvm-build/bin/clang-3.5-good -c q.c && mv q.o good.o && \
      ~/work/llvm-build/bin/clang-3.5-bad -c q.c && mv q.o bad.o && \
      objdump -t good.o bad.o

    good.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g     F .text  0000000000000006 a3



    bad.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g       .text  0000000000000000 a3

llvm-svn: 204137
2014-03-18 10:36:11 +00:00
Saleem Abdulrasool 11543a9953 ARM IAS: support .thumb_set
This performs the equivalent of a .set directive in that it creates a symbol
which is an alias for another symbol or value which may possibly be yet
undefined.  This directive also has the added property in that it marks the
aliased symbol as being a thumb function entry point, in the same way that the
.thumb_func directive does.

The current implementation fails one test due to an unrelated issue.  Functions
within .thumb sections are not marked as thumb_func.  The result is that
the aliasee function is not valued correctly.

llvm-svn: 204059
2014-03-17 17:13:54 +00:00
NAKAMURA Takumi 3b3a4d9dac llvm/test/MC/MachO/gen-dwarf-cpp.s: Relax an expression to match DOS pat.
llvm-svn: 204030
2014-03-17 05:31:54 +00:00