850cc8998c
Remove asserts that will crash LLDB. These should be changed to return
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true/false in an extra boolean parameter and not cause the the binary that
us using the LLDB framework to crash.
llvm-svn: 132501
2011-06-02 22:23:35 +00:00
e242ebea50
Just use a SmallVector.
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I was confused whether new uint8_t[] would zero-initialize the returned
array, and it seems that so is gcc-4.0.
This should fix the test failures on darwin 9.
llvm-svn: 132500
2011-06-02 22:22:43 +00:00
dd0e5a5258
Make sure we don't lose our stop reply packet in the case where the other
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GDB server doesn't support the LLDB specific qThreadStopInfo packet.
llvm-svn: 132499
2011-06-02 22:22:38 +00:00
8672996e4d
Update the handle many of the packets that our current LLDB debugserver
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handles. Also fixed a case where the packet wouldn't be dumped if it returned
the unimplemented packet.
llvm-svn: 132498
2011-06-02 22:21:38 +00:00
0ddfbe230f
We already have support for using c++ headers from a custom location.
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Before this patch we would still link with the system libstdc++. It worked
fine most of the time, but would break if the used headers were a lot newer
than the system libraries.
This patch changes the driver to use the libraries corresponding to the
headers the user selected.
This fixes, for example, using 4.5 headers in a system with gcc 4.1.
llvm-svn: 132497
2011-06-02 22:18:46 +00:00
8c5014dc5e
Switch a ridiculous grep over to FileCheck.
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llvm-svn: 132496
2011-06-02 22:16:39 +00:00
f86a53493e
Testcase for r132493.
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llvm-svn: 132495
2011-06-02 22:12:42 +00:00
8eced30568
Update for r132493 change.
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llvm-svn: 132494
2011-06-02 22:11:49 +00:00
c928f59c90
Use Py_InitializeEx(0) instead of Py_Initialize,
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to prevent Python from installing its own signal
handlers.
llvm-svn: 132492
2011-06-02 22:09:43 +00:00
123363cf10
Reverted r132330, r132321, r132320, r132319 as per discussion. Will try in-test requirement declarations instead.
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llvm-svn: 132491
2011-06-02 21:55:39 +00:00
b58f59cdb3
Second try at getting noexcept on move and swap for deque. I changed std::alloctor to propagate_on_container_move_assignment so as to make deque<T> move assignment noexcept. What we really need is a compile-time switch that says an allocator always compares equal.
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llvm-svn: 132490
2011-06-02 21:38:57 +00:00
f7600949f4
Add Debian wheezy/sid to ToolChains.cpp. Patch by Michael Wild. PR10064.
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llvm-svn: 132489
2011-06-02 21:36:53 +00:00
5ca0837397
Remove dead code.
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llvm-svn: 132488
2011-06-02 21:31:00 +00:00
f02a376fbc
Update DBG_VALUEs while breaking anti dependencies.
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llvm-svn: 132487
2011-06-02 21:26:52 +00:00
f0759ef271
Fix encoding for VEXTdf.
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llvm-svn: 132486
2011-06-02 21:25:24 +00:00
5da0ff41d7
PR10067: Add missing safety check to call return transformation in MemCpyOpt::processStore. If something accesses the dest of the "copy" between the call and the copy, the performCallSlotOptzn transformation is not valid.
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llvm-svn: 132485
2011-06-02 21:24:42 +00:00
8a742f5f37
EmulateShiftReg() also accepts shifter type of SRType_ROR.
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llvm-svn: 132484
2011-06-02 21:00:34 +00:00
e5feef0fe1
During post RA scheduling, do not try to chase reg defs. to preserve DBG_VALUEs. This approach has several downsides, for example, it does not work when dbg value is a constant integer, it does not work if reg is defined more than once, it places end of debug value range markers in the wrong place. It even causes misleading incorrect debug info when duplicate DBG_VALUE instructions point to same reg def.
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Instead, use simpler approach and let DBG_VALUE follow its predecessor instruction. After live debug value analysis pass, all DBG_VALUE instruction are placed at the right place. Thanks Jakob for the hint!
llvm-svn: 132483
2011-06-02 20:07:12 +00:00
e37b939793
Add test for PR10068.
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llvm-svn: 132482
2011-06-02 20:02:48 +00:00
92dd466a1a
[PCH] Store the offsets of source location file entries and go through them
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in ASTReader::validateFileEntries().
This avoids going through all source location entries and fixes the performance regression.
Many thanks to Doug for the hint!
(rdar://9530587)
llvm-svn: 132481
2011-06-02 20:01:46 +00:00
9eebe11dd5
I've become quite disatsified with the lack of noexcept specifications on container move construction, move assignment operator and swap. Without proper decoration on at least move construction, vectors of containers will have unacceptable performance. Here's the fix for deque.
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llvm-svn: 132480
2011-06-02 20:00:14 +00:00
aa318ae495
Revert 132424 to fix PR10068.
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llvm-svn: 132479
2011-06-02 19:57:47 +00:00
351422bdc8
Andy pointed out a dumb omission in this test case. Thanks Andy!
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llvm-svn: 132477
2011-06-02 19:26:49 +00:00
ca9b7bbaa1
Add a new parse hint for multi-letter constraints in inline asm.
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Testcase will come when we use it.
Part of rdar://9119939
llvm-svn: 132476
2011-06-02 19:26:37 +00:00
d5a0a01b2d
Create new class, InputReaderStack, to better handle
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mutexes around input readers and prevent deadlocking; modify
Debugger to use the new class.
llvm-svn: 132475
2011-06-02 19:18:55 +00:00
9d4a8cf481
Change how we link libprofile_rt.a. While at it, refactor the code a bit.
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llvm-svn: 132474
2011-06-02 18:58:46 +00:00
e239a6920e
Jakob pointed out a dumb omission in this test case. Thanks Jakob!
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llvm-svn: 132472
2011-06-02 18:44:05 +00:00
50663b7485
Use RegisterClassInfo::getOrder in RAFast.
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This saves two virtual function calls and an Allocatable BitVector test,
making RAFast run 2% faster.
llvm-svn: 132471
2011-06-02 18:35:30 +00:00
b5964212f4
Add comment about Thread::GetStatus(), which returns the number of frames shown.
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llvm-svn: 132470
2011-06-02 18:02:15 +00:00
922a624144
Add -fno-gnu89-inline.
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llvm-svn: 132468
2011-06-02 17:30:53 +00:00
dac0238ed2
.cfi directive register parsing flexibility.
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Parsing a register name/number for .cfi directives can't assume that a
register name starts with a '%' token. Be more flexible and check for a
register number instead. Still unlikely to be perfect, but it allows us
to parse both plain identifiers as register names and integers as register
numbers, which is what we're wanting to support at this point.
llvm-svn: 132466
2011-06-02 17:14:04 +00:00
8a160cc42b
Reverts the Tooling changes as requested by Chris.
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llvm-svn: 132462
2011-06-02 16:58:33 +00:00
f9dc28313f
noexcept for forward_list.
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llvm-svn: 132461
2011-06-02 16:44:28 +00:00
fb2af643e4
Implement -fgnu89-inline. Fixes PR10041.
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llvm-svn: 132460
2011-06-02 16:13:27 +00:00
a87e836083
noexcept for deque.
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llvm-svn: 132459
2011-06-02 16:10:22 +00:00
8d530ad22a
Omit unnecessary stack copy when x87 input is a load.
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rdar://problem/6373334
llvm-svn: 132458
2011-06-02 15:57:11 +00:00
c8c4f7640a
Start with a zeroed CSRNum map.
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Found by valgrind.
llvm-svn: 132457
2011-06-02 12:07:44 +00:00
09e6667531
Initialize members to fix problem found by valgrind.
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llvm-svn: 132456
2011-06-02 05:43:49 +00:00
aff1060207
Use TRI::has{Sub,Super}ClassEq() where possible.
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No functional change.
llvm-svn: 132455
2011-06-02 05:43:46 +00:00
7f25c32d5b
Tweak testcase for ARM bot. rdar://problem/5993888
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llvm-svn: 132454
2011-06-02 05:05:39 +00:00
857bcdaf03
Tweak code completions for Objective-C Key-Value Observing. The
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+keyPathsForValuesAffecting<Key> completion was mislabeled as an
instance method, and +automaticallyNotifiesObserversOf<Key> was
missing entirely. Fixes <rdar://problem/9516762>.
llvm-svn: 132452
2011-06-02 04:02:27 +00:00
d6860522b2
Don't hardcode the %reg format in the streamer.
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llvm-svn: 132451
2011-06-02 02:34:55 +00:00
c58894bc36
Add a RegisterClassInfo class that lazily caches information about
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register classes.
It provides information for each register class that cannot be
determined statically, like:
- The number of allocatable registers in a class after filtering out the
reserved and invalid registers.
- The preferred allocation order with registers that overlap callee-saved
registers last.
- The last callee-saved register that overlaps a given physical register.
This information usually doesn't change between functions, so it is
reused for compiling multiple functions when possible. The many
possible combinations of reserved and callee saves registers makes it
unfeasible to compute this information statically in TableGen.
Use RegisterClassInfo to count available registers in various heuristics
in SimpleRegisterCoalescing, making the pass run 4% faster.
llvm-svn: 132450
2011-06-02 02:19:35 +00:00
a13ad2adcf
Use the correct accessor on CXXRecordDecl to know when a C++ class is dynamic.
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llvm-svn: 132449
2011-06-02 01:26:44 +00:00
2446869410
Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic.
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llvm-svn: 132448
2011-06-02 01:03:14 +00:00
fbf7e173d2
Fix 80-column violation.
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llvm-svn: 132447
2011-06-02 00:47:27 +00:00
4e2cefffd5
Revert r132426; this test passes more often than not, and we don't have a way to mark tests as intermittently failing at the moment.
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llvm-svn: 132446
2011-06-02 00:42:47 +00:00
d84c76f2a7
Test case for r132444.
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llvm-svn: 132445
2011-06-02 00:25:53 +00:00
6627752050
Custom-lower FRAMEADDR. Patch by Sasa Stankovic.
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llvm-svn: 132444
2011-06-02 00:24:44 +00:00
b579fe5f15
Add stuff for o32 ABI conformance.
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llvm-svn: 132443
2011-06-02 00:09:17 +00:00
Greg Clayton