Commit Graph

376086 Commits

Author SHA1 Message Date
Heejin Ahn c4f12a07a4 [WebAssembly] Remove old SDT_WebAssemblyCalls (NFC)
These are not used anymore.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D94036
2021-01-04 16:31:16 -08:00
Arthur Eubanks e30fbbe9a5 [JumpThreading][NewPM] Skip when target has divergent CF
Matches the legacy pass.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D94028
2021-01-04 16:08:08 -08:00
Roman Lebedev 32c47ebef1
[SimplifyCFG] SimplifyCondBranchToTwoReturns(): switch to non-permissive DomTree updates
... which requires not deleting an edge that just got deleted,
because we could be dealing with a block that didn't go through
ConstantFoldTerminator() yet, and thus has a degenerate cond br
with matching true/false destinations.
2021-01-05 01:26:37 +03:00
Roman Lebedev 110b3d7855
[SimplifyCFG] SimplifyEqualityComparisonWithOnlyPredecessor(): switch to non-permissive DomTree updates
... which requires not deleting an edge that just got deleted.
2021-01-05 01:26:37 +03:00
Roman Lebedev a8604e3d5b
[SimplifyCFG] simplifyIndirectBr(): switch to non-permissive DomTree updates
... which requires not deleting an edge that just got deleted.
2021-01-05 01:26:36 +03:00
Roman Lebedev ed9de61cc3
[SimplifyCFGPass] mergeEmptyReturnBlocks(): switch to non-permissive DomTree updates
... which requires not inserting an edge that already exists.
2021-01-05 01:26:36 +03:00
Roman Lebedev 3fb57222c4
[NFCI] SimplifyCFG: switch to non-permissive DomTree updates, where possible
Notably, this doesn't switch *every* case, remaining cases
don't actually pass sanity checks in non-permissve mode,
and therefore require further analysis.

Note that SimplifyCFG still defaults to not preserving DomTree by default,
so this is effectively a NFC change.
2021-01-05 01:26:36 +03:00
Roman Lebedev b4f519bddd
[NFCI] DwarfEHPrepare: update DomTree in non-permissive mode, when present
Being stricter will catch issues that would be just papered over
in permissive mode, and is likely faster.
2021-01-05 01:26:36 +03:00
Petr Hosek f67d3dbdb9 [clang] - Also look for devtoolset-10
devtoolset-10 has just been released so look for it as well.

Patch By: stephan.dollberg

Differential Revision: https://reviews.llvm.org/D92792
2021-01-04 14:24:46 -08:00
Thorsten Schütt 2fd11e0b1e Revert "[NFC, Refactor] Modernize StorageClass from Specifiers.h to a scoped enum (II)"
This reverts commit efc82c4ad2.
2021-01-04 23:17:45 +01:00
Sanjay Patel 36263a7ccc [LoopUtils] remove redundant opcode parameter; NFC
While here, rename the inaccurate getRecurrenceBinOp()
because that was also used to get CmpInst opcodes.

The recurrence/reduction kind should always refer to the
expected opcode for a reduction. SLP appears to be the
only direct caller of createSimpleTargetReduction(), and
that calling code ideally should not be carrying around
both an opcode and a reduction kind.

This should allow us to generalize reduction matching to
use intrinsics instead of only binops.
2021-01-04 17:05:28 -05:00
Thorsten Schütt efc82c4ad2 [NFC, Refactor] Modernize StorageClass from Specifiers.h to a scoped enum (II)
Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D93765
2021-01-04 22:58:26 +01:00
Juneyoung Lee abbef2fd46 [ValueTracking] isGuaranteedNotToBePoison should return true on undef
This is a one-line fix to isGuaranteedNotToBePoison to return true if
undef is given.
2021-01-05 06:50:02 +09:00
Arthur Eubanks 8e293fe6ad [NewPM][AMDGPU] Pass TargetMachine to AMDGPUSimplifyLibCallsPass
Missed in https://reviews.llvm.org/D93863.
2021-01-04 13:48:09 -08:00
Arthur Eubanks aa16903389 [test] Pin backedge-id-bug-xfail.ll to legacy PM
The new PM doesn't have region passes, so this doesn't really make sense in a NPM context.
2021-01-04 13:09:42 -08:00
Sanjay Patel 9766957524 [LoopUtils] reduce code for creatng reduction; NFC
We can return from each case instead creating a temporary
variable just to have a common return.
2021-01-04 16:05:03 -05:00
Sanjay Patel 58b6c5d932 [LoopUtils] reorder logic for creating reduction; NFC
If we are using a shuffle reduction, we don't need to
go through the switch on opcode - return early.
2021-01-04 16:05:02 -05:00
Cameron McInally 92be640bd7 [FPEnv][AMDGPU] Disable FSUB(-0,X)->FNEG(X) DAGCombine when subnormals are flushed
This patch disables the FSUB(-0,X)->FNEG(X) DAG combine when we're flushing subnormals. It requires updating the existing AMDGPU tests to use the fneg IR instruction, in place of the old fsub(-0,X) canonical form, since AMDGPU is the only backend currently checking the DenormalMode flags.

Note that this will require follow-up optimizations to make sure the FSUB(-0,X) form is handled appropriately

Differential Revision: https://reviews.llvm.org/D93243
2021-01-04 14:44:10 -06:00
Whitney Tsang de6d43f16c Revert "[LoopNest] Allow empty basic blocks without loops"
This reverts commit 9a17bff4f7.
2021-01-04 20:42:21 +00:00
Arthur Eubanks 191552344b [NewPM][AMDGPU] Make amdgpu-aa work with NewPM
An AMDGPUAA class already existed that was supposed to work with the new
PM, but it wasn't tested and was a bit broken.

Fix up the existing classes to have the right keys/parameters.
Wire up AMDGPUAA inside AMDGPUTargetMachine.

Add it to the list of alias analyses for the "default" AAManager since
in adjustPassManager() amdgpu-aa is added into the pipeline at the
beginning.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D93914
2021-01-04 12:36:27 -08:00
Arthur Eubanks 4e838ba9ea [NewPM][AMDGPU] Port amdgpu-always-inline
And add to AMDGPU opt pipeline.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D94025
2021-01-04 12:27:01 -08:00
Arthur Eubanks fd323a897c [NewPM][AMDGPU] Port amdgpu-printf-runtime-binding
And add to AMDGPU opt pipeline.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D94026
2021-01-04 12:25:50 -08:00
Craig Topper fe597efc30 [RISCV] Remove unused method RISCVInstPrinter::printSImm5Plus1. NFC
simm5_plus1 is only used by InstAliases so should never be printed.
2021-01-04 12:21:35 -08:00
Valentin Clement 4d0aad96e4 [flang][openmp] Make Reduction clause part of OmpClause
After discussion in D93105 we found that the reduction clause was not following
the common OmpClause convention. This patch makes reduction clause part of OmpClause
with a value of OmpReductionClause in a similar way than task_reduction.
The unparse function for OmpReductionClause is adapted since the keyword and parenthesis
are issued by the corresponding unparse function for parser::OmpClause::Reduction.

Reviewed By: sameeranjoshi

Differential Revision: https://reviews.llvm.org/D93482
2021-01-04 15:19:00 -05:00
Hongtao Yu 4034f9273e Switching Clang UniqueInternalLinkageNamesPass scheduling to using the LLVM one with newpm.
As a follow-up to D93656, I'm switching the Clang UniqueInternalLinkageNamesPass scheduling to using the LLVM one with newpm.

Test Plan:

Reviewed By: aeubanks, tmsriram

Differential Revision: https://reviews.llvm.org/D94019
2021-01-04 12:04:46 -08:00
Whitney Tsang 9a17bff4f7 [LoopNest] Allow empty basic blocks without loops
Allow loop nests with empty basic blocks without loops in different
levels as perfect.

Reviewers: Meinersbur

Differential Revision: https://reviews.llvm.org/D93665
2021-01-04 19:59:50 +00:00
Arthur Eubanks e1833e7493 [NewPM][AMDGPU] Port amdgpu-unify-metadata
And add to AMDGPU opt pipeline.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D94023
2021-01-04 11:57:46 -08:00
Arthur Eubanks a5f863e076 [NewPM][AMDGPU] Port amdgpu-propagate-attributes-early/late
And add to AMDGPU opt pipeline.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D94022
2021-01-04 11:53:37 -08:00
Kazu Hirata eb198f4c3c [llvm] Use llvm::any_of (NFC) 2021-01-04 11:42:47 -08:00
Kazu Hirata 0edbc90ec5 [DebugInfo] Use llvm::append_range (NFC) 2021-01-04 11:42:45 -08:00
Kazu Hirata 848e8f938f [llvm] Construct SmallVector with iterator ranges (NFC) 2021-01-04 11:42:44 -08:00
Arthur Eubanks b8f22f9d30 [NewPM][AMDGPU] Run InternalizePass when -amdgpu-internalize-symbols
The legacy PM doesn't run EP_ModuleOptimizerEarly on -O0, so skip
running it here when given O0.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D93886
2021-01-04 11:34:40 -08:00
Craig Topper dc9ac0e820 [RISCV] Replace i32 with XLenVT in (add AddrFI, simm12) isel patterns.
With the i32 these patterns will only fire on RV32, but they
don't look RV32 specific.

Reviewed By: lenary

Differential Revision: https://reviews.llvm.org/D93843
2021-01-04 10:53:27 -08:00
Sanjay Patel 6976812129 [InstCombine] add tests for ashr+icmp; NFC 2021-01-04 13:35:07 -05:00
Matt Arsenault d8938c8bb5 CodeGen: Use Register 2021-01-04 12:53:06 -05:00
Philip Reames 7c63aac7bd Revert "[LoopDeletion] Break backedge of loops when known not taken"
This reverts commit dd6bb367d1.

Multi-stage builders are showing an assertion failure w/LCSSA not being preserved on entry to IndVars.  Reason isn't clear, reverting while investigating.
2021-01-04 09:50:47 -08:00
Philip Reames dd6bb367d1 [LoopDeletion] Break backedge of loops when known not taken
The basic idea is that if SCEV can prove the backedge isn't taken, we can go ahead and get rid of the backedge (and thus the loop) while leaving the rest of the control in place. This nicely handles cases with dispatch between multiple exits and internal side effects.

Differential Revision: https://reviews.llvm.org/D93906
2021-01-04 09:19:29 -08:00
Joseph Huber fe5d51a489 [OpenMP] Add using bit flags to select Libomptarget Information
Summary:
This patch adds more fine-grained support over which information is output from the libomptarget runtime when run with the environment variable LIBOMPTARGET_INFO set. An extensible set of flags can be used to pick and choose which information the user is interested in.

Reviewers: jdoerfert JonChesterfield grokos

Differential Revision: https://reviews.llvm.org/D93727
2021-01-04 12:03:15 -05:00
Simon Pilgrim f7463ca3cc [ProfileData] GCOVFile::readGCNO - silence undefined pointer warning. NFCI.
Silence clang static analyzer warning that 'fn' could still be in an undefined state - this shouldn't happen depending on the likely tag order, but the analyzer can't know that.
2021-01-04 16:50:05 +00:00
Jon Chesterfield 76bfbb74d3 [libomptarget][amdgpu] Call into deviceRTL instead of ockl
[libomptarget][amdgpu] Call into deviceRTL instead of ockl

Amdgpu codegen presently emits a call into ockl. The same functionality
is already present in the deviceRTL. Adds an amdgpu specific entry point
to avoid the dependency. This lets simple openmp code (specifically, that
which doesn't use libm) run without rocm device libraries installed.

Reviewed By: ronlieb

Differential Revision: https://reviews.llvm.org/D93356
2021-01-04 16:48:47 +00:00
Krzysztof Parzyszek c55b609b77 [Hexagon] Fix bad SDNodeXForm
Fixes https://llvm.org/PR48651
2021-01-04 10:43:01 -06:00
Florian Hahn c367258b5c
[SimplifyCFG] Enabled hoisting late in LTO pipeline.
bb7d3af113 disabled hoisting in SimplifyCFG by default, but enabled it
late in the pipeline. But it appears as if the LTO pipelines got missed.

This patch adjusts the LTO pipelines to also enable hoisting in the
later stages.

Unfortunately there's no easy way to add a test for the change I think.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D93684
2021-01-04 16:26:58 +00:00
Michael Munday e2d3d501ef [RISCV][NFC] Add additional cmov tests
One or more cmov instructions could be generated for these functions
when the Zbt extension is present.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D93768
2021-01-04 16:01:40 +00:00
Florian Hahn ed936aad78
[InterleavedAccess] Return correct 'modified' status.
Both tryReplaceExtracts and replaceBinOpShuffles may modify the IR, even
if no interleaved loads are generated, but currently the pass pretends
no changes were made.

This patch updates the pass to return true if either of the functions
made any changes. In case of tryReplaceExtracts, changes are made if
there are any Extracts and true is returned.

`replaceBinOpShuffles` always makes changes if BinOpShuffles is not empty.
It also always returned true, so I went ahead and change it to just
`replaceBinOpShuffles`.

Fixes PR48208.

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D93997
2021-01-04 15:49:47 +00:00
Simon Pilgrim e9f401d8a2 [IR] CallBase::getBundleOpInfoForOperand - ensure Current iterator is defined. NFCI.
Fix clang static analyzer undefined pointer warning in the case Begin == End.
2021-01-04 15:30:15 +00:00
Simon Pilgrim 9f8c0d15c7 DeclCXX - Fix getAs<> null-dereference static analyzer warnings. NFCI.
getAs<> can return null if the cast is invalid, which can lead to null pointer deferences. Use castAs<> instead which will assert that the cast is valid.
2021-01-04 15:12:55 +00:00
Hansang Bae 82a29a62ab [OpenMP] Add definition/interface for target memory routines
The change includes new routines introduced in 5.1 and Fortran
interface.

Differential Revision: https://reviews.llvm.org/D93505
2021-01-04 08:12:57 -06:00
Simon Pilgrim 4d7cb6da9f [Sparc] SparcMCExpr::printVariantKind - fix Wcovered-switch-default gcc warning. NFCI. 2021-01-04 14:08:44 +00:00
Caroline Concatto 060cfd9795 [AArch64][SVE]Add cost model for masked gather and scatter for scalable vector.
A new TTI interface has been added 'Optional <unsigned>getMaxVScale' that
    returns the maximum vscale for a given target.
    When known getMaxVScale is used to compute the cost of masked gather scatter
    for scalable vector.

    Depends on D92094

    Differential Revision: https://reviews.llvm.org/D93030
2021-01-04 13:59:58 +00:00
Florian Hahn d38a0258a5
[AArch64] Add patterns for FMCLA*_indexed.
This patch adds patterns for the indexed variants of FCMLA. Mostly based
on a patch by Tim Northover.

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D92947
2021-01-04 13:45:51 +00:00