Summary:
When the function is compiled with soft-float or on CPU with no FPU, we
don't need to diagnose for a call from an ISR to a regular function.
Reviewers: jroelofs, eli.friedman
Reviewed By: jroelofs
Subscribers: aemerson, rengolin, javed.absar, cfe-commits
Differential Revision: https://reviews.llvm.org/D32918
llvm-svn: 302274
The idea for this originated from a really tricky bug: ISRs on ARM don't
automatically save off the VFP regs, so if say, memcpy gets interrupted and the
ISR itself calls memcpy, the regs are left clobbered when the ISR is done.
https://reviews.llvm.org/D28820
llvm-svn: 292375
The ARM-specific C attributes (currently just interrupt) need to check
for both the big- and little-endian versions of the triples, so that
they are accepted for both big and little endian targets.
TargetWindows and TargetMicrosoftCXXABI also only use the little-endian
triples, but this is correct as windows is not supported on big-endian
ARM targets (and this is asserted in lib/Basic/Targets.cpp).
Differential Revision: https://reviews.llvm.org/D24245
llvm-svn: 281596
This attribute allows users to use a modified C or C++ function as an ARM
exception-handling function and, with care, to successfully return control to
user-space after the issue has been dealt with.
rdar://problem/14207019
llvm-svn: 191769
Weiming Zhao