Commit Graph

17148 Commits

Author SHA1 Message Date
Micah Villmow f611fcf2c3 Forgot the SPIR test case.
llvm-svn: 164949
2012-10-01 17:07:51 +00:00
Michael Liao d756f06063 Fix PR13899
- Update maximal stack alignment when stack arguments are prepared before a
  call.
- Test cases are enhanced to show it's not a Win32 specific issue but a generic
  one.

llvm-svn: 164946
2012-10-01 16:44:04 +00:00
Chandler Carruth 9866b97f94 Fix more misspellings found by Duncan during review.
llvm-svn: 164940
2012-10-01 12:30:45 +00:00
Chandler Carruth 176ca71a82 Fix several issues with alignment. We weren't always accounting for type
alignment requirements of the new alloca. As one consequence which was
reported as a bug by Duncan, we overaligned memcpy calls to ranges of
allocas after they were rewritten to types with lower alignment
requirements. Other consquences are possible, but I don't have any test
cases for them.

llvm-svn: 164937
2012-10-01 12:16:54 +00:00
Benjamin Kramer 9fc3dc7781 SimplifyCFG: Don't crash when forming a switch bitmap with an undef default value.
Fixes PR13985.

llvm-svn: 164934
2012-10-01 11:31:48 +00:00
Chandler Carruth 54e8f0b4cf Refactor the PartitionUse structure to actually use the Use* instead of
a pair of instructions, one for the used pointer and the second for the
user. This simplifies the representation and also makes it more dense.

This was noticed because of the miscompile in PR13926. In that case, we
were running up against a fundamental "bad idea" in the speculation of
PHI and select instructions: the speculation and rewriting are
interleaved, which requires phi speculation to also perform load
rewriting! This is bad, and causes us to miss opportunities to do (for
example) vector rewriting only exposed after PHI speculation, etc etc.
It also, in the old system, required us to insert *new* load uses into
the current partition's use list, which would then be ignored during
rewriting because we had already extracted an end iterator for the use
list. The appending behavior (and much of the other oddities) stem from
the strange de-duplication strategy in the PartitionUse builder.
Amusingly, all this went without notice for so long because it could
only be triggered by having *different* GEPs into the same partition of
the same alloca, where both different GEPs were operands of a single
PHI, and where the GEP which was not encountered first also had multiple
uses within that same PHI node... Hence the insane steps required to
reproduce.

So, step one in fixing this fundamental bad idea is to make the
PartitionUse actually contain a Use*, and to make the builder do proper
deduplication instead of funky de-duplication. This is enough to remove
the appending behavior, and fix the miscompile in PR13926, but there is
more work to be done here. Subsequent commits will lift the speculation
into its own visitor. It'll be a useful step toward potentially
extracting all of the speculation logic into a generic utility
transform.

The existing PHI test case for repeated operands has been made more
extreme to catch even these issues. This test case, run through the old
pass, will exactly reproduce the miscompile from PR13926. ;] We were so
close here!

llvm-svn: 164925
2012-10-01 01:49:22 +00:00
Duncan Sands 5e561bbd5d Ignore apparent buffer overruns on external or weak globals. This is a major
source of false positives due to globals being declared in a header with some
kind of incomplete (small) type, but the actual definition being bigger.

llvm-svn: 164912
2012-09-30 07:30:10 +00:00
Nadav Rotem abbe665154 Revert r164910 because it causes failures to several phase2 builds.
llvm-svn: 164911
2012-09-30 07:17:56 +00:00
Nadav Rotem 45715b25f7 A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
 int a = p->a;
 int b = p->b;
 q->a = a;
 q->b = b;

2. Consecutive stores where the values are constants. Foe example:
 q->a = 4;
 q->b = 5;

llvm-svn: 164910
2012-09-30 06:24:14 +00:00
Bob Wilson e8a549cd92 Add LLVM support for Swift.
llvm-svn: 164899
2012-09-29 21:43:49 +00:00
Bob Wilson 63605ef378 Whitespace.
llvm-svn: 164898
2012-09-29 21:27:31 +00:00
Chandler Carruth 903790eff5 Fix a somewhat surprising miscompile where code relying on an ABI
alignment could lose it due to the alloca type moving down to a much
smaller alignment guarantee.

Now SROA will actively compute a proper alignment, factoring the target
data, any explicit alignment, and the offset within the struct. This
will in some cases lower the alignment requirements, but when we lower
them below those of the type, we drop the alignment entirely to give
freedom to the code generator to align it however is convenient.

Thanks to Duncan for the lovely test case that pinned this down. =]

llvm-svn: 164891
2012-09-29 10:41:21 +00:00
Duncan Sands fb9d30dd64 Speculatively revert commit 164885 (nadav) in the hope of ressurecting a pile of
buildbots.  Original commit message:

A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
  int a = p->a;
  int b = p->b;
  q->a = a;
  q->b = b;

2. Consecutive stores where the values are constants. Foe example:
  q->a = 4;
  q->b = 5;

llvm-svn: 164890
2012-09-29 10:25:35 +00:00
Nadav Rotem a2e7ea2f18 A DAGCombine optimization for merging consecutive stores. This optimization is not profitable in many cases
because moden processos can store multiple values in parallel, and preparing the consecutive store requires
some work.  We only handle these cases:

1. Consecutive stores where the values and consecutive loads. For example:
  int a = p->a;
  int b = p->b;
  q->a = a;
  q->b = b;

2. Consecutive stores where the values are constants. Foe example:
  q->a = 4;
  q->b = 5;

llvm-svn: 164885
2012-09-29 06:33:25 +00:00
Evan Cheng 9e99f0c40d Add test case for r164850.
llvm-svn: 164867
2012-09-29 00:12:08 +00:00
Evan Cheng 64a223aed8 Do not delete BBs if their addresses are taken. rdar://12396696
llvm-svn: 164866
2012-09-28 23:58:57 +00:00
Akira Hatanaka 044d028e3c MIPS DSP: add operands to make sure instruction strings are being matched.
llvm-svn: 164849
2012-09-28 21:23:16 +00:00
Akira Hatanaka d66f489640 MIPS DSP: other miscellaneous instructions.
llvm-svn: 164845
2012-09-28 20:50:31 +00:00
Manman Ren 009cd82c59 Testcase for r164835
llvm-svn: 164842
2012-09-28 20:26:33 +00:00
Akira Hatanaka 334dad6aea MIPS DSP: ADDUH.QB instruction sub-class.
llvm-svn: 164840
2012-09-28 20:16:04 +00:00
Benjamin Kramer 255dea4b90 CorrelatedPropagation: BasicBlock::removePredecessor can simplify PHI nodes. If the it's the condition of a SwitchInst, reload it.
Fixes PR13972.

llvm-svn: 164818
2012-09-28 10:42:50 +00:00
Benjamin Kramer ed84360a45 GlobalOpt: non-constexpr bitcasts or GEPs can occur even if the global value is only stored once.
Fixes PR13968.

llvm-svn: 164815
2012-09-28 10:01:27 +00:00
Nick Lewycky 156999f8b9 Surprisingly, we missed a trivial case here. Fix that!
llvm-svn: 164814
2012-09-28 09:33:53 +00:00
Meador Inge 7fbc364ecb instcombine: Add more test cases for __strncpy_chk simplification
llvm-svn: 164800
2012-09-27 21:21:31 +00:00
Meador Inge 213d642840 instcombine: Add more test cases for __strcpy_chk simplification
llvm-svn: 164799
2012-09-27 21:21:28 +00:00
Meador Inge 058e29c432 instcombine: Add more test cases for __memmove_chk simplification
llvm-svn: 164798
2012-09-27 21:21:25 +00:00
Meador Inge 0d402f06fe instcombine: Add more test cases for __memcpy_chk simplification
llvm-svn: 164797
2012-09-27 21:21:21 +00:00
Meador Inge 6f01da1c99 instcombine: Add more test cases for __memset_chk simplification
llvm-svn: 164796
2012-09-27 21:21:18 +00:00
Jakob Stoklund Olesen 8919aa508d Enable the new coalescer algorithm by default.
The new coalescer is better at merging values into unused vector lanes,
improving NEON code.

llvm-svn: 164794
2012-09-27 21:06:02 +00:00
Akira Hatanaka a9183eda74 MIPS DSP: ABSQ_S.PH instruction sub-class.
llvm-svn: 164787
2012-09-27 19:09:21 +00:00
Akira Hatanaka 892b1046c6 MIPS DSP: SHLL.QB instruction sub-class.
llvm-svn: 164786
2012-09-27 19:05:08 +00:00
Benjamin Kramer c2081d1c19 Fix a integer overflow in SimplifyCFG's look up table formation logic.
If the width is very large it gets truncated from uint64_t to uint32_t when
passed to TD->fitsInLegalInteger. The truncated value can fit in a register.
This manifested in massive memory usage or crashes (PR13946).

llvm-svn: 164784
2012-09-27 18:29:58 +00:00
Jakob Stoklund Olesen 1d19582a8f Avoid dereferencing a NULL pointer.
Fixes PR13943.

llvm-svn: 164778
2012-09-27 16:34:19 +00:00
Sylvestre Ledru 91ce36c986 Revert 'Fix a typo 'iff' => 'if''. iff is an abreviation of if and only if. See: http://en.wikipedia.org/wiki/If_and_only_if Commit 164767
llvm-svn: 164768
2012-09-27 10:14:43 +00:00
Sylvestre Ledru 721cffd53a Fix a typo 'iff' => 'if'
llvm-svn: 164767
2012-09-27 09:59:43 +00:00
Nick Lewycky 7b4cd228aa Prefer shuffles to selects. Backends love shuffles!
llvm-svn: 164763
2012-09-27 08:33:56 +00:00
Jush Lu 47172a064f [arm-fast-isel] Add support for ELF PIC.
This is a preliminary step towards ELF support; currently ARMFastISel hasn't
been used for ELF object files yet.

llvm-svn: 164759
2012-09-27 05:21:41 +00:00
Akira Hatanaka 9e4e5a87c4 Test case for r164755 and 164756.
llvm-svn: 164757
2012-09-27 04:12:30 +00:00
Akira Hatanaka d09642beb3 MIPS DSP: ADDU.QB instruction sub-class.
llvm-svn: 164754
2012-09-27 03:13:59 +00:00
Akira Hatanaka e4bd054f98 MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction.
llvm-svn: 164751
2012-09-27 02:15:57 +00:00
Akira Hatanaka 9061a46443 MIPS DSP: all the remaining instructions which read or write accumulators.
llvm-svn: 164750
2012-09-27 02:11:20 +00:00
Akira Hatanaka 1babeaa44c MIPS DSP: add support for extract-word instructions.
llvm-svn: 164749
2012-09-27 02:05:42 +00:00
Akira Hatanaka 5eeac4f813 MIPS DSP: add vector load/store patterns.
llvm-svn: 164744
2012-09-27 01:50:59 +00:00
Jim Grosbach c03a0c241e X86_32: Large Symbol+Offset relocations.
If the offset is more than 24-bits, it won't fit in a scattered
relocation offset field, so we fall back to using a non-scattered
relocation.

rdar://12358909

llvm-svn: 164724
2012-09-26 21:27:45 +00:00
Duncan Sands 8598a0ec80 Now that invoke of an intrinsic is possible (for the llvm.do.nothing intrinsic)
teach the callgraph logic to not create callgraph edges to intrinsics for invoke
instructions; it already skips this for call instructions.  Fixes PR13903.

llvm-svn: 164707
2012-09-26 17:16:01 +00:00
Hans Wennborg cd3a11f725 Address Duncan's comments on r164684:
- Put statistics in alphabetical order
- Don't use getZextValue when building TableInt, just use APInts
- Introduce Create{Z,S}ExtOrTrunc in IRBuilder.

llvm-svn: 164696
2012-09-26 14:01:53 +00:00
Chandler Carruth 3e4273dd0c When rewriting the pointer operand to a load or store which has
alignment guarantees attached, re-compute the alignment so that we
consider offsets which impact alignment.

llvm-svn: 164690
2012-09-26 10:45:28 +00:00
Chandler Carruth 871ba7249c Teach all of the loads, stores, memsets and memcpys created by the
rewriter in SROA to carry a proper alignment. This involves
interrogating various sources of alignment, etc. This is a more complete
and principled fix to PR13920 as well as related bugs pointed out by Eli
in review and by inspection in the area.

Also by inspection fix the integer and vector promotion paths to create
aligned loads and stores. I still need to work up test cases for
these... Sorry for the delay, they were found purely by inspection.

llvm-svn: 164689
2012-09-26 10:27:46 +00:00
NAKAMURA Takumi aaf189b8cf ARM/atomicrmw_minmax.ll: Fix RUN line.
llvm-svn: 164687
2012-09-26 10:12:20 +00:00
Benjamin Kramer 205d70ed28 Fix tests that didn't test anything.
llvm-svn: 164686
2012-09-26 09:51:39 +00:00