Commit Graph

278119 Commits

Author SHA1 Message Date
Konstantin Zhuravlyov c40d9f2e5d AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
- Add gfx704
    - Change bonaire to gfx704
  - Remove gfx804
  - Remove gfx901
  - Remove gfx903

Differential Revision: https://reviews.llvm.org/D40046

llvm-svn: 320194
2017-12-08 20:52:28 +00:00
Simon Pilgrim 5f7fcb2ea9 [X86] CMOV pseudo instructions shouldn't need scheduling info as they should be lowered early
llvm-svn: 320193
2017-12-08 20:42:35 +00:00
Simon Pilgrim f621dcf8d7 [X86][X87] Tag x87 load/store instructions scheduler classes
llvm-svn: 320192
2017-12-08 20:31:48 +00:00
Alexey Bataev e83b3e89e6 [OPENMP] Simplify codegen for loop iteration variables in loop preamble.
Initial patch could cause trouble in the optimized code because of the
incorrectly generated lifetime intrinsics.

llvm-svn: 320191
2017-12-08 20:18:58 +00:00
Craig Topper 7f0d456ef8 [X86] Teach lowering to only let through (insert_subvector (vXi1 zeros), subvec, 0) for vector sizes that have native KSHIFT support.
For narrow sizes we'll widen the zero vector and widen the insert. Then do an extract_subvector to get back down to correct size.

This allows us to remove some patterns from the isel table that had to COPY_TO_REGCLASS to an oversized register, do the shift and then COPY_TO_REGCLASS back to the narrow register. Now this is represented explicitly in the DAG.

This seems to have perturbed the register allocation in one of the tests, but the number of instructions didn't change.

llvm-svn: 320190
2017-12-08 20:10:33 +00:00
Simon Pilgrim 6415f56c79 [X86][X87] Tag x87 float compare instructions scheduler classes
llvm-svn: 320189
2017-12-08 20:10:31 +00:00
Matt Arsenault 73ce93b08b AMDGPU: Set IntrReadMem on memtime intrinsics
llvm-svn: 320188
2017-12-08 20:01:02 +00:00
Matt Arsenault 856777d8c9 AMDGPU: image_getlod and image_getresinfo do not read memory
llvm-svn: 320187
2017-12-08 20:00:57 +00:00
Matt Arsenault ecad0d5364 AMDGPU: Preserve MMO in adjustWritemask
Follow up to r319705. Currently the MMO is
produced after this in the custom inserter,
so this doesn't change anything yet.

llvm-svn: 320186
2017-12-08 20:00:45 +00:00
Vedant Kumar 9174b684b7 [ubsan] array-bounds: Ignore params with constant size
This is a follow-up to r320128. Eli pointed out that there is some gray
area in the language standard about whether the constant size is exact,
or a lower bound.

https://reviews.llvm.org/D40940

llvm-svn: 320185
2017-12-08 19:51:42 +00:00
Shoaib Meenai d9073510b7 [llvm] Add install-distribution-stripped
This is identical to the install-distribution target, except that it
strips the installed binaries.

Differential Revision: https://reviews.llvm.org/D40689

llvm-svn: 320184
2017-12-08 19:44:45 +00:00
Shoaib Meenai 038fd0056a [cmake] Only pass CMAKE_SYSROOT if non-empty
In my build environment (cmake 3.6.1 and gcc 4.8.5 on CentOS 7), having
an empty CMAKE_SYSROOT in the cache results in --sysroot="" being passed
to all compile commands, and then the compiler errors out because of the
empty sysroot. Only set CMAKE_SYSROOT if non-empty to avoid this.

Differential Revision: https://reviews.llvm.org/D40934

llvm-svn: 320183
2017-12-08 19:42:47 +00:00
Shoaib Meenai e8828d49d0 [runtimes] Add install-*-stripped targets
These should be the only remaining missing install-*-stripped targets.
They're modeled after the existing install targets.

Differential Revision: https://reviews.llvm.org/D40927

llvm-svn: 320182
2017-12-08 19:42:46 +00:00
Xinliang David Li 3905953582 Update test case for r320180
llvm-svn: 320181
2017-12-08 19:38:42 +00:00
Xinliang David Li d91057bf52 Revert r320104: infinite loop profiling bug fix
Causes unexpected memory issue with New PM this time.
The new PM invalidates BPI but not BFI, leaving the
reference to BPI from BFI invalid.

Abandon this patch.  There is a more general solution
which also handles runtime infinite loop (but not statically).

llvm-svn: 320180
2017-12-08 19:38:07 +00:00
Brian M. Rzycki 0eae123d9e [JumpThreading] Minor comment cleanup. NFC. (test commit)
llvm-svn: 320179
2017-12-08 19:36:32 +00:00
Peter Collingbourne d1eefa993b ELF: Ignore --long-plt flag.
This flag can be ignored because we always emit long PLTs.

Differential Revision: https://reviews.llvm.org/D41025

llvm-svn: 320178
2017-12-08 19:36:19 +00:00
Simon Pilgrim 2db2851378 [X86][MPX] Tag TSX/HLE/SGX instructions scheduler classes
Currently tagged these as system instructions.

llvm-svn: 320177
2017-12-08 19:26:22 +00:00
Konstantin Zhuravlyov e30f88f3a9 AMDGPU: Report Arg's Value name in metadata if kernel_arg_name metadata is not available
Differential Revision: https://reviews.llvm.org/D40924

llvm-svn: 320176
2017-12-08 19:22:12 +00:00
Rafael Espindola 1dd30ddd45 Make addReservedSymbols a static helper. NFC.
llvm-svn: 320175
2017-12-08 19:13:27 +00:00
Michael Trent ad840d2206 Reverting r320166 to fix test failures.
llvm-svn: 320174
2017-12-08 19:09:26 +00:00
Simon Pilgrim 42fcda9a6c [X86][MPX] Tag MPX instructions scheduler classes
Currently tagged these as system instructions, once we have uses for them (ASAN?) and they are faster we will need to improve on this.

llvm-svn: 320173
2017-12-08 19:03:42 +00:00
Sam Clegg 2e25e896fb [WebAssembly] Improve wasm test cases
Add test for weakly defined symbols with the same name

Improve test for call-indirect to include the same call in two
different objects. This lays the ground work to improve the
output via de-duplicating the indirect call table:
   https://reviews.llvm.org/D40989

Also make all tests consistently pass -mtriple rather than
declaring in the sources.

Differential Revision: https://reviews.llvm.org/D41024

llvm-svn: 320172
2017-12-08 18:37:44 +00:00
Sanjay Patel d4468912b0 [x86] use hasAVX2() rather than hasInt256(); NFC
These are aliases, but the thing we're checking here is that the target has
vpsllv*, not that the data type is 256-bit. Those instructions exist for
128-bit vectors too...but sadly, not for all element sizes.

llvm-svn: 320170
2017-12-08 18:35:51 +00:00
Simon Pilgrim 8e39dc36b8 [X86] Tag move immediate instructions scheduler classes
llvm-svn: 320169
2017-12-08 18:35:40 +00:00
Kostya Serebryany 67a3af0991 [hwasan] typo in docs
llvm-svn: 320168
2017-12-08 18:14:03 +00:00
Sam Clegg 2c096bacc6 [WebAssembly] Add --no-entry argument
This adds a `--no-entry` argument to wasm LLD used to
suppress the default `_start` entry point.

Patch by Nicholas Wilson!

Differential Revision: https://reviews.llvm.org/D40725

llvm-svn: 320167
2017-12-08 17:58:25 +00:00
Michael Trent de5209bdbd Updated llvm-objdump to display local relocations in Mach-O binaries
Summary:
llvm-objdump's Mach-O parser was updated in r306037 to display external
relocations for MH_KEXT_BUNDLE file types. This change extends the Macho-O
parser to display local relocations for MH_PRELOAD files. When used with
the -macho option relocations will be displayed in a historical format.

rdar://35778019

Reviewers: enderby

Reviewed By: enderby

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40867

llvm-svn: 320166
2017-12-08 17:51:04 +00:00
Kamil Rytarowski bb9a852afd Fix a comment in the code
The -ldl library is missing on NetBSD too, make the comment more generic.

llvm-svn: 320165
2017-12-08 17:38:25 +00:00
Davide Italiano b5a62cc81a [DebugInfo] Use llc instead of llc_dwarf to fix this test.
We work around the fact that some platforms add a triple when
they expand llc_dwarf in lit.

llvm-svn: 320164
2017-12-08 17:15:50 +00:00
Shoaib Meenai 7bd1c95a95 [libunwind] Create install-unwind-stripped target manually
This supports using a newer libunwind with an older installation of LLVM
(whose cmake modules wouldn't have add_llvm_install_targets).

llvm-svn: 320163
2017-12-08 17:15:05 +00:00
Hans Wennborg 5791ce77ba Revert "Unify implementation of our two different flavours of -Wtautological-compare."
> Unify implementation of our two different flavours of -Wtautological-compare.
>
> In so doing, fix a handful of remaining bugs where we would report false
> positives or false negatives if we promote a signed value to an unsigned type
> for the comparison.

This caused a new warning in Chromium:

../../base/trace_event/trace_log.cc:1545:29: error: comparison of constant 64
with expression of type 'unsigned int' is always true
[-Werror,-Wtautological-constant-out-of-range-compare]
  DCHECK(handle.event_index < TraceBufferChunk::kTraceBufferChunkSize);
         ~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

The 'unsigned int' is really a 6-bit bitfield, which is why it's always
less than 64.

I thought we didn't use to warn (with out-of-range-compare) when comparing
against the boundaries of a type?

llvm-svn: 320162
2017-12-08 16:54:08 +00:00
Simon Pilgrim 19d460b066 [X86][SHA] Tag SHA instructions scheduler classes
Put these under VecIMul itinerary classes for now - seems to be a good average value

llvm-svn: 320161
2017-12-08 16:38:41 +00:00
Kostya Kortchinsky 9fcb91b3eb [scudo] Minor code generation improvement
Summary:
It looks like clang was generating somewhat weird assembly with the current
code. `FromPrimary`, even though `const`,  was replaced every time with the code
generated for `size <= SizeClassMap::kMaxSize` instead of using a variable or
register, and `FromPrimary` didn't induce `ClassId != 0` for the compiler, so a
dead branch was generated for `getActuallyAllocatedSize(Ptr, ClassId)` since
it's never called for `ClassId = 0` (Secondary backed allocations) [this one
was more wishful thinking on my side than anything else].

I rearranged the code bit so that the generated assembly is less clunky.

Also changed 2 whitespace inconsistencies that were bothering me.

Reviewers: alekseyshl, flowerhack

Reviewed By: flowerhack

Subscribers: llvm-commits, #sanitizers

Differential Revision: https://reviews.llvm.org/D40976

llvm-svn: 320160
2017-12-08 16:36:37 +00:00
Simon Pilgrim 4ba3314d55 [X86] Tag VIA PadLock crypto instructions scheduler classes
llvm-svn: 320159
2017-12-08 16:06:40 +00:00
Simon Pilgrim 1ddcae665e [X86] Tag PKU/INVPCID/RDPID/SMAP/SMX/PTWRITE system instructions scheduler classes
llvm-svn: 320158
2017-12-08 15:48:37 +00:00
Alexey Bataev ec95c6cc0a [InstCombine] PR35354: Convert store(bitcast, load bitcast (select (Cond, &V1, &V2)) --> store (, load (select(Cond, load &V1, load &V2)))
Summary:
If we have the code like this:
```
float a, b;
a = std::max(a ,b);
```
it is converted into something like this:
```
%call = call dereferenceable(4) float* @_ZSt3maxIfERKT_S2_S2_(float* nonnull dereferenceable(4) %a.addr, float* nonnull dereferenceable(4) %b.addr)
%1 = bitcast float* %call to i32*
%2 = load i32, i32* %1, align 4
%3 = bitcast float* %a.addr to i32*
store i32 %2, i32* %3, align 4
```
After inlinning this code is converted to the next:
```
%1 = load float, float* %a.addr
%2 = load float, float* %b.addr
%cmp.i = fcmp fast olt float %1, %2
%__b.__a.i = select i1 %cmp.i, float* %a.addr, float* %b.addr
%3 = bitcast float* %__b.__a.i to i32*
%4 = load i32, i32* %3, align 4
%5 = bitcast float* %arrayidx to i32*
store i32 %4, i32* %5, align 4

```
This pattern is not recognized as minmax pattern.
Patch solves this problem by converting sequence
```
store (bitcast, (load bitcast (select ((cmp V1, V2), &V1, &V2))))
```
to a sequence
```
store (,load (select((cmp V1, V2), &V1, &V2)))
```
After this the code is recognized as minmax pattern.

Reviewers: RKSimon, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D40304

llvm-svn: 320157
2017-12-08 15:32:10 +00:00
Simon Pilgrim 83708cabc0 [X86][AVX512] Tag CLWB instruction to CLFLUSH/PREFETCH scheduler class
llvm-svn: 320156
2017-12-08 15:19:10 +00:00
Alexey Bataev ad1d023d94 [PatternMatch] Add matcher for LoadInst, NFC.
llvm-svn: 320155
2017-12-08 15:17:37 +00:00
Simon Pilgrim 26f106fda4 [X86][AVX512] Tag AVX512_512_SEXT_MASK_* instructions scheduler classes
Match VPTERNLOG which these pseudos will eventually alias to

llvm-svn: 320154
2017-12-08 15:17:32 +00:00
Jonas Hahnfeld 2fcce313ad [CMake] Remove legacy LIBOMP_LIT_ARGS
The bots have been updated, this option isn't needed anymore.

llvm-svn: 320153
2017-12-08 15:07:08 +00:00
Jonas Hahnfeld e628ab4c65 Use hyperbarrier by default on all architectures
All architectures except x86_64 used the linear barrier implementation
by default which doesn't give good performance for a larger number
of threads.

Improvements for PARALLEL overhead (EPCC) with this patch on a Power8
system (2 sockets x 10 cores x 8 threads, OMP_PLACES=cores)

 20 threads:  4.55us -> 3.49us
 40 threads:  8.84us -> 4.06us
 80 threads: 19.18us -> 4.74us
160 threads: 54.22us -> 6.73us

Differential Revision: https://reviews.llvm.org/D40358

llvm-svn: 320152
2017-12-08 15:07:07 +00:00
Jonas Hahnfeld ce528acf0d Fix thread affinity on non-x86 Linux
To make thread affinity work according to the OpenMP spec, the
runtime needs information about the hardware topology. On Linux
the default way is to parse /proc/cpuinfo which contains this
information for x86 machines but (at least) not for AArch64 and
Power architectures.

Fortunately, there is a different code path which is able to get
that data from sysfs. The needed patch has landed in 2006 for
Linux 2.6.16 which is safe to assume nowadays (even RHEL 5 had
a kernel version derived from 2.6.18, and we are now at RHEL 7!).

Differential Revision: https://reviews.llvm.org/D40357

llvm-svn: 320151
2017-12-08 15:07:05 +00:00
Jonas Hahnfeld 86c307821c Add missing memory barrier for queuing locks
Otherwise I see hangs in the omp_single_copyprivate test when
compiling in release mode. With the debug assertions, I get a
failure `head > 0 && tail > 0`.

Differential Revision: https://reviews.llvm.org/D40722

llvm-svn: 320150
2017-12-08 15:07:02 +00:00
Alexey Bataev dfa430f694 [OPENMP] Initial codegen for `target teams distribute` directive.
Host + default devices codegen for `target teams distribute` directive.

llvm-svn: 320149
2017-12-08 15:03:50 +00:00
Sam McCall 44fdcec26f [clangd] Convert lit code completion tests to unit-tests. NFC
Summary: This improves readability of tests and error messages.

Reviewers: ioeric

Subscribers: klimek, ilya-biryukov, cfe-commits

Differential Revision: https://reviews.llvm.org/D40952

llvm-svn: 320148
2017-12-08 15:00:59 +00:00
Alexander Richardson f5ef4e5616 Print the bad value and required alignment for unaligned relocations
Reviewers: ruiu, grimar

Reviewed By: ruiu

Subscribers: emaste, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D40963

llvm-svn: 320147
2017-12-08 14:53:14 +00:00
Tim Renouf cead41d42f [AMDGPU] add labels to +DumpCode output
Summary:
+DumpCode is a hack to embed disassembly in the ELF file. This commit
fixes it to include labels, to make it slightly more useful.

Reviewers: arsenm, kzhuravl

Subscribers: nhaehnle, timcorringham, dstuttard, llvm-commits, t-tye, yaxunl, wdng, kzhuravl

Differential Revision: https://reviews.llvm.org/D40169

llvm-svn: 320146
2017-12-08 14:09:34 +00:00
Max Kazantsev 63a3de057e [NFC] Rename variable from Cond to Pred to make it more sound
llvm-svn: 320144
2017-12-08 12:54:32 +00:00
Max Kazantsev 9c08b7a053 [SCEV] Fix predicate usage in computeExitLimitFromICmp
In this method, we invoke `SimplifyICmpOperands` which takes the `Cond` predicate
by reference and may change it along with `LHS` and `RHS` SCEVs. But then we invoke
`computeShiftCompareExitLimit` with Values from which the SCEVs have been derived,
these Values have not been modified while `Cond` could be.

One of possible outcomes of this is that we may falsely prove that an infinite loop ends
within some finite number of iterations.

In this patch, we save the original `Cond` and pass it along with original operands.
This logic may be removed in future once `computeShiftCompareExitLimit` works
with SCEVs instead of value operands.

Reviewed By: sanjoy
Differential Revision: https://reviews.llvm.org/D40953

llvm-svn: 320142
2017-12-08 12:19:45 +00:00