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Author SHA1 Message Date
Guy Blank 548e22a1a7 [X86][AVX512] Make i1 illegal in the CodeGen 
This patch defines the i1 type as illegal in the X86 backend for AVX512.
For DAG operations on <N x i1> types (build vector, extract vector element, ...) i8 is used, and should be truncated/extended.
This should produce better scalar code for i1 types since GPRs will be used instead of mask registers.

Differential Revision: https://reviews.llvm.org/D32273

llvm-svn: 303421
 2017-05-19 12:35:15 +00:00
Guy Blank 0c42d8c35b VX512] Only look at lower bit in constant scalar masks 
for scalar masked instructions only the lower bit of the mask is relevant. so for constant masks we should either do an unmasked operation or no operation, depending on the value of the lower bit.
This patch handles cases where the lower bit is '1'.

Differential Revision: https://reviews.llvm.org/D32805

llvm-svn: 302546
 2017-05-09 16:16:48 +00:00
Guy Blank 5995802911 [X86][AVX512] Add test for masking of scalar instructions. 
llvm-svn: 302519
 2017-05-09 12:32:48 +00:00