4 Commits

Author	SHA1	Message	Date
Fangrui Song	eb75b8f8f7	[ELF] Move `# REQUIRES:` line to the top ... llvm-svn: 335625	2018-06-26 16:58:19 +00:00
Peter Collingbourne	628ec9f193	ELF: Place relro sections after non-relro sections in r/w segment. ... This is in preparation for my next change, which will introduce a relro nobits section. That requires that relro sections appear at the end of the progbits part of the r/w segment so that the relro nobits section can appear contiguously. Because of the amount of churn required in the test suite, I'm making this change separately. llvm-svn: 291523	2017-01-10 01:21:30 +00:00
Eugene Leviant	ee8dcfbdf7	[ELF] Set max page size to 64K for AArch64 ... Differential revision: https://reviews.llvm.org/D25079 llvm-svn: 283200	2016-10-04 08:58:55 +00:00
George Rimar	4102bfbe71	[ELF/AARCH64] - Implemented R_AARCH64_CONDBR19 relocation. ... R_AARCH64_CONDBR19 is calculated as S+A-P, Set the immediate field of a conditional branch instruction to bits [20:2] of X; check -2^20 ≤ X< 2^20. Afaik there is no document for AARCH64 instruction encoding from official for unknown reason, so I used gold source code and next link as a reference for implementation: http://kitoslab-eng.blogspot.ru/2012/10/armv8-aarch64-instruction-encoding.html. From which is clear that immediate field of a conditional branch instruction is 5 bits off. That is proved by output which is is equal to gold/bfd now. Differential revision: http://reviews.llvm.org/D15809 llvm-svn: 257333	2016-01-11 14:22:00 +00:00