Joerg Sonnenberger
22cd644e1b
[SPARC] Both GNU and Solaris as support eq as condition code for integer ops.
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llvm-svn: 247804
2015-09-16 14:41:36 +00:00
Joerg Sonnenberger
ebe7bf44ec
Add lduw and lwua aliases for SPARCv9.
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llvm-svn: 244535
2015-08-10 23:47:22 +00:00
Joerg Sonnenberger
6dce129051
Add support for the signx instrution alias of SPARCv9.
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llvm-svn: 244519
2015-08-10 22:32:25 +00:00
James Y Knight
89ac11de32
[Sparc] Add more instruction aliases.
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These are mostly from the chart in the SparcV8 spec, section "A.3
Synthetic Instructions".
Differential Revision: http://reviews.llvm.org/D9834
llvm-svn: 241461
2015-07-06 16:01:07 +00:00
James Y Knight
7208a12eef
[Sparc] Add support for flush instruction.
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Differential Revision: http://reviews.llvm.org/D9833
llvm-svn: 241460
2015-07-06 16:01:04 +00:00
James Y Knight
c49e78851c
Sparc: support the "set" synthetic instruction.
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This pseudo-instruction expands into 'sethi' and 'or' instructions,
or, just one of them, if the other isn't necessary for a given value.
Differential Revision: http://reviews.llvm.org/D9089
llvm-svn: 237585
2015-05-18 16:43:33 +00:00
James Y Knight
e8da8096ec
Sparc: Add alternate aliases for conditional branch instructions.
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llvm-svn: 236042
2015-04-28 21:27:31 +00:00
Tim Northover
a670f746a3
Sparc: disable printing of jmp/call aliases (C++ does it)
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These aliases are handled entirely in C++ and only having TableGen InstAliases
for some of them was confusing LLVM.
This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).
llvm-svn: 208966
2014-05-16 09:41:39 +00:00
Venkatraman Govindaraju
925ec9b11e
[Sparc] Add trap on integer condition codes (Ticc) instructions to Sparc backend.
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llvm-svn: 202670
2014-03-02 23:39:07 +00:00
Venkatraman Govindaraju
07d3af2821
[Sparc] Add return/rett instruction to Sparc backend.
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llvm-svn: 202666
2014-03-02 22:55:53 +00:00
Venkatraman Govindaraju
c3084ad294
[Sparc] Add fcmpe* instructions to Sparc backend.
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llvm-svn: 202661
2014-03-02 19:56:19 +00:00
Venkatraman Govindaraju
b745e67a64
[SparcV9] Adds support for branch on integer register instructions (BPr) and conditional moves on integer register (MOVr/FMOVr).
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llvm-svn: 202628
2014-03-02 09:46:56 +00:00
Venkatraman Govindaraju
600f390bb9
[Sparc] Add support for parsing branches and conditional move instructions with %fcc1-%fcc3 conditional registers.
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llvm-svn: 202616
2014-03-02 06:28:15 +00:00
Venkatraman Govindaraju
293a81c406
[Sparc] Make floating point branch instruction formats to accept %fcc0-%fcc1 conditional registers as input.
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No functionality change.
llvm-svn: 202614
2014-03-02 04:43:45 +00:00
Venkatraman Govindaraju
81aae57282
[Sparc] Add support for parsing fcmp with %fcc registers.
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llvm-svn: 202610
2014-03-02 03:39:39 +00:00
Venkatraman Govindaraju
c86e0f3873
[SparcV9] Add support for parsing branch instructions with prediction.
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llvm-svn: 202602
2014-03-01 22:03:07 +00:00
Venkatraman Govindaraju
2286874119
[Sparc] Add support for parsing annulled branch instructions.
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llvm-svn: 202599
2014-03-01 20:08:48 +00:00
Venkatraman Govindaraju
e0c5bff720
[Sparc] Add support for parsing sparcv9 instructions addc/subc/addccc/subccc.
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llvm-svn: 202598
2014-03-01 18:54:52 +00:00
Venkatraman Govindaraju
f7eecf80c4
[Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the readability of the generated code.
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llvm-svn: 202563
2014-03-01 01:04:26 +00:00
Venkatraman Govindaraju
de98fae368
[Sparc] Add support for parsing synthetic instruction 'mov'.
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llvm-svn: 200965
2014-02-07 09:06:52 +00:00
Venkatraman Govindaraju
ad40dfcb4b
[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.
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llvm-svn: 198910
2014-01-10 02:55:27 +00:00
Venkatraman Govindaraju
0d288d3105
[Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl.
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llvm-svn: 198909
2014-01-10 01:48:17 +00:00
Venkatraman Govindaraju
b3b7c38983
[Sparc] Add support for parsing branch instructions and conditional moves.
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llvm-svn: 198738
2014-01-08 06:14:52 +00:00