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11558 Commits

Author SHA1 Message Date
Chris Lattner 2b9f0d100b move the MCAsmInfo .cpp/.h files into the right 
directories and rename them.

llvm-svn: 79768
 2009-08-22 20:58:17 +00:00
Chris Lattner 757dd1cd93 revert 79764, my dependencies failed me again. 
llvm-svn: 79767
 2009-08-22 20:56:12 +00:00
Chris Lattner df16c223da remove dead member. 
llvm-svn: 79764
 2009-08-22 20:50:18 +00:00
Chris Lattner 7b26fce23e Rename TargetAsmInfo (and its subclasses) to MCAsmInfo. 
llvm-svn: 79763
 2009-08-22 20:48:53 +00:00
Devang Patel 0939595711 Record variable debug info at ISel time directly. 
llvm-svn: 79742
 2009-08-22 17:12:53 +00:00
Anton Korobeynikov f0d31ab7b8 Some dummy cost model for s390x: 
- Prefer short-imm instructions over ext-imm, when possible
 - Prefer Z10 instructions over Z9, when possible

This hopefully should fix some dejagnu test fails on solaris

llvm-svn: 79741
 2009-08-22 11:46:16 +00:00
Eli Friedman 682d8c1881 Make x86 test actually test x86 code generation. Fix the 
construct on ARM, which was breaking by coincidence, and add a similar 
testcase for ARM.

llvm-svn: 79719
 2009-08-22 03:13:10 +00:00
Chris Lattner a7668ff636 Revert r79563 
llvm-svn: 79691
 2009-08-21 23:12:47 +00:00
Chris Lattner 773416e062 revert r79562 + r79563 
llvm-svn: 79690
 2009-08-21 23:12:15 +00:00
Chris Lattner f407dbbb1a revert r79631 
llvm-svn: 79686
 2009-08-21 23:08:45 +00:00
Chris Lattner 6af22f02ef revert 79631 
llvm-svn: 79685
 2009-08-21 23:08:09 +00:00
Bob Wilson ceffeb6abd Rename ARM "lane_cst" operands to "nohash_imm" since they are used for 
several things other than Neon vector lane numbers.  For inline assembly
operands with a "c" print code, check that they really are immediates.

llvm-svn: 79676
 2009-08-21 21:58:55 +00:00
Bob Wilson a70623102e Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations, 
now using shuffles instead of intrinsics.

llvm-svn: 79673
 2009-08-21 20:54:19 +00:00
Anton Korobeynikov f31a44ec01 Add fcopysign instructions 
llvm-svn: 79664
 2009-08-21 20:02:37 +00:00
Owen Anderson 2dd877d12a Try again at privatizing the layout info map, with a rewritten patch. 
This preserves the existing behavior much more closely than my previous attempt.

llvm-svn: 79663
 2009-08-21 19:59:12 +00:00
Anton Korobeynikov 47398930e4 Expand few nodes until someone will be crazy enough to implement them natively :) 
llvm-svn: 79659
 2009-08-21 18:52:42 +00:00
Anton Korobeynikov cb7444342b Typo :( 
llvm-svn: 79657
 2009-08-21 18:41:02 +00:00
Anton Korobeynikov 81be4b345a Correct instruction names for subtract-with-borrow 
llvm-svn: 79656
 2009-08-21 18:37:28 +00:00
Anton Korobeynikov a39f96c6ed Handle 'r' inline asm constraint 
llvm-svn: 79648
 2009-08-21 18:15:41 +00:00
Duncan Sands 08b437d600 Fix a problem noticed by gcc-4.4: 
warning: comparison is always true due to limited range of data type.

llvm-svn: 79642
 2009-08-21 17:16:10 +00:00
Daniel Dunbar 2f0e8f55f5 Fix -Asserts warning. 
llvm-svn: 79636
 2009-08-21 16:17:36 +00:00
Anton Korobeynikov 7950510b29 Fix a typo 
llvm-svn: 79634
 2009-08-21 15:41:56 +00:00
Sanjiv Gupta 9ae3bcb79e Add a pass to do call graph analyis to overlay the autos and frame sections of 
leaf functions. This pass will be extended to color other nodes of the call tree 
as well in future.

llvm-svn: 79631
 2009-08-21 15:22:33 +00:00
Anton Korobeynikov eaaca496c5 More cpp backend fixes. Now for FP stuff. 
llvm-svn: 79626
 2009-08-21 12:50:54 +00:00
Anton Korobeynikov 232b19c3d5 Fix some typos and use type-based isel for VZIP/VUZP/VTRN 
llvm-svn: 79625
 2009-08-21 12:41:42 +00:00
Anton Korobeynikov 9a232f46a8 Add lowering of ARM 4-element shuffles to multiple instructios via perfectshuffle-generated table. 
llvm-svn: 79624
 2009-08-21 12:41:24 +00:00
Anton Korobeynikov ce3ff1be8a Add nodes & dummy matchers for some v{zip,uzp,trn} instructions 
llvm-svn: 79622
 2009-08-21 12:40:50 +00:00
Anton Korobeynikov e3046618de Expand EXTRACT_SUBVECTOR 
llvm-svn: 79621
 2009-08-21 12:40:35 +00:00
Anton Korobeynikov 38f284f2ae Provide vext.{16,32} 
llvm-svn: 79620
 2009-08-21 12:40:21 +00:00
Anton Korobeynikov c32e99e3ed Use masks not nodes for vector shuffle predicates. Provide set of 'legal' masks, so legalizer won't infinite cycle 
llvm-svn: 79619
 2009-08-21 12:40:07 +00:00
Bill Wendling 64965aafe7 Remove #include <iostream>. 
llvm-svn: 79603
 2009-08-21 06:52:44 +00:00
Bob Wilson 51c7aa04ec Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these as 
vector shuffles.  Temporarily remove the tests for these operations until the
new implementation is working.

llvm-svn: 79579
 2009-08-21 00:01:42 +00:00
Owen Anderson baa922cf16 Re-revert r79555. Apparently it's not just buildbot weirdness. 
llvm-svn: 79578
 2009-08-20 23:51:44 +00:00
Owen Anderson 9ca906e69d Reapply r79555 for testing. Daniel's trying to work out some buildbot weirdnesss. 
llvm-svn: 79572
 2009-08-20 23:14:20 +00:00
Bill Wendling e3836f99bf --- Reverse-merging r79555 into '.': 
U    include/llvm/Target/TargetData.h
U    lib/Target/TargetData.cpp

Temporarily revert 79555. It was causing hangs and test failures.

llvm-svn: 79568
 2009-08-20 22:04:42 +00:00
Sanjiv Gupta a874d82492 part of the previous commit for PIC16 ISR implementation. 
llvm-svn: 79563
 2009-08-20 19:34:18 +00:00
Sanjiv Gupta 686e9f55dc Implement support for ISRs. 
Clone functions that are shared between the Main thread and Interrupt thread.
CallSites are changed in AsmPrinter currently. A better solution would have been to modify the legalizer (SoftenFloat) to allow targets to change the name of libcalls for float operations. But that currently breaks other targets.
Also, cloing of automatic variables is done AsmPrinter, a better approach would
be to use the ValueMap in CloneFunction itself.

llvm-svn: 79562
 2009-08-20 19:28:24 +00:00
Owen Anderson d2354b8cc5 Make the StructType->StructLayout table private to TargetData, allowing us to avoid locking on it. 
llvm-svn: 79555
 2009-08-20 18:26:03 +00:00
Sean Callanan 46bb77f2cf Fixed PCMPESTRM128 to have opcode 0x60 instead of 0x62, as specified by the 
Intel documentation.

llvm-svn: 79554
 2009-08-20 18:24:27 +00:00
Dan Gohman 05046085b6 Fix an x86 code size regression: prefer RIP-relative addressing 
over absolute addressing even in non-PIC mode (unless the address
has an index or something else incompatible), because it has a
smaller encoding.

llvm-svn: 79553
 2009-08-20 18:23:44 +00:00
Evan Cheng 01de985ae6 Fix an obvious copy-n-paste bug. 
llvm-svn: 79535
 2009-08-20 17:01:04 +00:00
Dan Gohman f91a992c30 Update and fix some comments. 
llvm-svn: 79532
 2009-08-20 16:27:10 +00:00
Dale Johannesen aec3830ce7 Add an extra line to conform with preferred style. 
llvm-svn: 79495
 2009-08-19 23:44:01 +00:00
Reid Kleckner 5c51639e3e Modify an assert to avoid what looks like a GCC 4.2.4 signed-ness bug. 
llvm-svn: 79494
 2009-08-19 23:39:59 +00:00
Dale Johannesen 1d764f61ef Handle 'a' modifier in X86 asms. PR 4742. 
llvm-svn: 79484
 2009-08-19 22:44:41 +00:00
Reid Kleckner d72b091840 Fixed error in CPPBackend from a contextification API change. 
llvm-svn: 79483
 2009-08-19 22:38:37 +00:00
Dan Gohman de255fc8f6 Remove temporary testing code. 
llvm-svn: 79443
 2009-08-19 18:27:08 +00:00
Dan Gohman ac33a9061d Add an x86 peep that narrows TEST instructions to forms that use 
a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.

llvm-svn: 79439
 2009-08-19 18:16:17 +00:00
David Goodwin a7c2dfbca1 Update Cortex-A8 instruction itineraries for integer instructions. 
llvm-svn: 79436
 2009-08-19 18:00:44 +00:00
Bob Wilson 32cd8550ce Add support for Neon VEXT (vector extract) shuffles. 
This is derived from a patch by Anton Korzh.  I modified it to recognize
the VEXT shuffles during legalization and lower them to a target-specific
DAG node.

llvm-svn: 79428
 2009-08-19 17:03:43 +00:00