3 Commits

Author	SHA1	Message	Date
Bryan Chan	123553921f	[AArch64] Support HiSilicon's TSV110 processor ... Reviewers: t.p.northover, SjoerdMeijer, kristof.beyls Reviewed By: kristof.beyls Subscribers: olista01, javed.absar, kristof.beyls, kristina, llvm-commits Differential Revision: https://reviews.llvm.org/D53908 llvm-svn: 346546	2018-11-09 19:32:08 +00:00
Sam Parker	3fa0ccffc6	[AArch64] Add V8_2aOps feature to Cortex-A55 and 75 ... Add the missing hardware features the ProcA55 and ProcA75 feature. These are already enabled via the target parser, but I had missed them in the backend. Differential Revision: https://reviews.llvm.org/D37974 llvm-svn: 313535	2017-09-18 14:46:14 +00:00
Joel Jones	ab0f3b43e3	[AArch64] Add Cavium ThunderX support ... This set of patches adds support for Cavium ThunderX ARM64 processors: * ThunderX * ThunderX T81 * ThunderX T83 * ThunderX T88 Patch by Stefan Teleman Differential Revision: https://reviews.llvm.org/D28891 llvm-svn: 295475	2017-02-17 18:34:24 +00:00