llvm-project

Commit Graph

Author	SHA1	Message	Date
Fangrui Song	ecd6d7254e	[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option A subsequent change will reject -long-option.	2020-03-15 17:46:23 -07:00
Sander de Smalen	e64206a02c	[AArch64][SVE] Asm: Enable instructions to be prefixed. This patch enables instructions that are destructive on their destination- and first source operand, to be prefixed with a MOVPRFX instruction. This patch also adds a variety of tests: - positive tests for all instructions and forms that accept a movprfx for either or both predicated and unpredicated forms. - negative tests for all instructions and forms that do not accept an unpredicated or predicated movprfx. - negative tests for the diagnostics that get emitted when a MOVPRFX instruction is used incorrectly. This is patch [2/2] in a series to add MOVPRFX instructions: - Patch [1/2]: https://reviews.llvm.org/D49592 - Patch [2/2]: https://reviews.llvm.org/D49593 Reviewers: rengolin, SjoerdMeijer, samparker, fhahn, javed.absar Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D49593 llvm-svn: 338261	2018-07-30 16:05:45 +00:00
Sander de Smalen	faee91a52b	[AArch64][SVE] Asm: Support for insert element (INSR) instructions. Insert general purpose register into shifted vector, e.g. insr z0.s, w0 insr z0.d, x0 Insert SIMD&FP scalar register into shifted vector, e.g. insr z0.b, b0 insr z0.h, h0 insr z0.s, s0 insr z0.d, d0 llvm-svn: 336979	2018-07-13 08:51:57 +00:00

Author

SHA1

Message

Date

Fangrui Song

ecd6d7254e

[test] llvm/test/: change llvm-objdump single-dash long options to double-dash options

As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html

Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option
A subsequent change will reject -long-option.

2020-03-15 17:46:23 -07:00

Sander de Smalen

e64206a02c

[AArch64][SVE] Asm: Enable instructions to be prefixed.

This patch enables instructions that are destructive on their
destination- and first source operand, to be prefixed with a
MOVPRFX instruction.

This patch also adds a variety of tests:

- positive tests for all instructions and forms that accept a
  movprfx for either or both predicated and unpredicated forms.

- negative tests for all instructions and forms that do not accept
  an unpredicated or predicated movprfx.

- negative tests for the diagnostics that get emitted when a MOVPRFX
  instruction is used incorrectly.

This is patch [2/2] in a series to add MOVPRFX instructions:
- Patch [1/2]: https://reviews.llvm.org/D49592
- Patch [2/2]: https://reviews.llvm.org/D49593

Reviewers: rengolin, SjoerdMeijer, samparker, fhahn, javed.absar

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D49593

llvm-svn: 338261

2018-07-30 16:05:45 +00:00

Sander de Smalen

faee91a52b

[AArch64][SVE] Asm: Support for insert element (INSR) instructions.

Insert general purpose register into shifted vector, e.g.
  insr    z0.s, w0
  insr    z0.d, x0

Insert SIMD&FP scalar register into shifted vector, e.g.
  insr    z0.b, b0
  insr    z0.h, h0
  insr    z0.s, s0
  insr    z0.d, d0

llvm-svn: 336979

2018-07-13 08:51:57 +00:00

3 Commits