llvm-project

Commit Graph

Author	SHA1	Message	Date
Dylan McKay	d3972a8f11	[AVR] Use the short form of 'clr <reg>' r318895 made it so that the simpler instruction aliases are printed rather than their expanded form. llvm-svn: 318954	2017-11-24 15:36:43 +00:00
Dylan McKay	a789f40002	[AVR] Add the pseudo instruction expansion pass Summary: A lot of the pseudo instructions are required because LLVM assumes that all integers of the same size as the pointer size are legal. This means that it will not currently expand 16-bit instructions to their 8-bit variants because it thinks 16-bit types are legal for the operations. This also adds all of the CodeGen tests that required the pass to run. Reviewers: arsenm, kparzysz Subscribers: wdng, mgorny, modocache, llvm-commits Differential Revision: https://reviews.llvm.org/D26577 llvm-svn: 287162	2016-11-16 21:58:04 +00:00

Author

SHA1

Message

Date

Dylan McKay

d3972a8f11

[AVR] Use the short form of 'clr <reg>'

r318895 made it so that the simpler instruction aliases are printed
rather than their expanded form.

llvm-svn: 318954

2017-11-24 15:36:43 +00:00

Dylan McKay

a789f40002

[AVR] Add the pseudo instruction expansion pass

Summary:
A lot of the pseudo instructions are required because LLVM assumes that
all integers of the same size as the pointer size are legal. This means
that it will not currently expand 16-bit instructions to their 8-bit
variants because it thinks 16-bit types are legal for the operations.

This also adds all of the CodeGen tests that required the pass to run.

Reviewers: arsenm, kparzysz

Subscribers: wdng, mgorny, modocache, llvm-commits

Differential Revision: https://reviews.llvm.org/D26577

llvm-svn: 287162

2016-11-16 21:58:04 +00:00

2 Commits