Commit Graph

371168 Commits

Author SHA1 Message Date
Jonas Devlieghere c29c24be63 [crashlog] Pass the debugger around instead of relying on lldb.debugger
The lldb.debugger et al convenience variables are only available from
the interactive script interpreter. In all other scenarios, they are
None (since fc1fd6bf9f) before that they
were default initialized.

The crashlog script was hacking around that by setting the lldb.debugger
to a newly created debugger instance when running outside of the script
interpreter, which works fine until lldb creates a script interpreter
instance under the hood and clears the variables. This was resulting in
an AttributeError when invoking the script directly (from outside of
lldb):

  AttributeError: 'NoneType' object has no attribute 'GetSourceManager'

This patch fixes that by passing around the debugger instance.

rdar://64775776

Differential revision: https://reviews.llvm.org/D90706
2020-11-04 12:51:26 -08:00
Valentin Clement b45ea4451a [flang][openacc] Lower update directive
This patch upstream the lowering of Update directive that was initially done in
https://github.com/flang-compiler/f18-llvm-project/pull/528

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D90472
2020-11-04 15:48:07 -05:00
Eric Astor e6cd3eff17 Fix -Wsign-compare issue in MasmParser.cpp 2020-11-04 15:43:18 -05:00
Eric Astor 07c4f1d10b [ms] [llvm-ml] Lex MASM strings, including escaping
Allow single-quoted strings and double-quoted character values, as well as doubled-quote escaping.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D89731
2020-11-04 15:28:43 -05:00
Cameron McInally c126eb7529 [SelectionDAG] Add legalizations for VECREDUCE_SEQ_FMUL
Hook up legalizations for VECREDUCE_SEQ_FMUL. This is following up on the VECREDUCE_SEQ_FADD work from D90247.

Differential Revision: https://reviews.llvm.org/D90644
2020-11-04 14:20:31 -06:00
Mircea Trofin 5dc47541f9 [NFC] Use Register/MCRegister
Differential Revision: https://reviews.llvm.org/D90724
2020-11-04 12:20:17 -08:00
Valentin Clement c71adeff24 [flang][openacc] Lower enter data directive
This patch upstream the lowering of Enter Data directive that was initially done in
https://github.com/flang-compiler/f18-llvm-project/pull/526

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D90470
2020-11-04 15:17:50 -05:00
Edd Dawson 1f78ab0ae6 [lld][ELF][test] test LTO-removed symbols are not in symtab
Differential Revision: https://reviews.llvm.org/D90680
2020-11-04 20:06:20 +00:00
Louis Dionne 8e01749bb1 [libc++] Remove stray setting of use_system_cxx_lib left behind 2020-11-04 15:01:59 -05:00
Louis Dionne 70eb30cc81 [libc++] Move availability-related Lit configuration to the DSL
The implementation is not really satisfactory, but it's better than
being in the legacy config, which causes other issues.
2020-11-04 14:56:08 -05:00
Craig Topper cc3bf27077 [RISCV] Remove assertsexti32 from fslw/fsrw isel patterns.
The operations in these patterns shouldn't be effected by sign
bits. And the pattern is starting from a sign_extend_inreg so
we aren't expecting sign bits to be passed through either.

Differential Revision: https://reviews.llvm.org/D90739
2020-11-04 11:37:58 -08:00
Valentin Clement 2e73a1f9fa [flang][openacc] Lower exit data directive
This patch upstream the lowering of Exit Data construct that was initially done in
https://github.com/flang-compiler/f18-llvm-project/pull/527

Reviewed By: schweitz

Differential Revision: https://reviews.llvm.org/D90467
2020-11-04 14:34:43 -05:00
Nikita Popov 52b86d35a4 [MemorySSA] Use provided memory location even if instruction is call
If getClobberingMemoryAccess() is called with an explicit
MemoryLocation, but the starting access happens to be a call, the
provided location is currently ignored, and alias analysis queries
will be performed against the call instruction instead. Something
similar happens if the starting access is a load with a MemoryDef.

Change the implementation to not set Q.Inst in the first place if
we want to perform a MemoryLocation-based query, to make sure it
can't be turned into an Instruction-based query along the way...

Additionally, remove the special handling that lifetime.start
intrinsics currently get. They simply report NoAlias for clobbers
between lifetime.start and other calls, but that's obviously not
right if the other call is something like a memset or memcpy. The
default behavior we get from getModRefInfo() will already do the
right thing here.

Differential Revision: https://reviews.llvm.org/D88782
2020-11-04 20:30:22 +01:00
Steven Wan 09f2c92e5b Add info about the cherry-picked commit and contributor 2020-11-04 14:23:27 -05:00
Steven Wan 296c2f31f0 [PowerPC] Rename mftbl to mftb
`mftb` and `mftbl` are equivalent, there is no need to have two names for doing the same thing, rename `mftbl` to only have `mftb`.

Differential Revision: https://reviews.llvm.org/D89506
2020-11-04 14:23:27 -05:00
Alexandre Eichenberger 0795715616 [mlir][std] Add SignedCeilDivIOp and SignedFloorDivIOp with std to std lowering triggered by -std-expand-divs option. The new operations support positive/negative nominator/denominator numbers.
Differential Revision: https://reviews.llvm.org/D89726

Signed-off-by: Alexandre Eichenberger <alexe@us.ibm.com>
2020-11-04 14:16:23 -05:00
Craig Topper d47300f503 [RISCV] Correct the operand order for fshl/fshr to fsl/fsr instructions.
fsl/fsr take their shift amount in $rs2 or an immediate. The
sources are $rs1 and $rs3.

fshl/fshr ISD opcodes both concatenate operand 0 in the high bits and
operand 1 in the lower bits. fshl returns the high bits after
shifting and fshr returns the low bits. So a shift amount of 0
returns operand 0 for fshl and operand 1 for fshr.

fsl/fsr concatenate their operands in different orders such that
$rs1 will be returned for a shift amount of 0. So $rs1 needs to
come from operand 0 of fshl and operand 1 of fshr.

Differential Revision: https://reviews.llvm.org/D90735
2020-11-04 11:13:25 -08:00
Duncan P. N. Exon Smith 77a9e0a4af Basic: Split out DirectoryEntry.h, NFC
Move `DirectoryEntry` and `DirectoryEntryRef` into their own header,
similar to the creation of FileEntry.h. No functionality change here,
just preparing to include it in more places to allow wider adoption of
`DirectoryEntryRef` without requiring all of `FileManager.h`.

Differential Revision: https://reviews.llvm.org/D90478
2020-11-04 14:11:57 -05:00
Fraser Cormack f99580c1e5 [DAGCombine] Fix bug in load scalarization
Summary:
For vector element types which are not byte-sized, we would generate
incorrect scalar offsets and produce incorrect codegen.

This optimization could potentially be supported in the future, e.g. by
loading in bytes, then shifting and masking out the remaining bits of
the vector element. However, without an upstream target to test against
it's best to avoid the bad codegen in the simplest possible way.

Related to this bug:

  https://bugs.llvm.org/show_bug.cgi?id=27600

Reviewed by: foad

Differential Revision: https://reviews.llvm.org/D78568
2020-11-04 19:02:40 +00:00
Louis Dionne 0df0d0fe2d [libc++] NFC: Remove trailing whitespace 2020-11-04 14:08:06 -05:00
Mehdi Amini 5b29d26b21 Refactor PyPrintAccumulatorm, PyFileAccumulator, and PySinglePartStringAccumulator from IRModules.cpp to PybindUtils.h
These are reusable utilities across bindings.

Differential Revision: https://reviews.llvm.org/D90737
2020-11-04 18:46:36 +00:00
Mehdi Amini bf5c8625c4 Move MlirStringCallback declaration from mlir-c/IR.h to mlir-c/Support.h (NFC)
This is a generic utility that can be reused beyond the IR bindings.

Differential Revision: https://reviews.llvm.org/D90736
2020-11-04 18:46:36 +00:00
cchen d0d43b58b1 [OpenMP] target nested `use_device_ptr() if()` and is_device_ptr trigger asserts
Clang now asserts for the below case:
```
void clang::CodeGen::CGOpenMPRuntime::createOffloadEntriesAndInfoMetadata(): Assertion `std::get<0>(E) && "All ordered entries must exist!"' failed.
```

The reason why Clang hit the assert is because in
`emitTargetDataCalls`, both `BeginThenGen` and `BeginElseGen` call
`registerTargetRegionEntryInfo` and try to register the Entry in
OffloadEntriesTargetRegion with same key. If changing the expression in
if clause to any constant expression, then the assert disappear. (https://godbolt.org/z/TW7haj)

The assert itself is to avoid
user from accessing elements out of bound inside `OrderedEntries` in
`createOffloadEntriesAndInfoMetadata`.

In this patch, I add a check in `registerTargetRegionEntryInfo` to avoid
register the target region more than once.

A test case that triggers assert: https://godbolt.org/z/4cnGW8

Reviewed By: ABataev

Differential Revision: https://reviews.llvm.org/D90704
2020-11-04 12:36:57 -06:00
Craig Topper 0122a4ea66 [RISCV] Remove assertsexti32 from inputs to riscv_sllw/srlw nodes in B extension isel patterns.
riscv_sllw/srlw only reads the lower 32 bits of the first operand.
And the lower 5 bits of the second operands. Whether the upper
32 bits of the input are sign bits or not doesn't matter.

Also use ineg and not to shorten the patterns.

Differential Revision: https://reviews.llvm.org/D90668
2020-11-04 10:35:05 -08:00
Rahul Joshi 8c2025cc61 [MLIR] Refactor memref type -> LLVM Type conversion
- Eliminate duplicated information about mapping from memref -> its descriptor fields
  by consolidating that mapping in two functions:  getMemRefDescriptorFields and
  getUnrankedMemRefDescriptorFields.
- Change convertMemRefType() and convertUnrankedMemRefType() to use these
  functions.
- Remove convertMemrefSignature and convertUnrankedMemrefSignature.

Differential Revision: https://reviews.llvm.org/D90707
2020-11-04 10:32:56 -08:00
Rahul Joshi 63e72aa4f5 [MLIR] Remove NoSideEffect from std.global_memref op.
- Also spell "isUninitialized" correctly.

Differential Revision: https://reviews.llvm.org/D90768
2020-11-04 10:31:19 -08:00
Arnold Schwaighofer ea5989b43a Start of an llvm.coro.async implementation
This patch adds the `async` lowering of coroutines.

This will be used by the Swift frontend to lower async functions. In
contrast to the `retcon` lowering the frontend needs to be in control
over control-flow at suspend points as execution might be suspended at
these points.

This is very much work in progress and the implementation will change as
it evolves with the frontend. As such the documentation is lacking
detail as some of it might change.

rdar://70097093

Reapply with fix for memory sanitizer failure and sphinx failure.

Differential Revision: https://reviews.llvm.org/D90612
2020-11-04 10:29:21 -08:00
Sean Silva eb8d386d51 [mlir] Make linalg-bufferize a composable bufferization pass
Previously, linalg-bufferize was a "finalizing" bufferization pass (it
did a "full" conversion). This wasn't great because it couldn't be used
composably with other bufferization passes like std-bufferize and
scf-bufferize.

This patch makes linalg-bufferize a composable bufferization pass.
Notice that the integration tests are switched over to using a pipeline
of std-bufferize, linalg-bufferize, and (to finalize the conversion)
func-bufferize. It all "just works" together.

While doing this transition, I ran into a nasty bug in the 1-use special
case logic for forwarding init tensors. That logic, while
well-intentioned, was fundamentally flawed, because it assumed that if
the original tensor value had one use, then the converted memref could
be mutated in place. That assumption is wrong in many cases. For
example:

```
  %0 = some_tensor : tensor<4xf32>
  br ^bb0(%0, %0: tensor<4xf32>, tensor<4xf32>)
^bb0(%bbarg0: tensor<4xf32>, %bbarg1: tensor<4xf32>)
  // %bbarg0 is an alias of %bbarg1. We cannot safely write
  // to it without analyzing uses of %bbarg1.
  linalg.generic ... init(%bbarg0) {...}
```

A similar example can happen in many scenarios with function arguments.
Even more sinister, if the converted memref is produced by a
`std.get_global_memref` of a constant global memref, then we might
attempt to write into read-only statically allocated storage! Not all
memrefs are writable!

Clearly, this 1-use check is not a local transformation that we can do
on the fly in this pattern, so I removed it.

The test is now drastically shorter and I basically rewrote the CHECK
lines from scratch because:
- the new composable linalg-bufferize just doesn't do as much, so there
is less to test
- a lot of the tests were related to the 1-use check, which is now gone,
so there is less to test
- the `-buffer-hoisting -buffer-deallocation` is no longer mixed in, so
the checks related to that had to be rewritten

Differential Revision: https://reviews.llvm.org/D90657
2020-11-04 10:16:55 -08:00
Sean Silva f556af965f [mlir] Fix materializations for unranked tensors.
Differential Revision: https://reviews.llvm.org/D90656
2020-11-04 10:16:55 -08:00
Craig Topper 857563eaf0 [RISCV] Check all 64-bits of the mask in SelectRORIW.
We need to ensure the upper 32 bits of the mask are zero.
So that the srl shifts zeroes into the lower 32 bits.

Differential Revision: https://reviews.llvm.org/D90585
2020-11-04 10:15:30 -08:00
Mehdi Amini c7994bd939 Switch from C-style comments `/* ... */` to C++ style `//` (NFC)
This is mostly a scripted update, it may not be perfect.

function replace() {
  FROM=$1
  TO=$2
  git grep "$FROM" $REPO_PATH |cut -f 1 -d : | sort -u | \
    while read file; do
      sed -i "s#$FROM#$TO#" $file ;
    done
}

replace '|\*===----------------------------------------------------------------------===\*|$' '//===----------------------------------------------------------------------===//'
replace '^/\* =' '//=='
replace '^/\*=' '//='
replace '^\\\*=' '//='
replace '^|\*' '//'
replace ' \*|$' ''
replace '=\*\\$' '=//'
replace '== \*/$' '===//'
replace '==\*/$' '==//'
replace '^/\*\*\(.*\)\*/$' '///\1'
replace '^/\*\(.*\)\*/$' '//\1'
replace '//============================================================================//' '//===----------------------------------------------------------------------===//'

Differential Revision: https://reviews.llvm.org/D90732
2020-11-04 18:11:13 +00:00
Christopher Tetreault 900ec97bbe [UBSan] Cannot negate smallest negative signed integer
Silence warning Undefined Behavior Sanitzer warning:
runtime error: negation of -9223372036854775808 cannot be represented in type 'int64_t' (aka 'long'); cast to an unsigned type to negate this value to itself

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D90710
2020-11-04 10:07:52 -08:00
Craig Topper 3701e33a22 [RISCV] Remove custom isel for (srl (shl val, 32), imm). Use pattern instead. NFCI
We don't need custom matching, we just a need a predicate to check
the immediate is greater than 32. We can use the existing ImmSub32
to adjust the immediate.

I've also used the new predicate in the other location that used
ImmSub32. I tried to create a test case where we would break without
the greater than 32 check on that pattern, but DAG combine defeated me.
Still seemed safer to have it.

Differential Revision: https://reviews.llvm.org/D90546
2020-11-04 09:59:14 -08:00
Joe Nash 58adab34c4 [AMDGPU] Resolve pseudo registers at encoding uses
Pseudo-registers allow different register encodings
between gpu generations. Make sure we resolve the
pseudo regs to real regs whenever we get their
hardware encoding.
Using the correct encodings revealed a register
bank conflict and an unnecessary write dependency.
Tests have been updated to match.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D90721

Change-Id: I73c154cd24aecc820993b50bebaf4df97a5710ca
2020-11-04 12:52:32 -05:00
Fangrui Song bbeb08497c Revert "[GlobalISel] GISelKnownBits::computeKnownBitsImpl - Replace TargetOpcode::G_MUL handling with the common KnownBits::computeForMul implementation"
This reverts commit 0b8711e1af which broke GlobalISelTests AArch64GISelMITest.TestKnownBits
2020-11-04 09:54:04 -08:00
Arthur Eubanks d8f531c42c [NewPM] Don't run before pass instrumentation on required passes
This allows those instrumentation to log when they decide to skip a
pass. This provides extra helpful info for optnone functions and also
will help with opt-bisect.

Have OptNoneInstrumentation print when it skips due to seeing optnone.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D90545
2020-11-04 09:45:10 -08:00
Sebastian Neubauer 31a0b2834f [AMDGPU] Fix iterating in SIFixSGPRCopies
The insertion of waterfall loops splits the current basic block into
three blocks. So the basic block that we iterate over must be updated.

This failed assert(!NodePtr->isKnownSentinel()) in ilist_iterator for
divergent calls in branches before.

Differential Revision: https://reviews.llvm.org/D90596
2020-11-04 18:43:19 +01:00
Fangrui Song ee142c4988 [llvm-objcopy] Make --set-section-flags work with --add-section
This matches behavior GNU objcopy and can simplify clang-offload-bundler
(which currently works around the issue by invoking llvm-objcopy twice).

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D90438
2020-11-04 09:39:14 -08:00
Alexander Shaposhnikov f7649f2d13 [llvm-objcopy][MachO] Make isValidMachOCannonicalName static
This diff makes the function isValidMachOCannonicalName static.
NFC.

Test plan: make check-all
2020-11-04 09:37:29 -08:00
Mehdi Amini aeb4b1a9d8 Add facilities to print/parse a pass pipeline through the C API
This also includes and exercise a register function for individual
passes.

Differential Revision: https://reviews.llvm.org/D90728
2020-11-04 17:29:49 +00:00
Simon Pilgrim ecbd0413af [KnownBits] KnownBits::computeForMul - avoid unnecessary APInt copies. NFCI.
Use const references instead.
2020-11-04 17:25:25 +00:00
Simon Pilgrim 0b8711e1af [GlobalISel] GISelKnownBits::computeKnownBitsImpl - Replace TargetOpcode::G_MUL handling with the common KnownBits::computeForMul implementation
Avoid code duplication
2020-11-04 17:25:24 +00:00
Nabeel Omer 3ebcef4b73 [Dexter] add visual studio 2019 debugger support
Adds visual studio debugger support to dexter via option --debugger vs2019

Differential Revision: https://reviews.llvm.org/D89803

Author:    Nabeel Omer <nabeel.omer@sony.com>
2020-11-04 16:57:19 +00:00
Nabeel Omer 91c3c67c40 [Dexter] add an optnone attribute debug experience test for loops.
adds a test that checks debugging experience in functions that are marked
__attribute__((optnone)) and have loops inside them.

Differential Revision: https://reviews.llvm.org/D89873

Author:    Nabeel Omer <nabeel.omer@sony.com>
2020-11-04 16:54:36 +00:00
Louis Dionne 6706342f48 [libc++] Remove the ability to not install the support headers
Those are part of the library, and shipping them just adds a tiny bit of
size to the distribution. This was originally added in b422ecc7de to
make it possible to match the Makefile build, which doesn't exist anymore.

The upside is build system simplification.
2020-11-04 11:45:34 -05:00
Arnold Schwaighofer 42f1916640 Revert "Start of an llvm.coro.async implementation"
This reverts commit ea606cced0.

This patch causes memory sanitizer failures sanitizer-x86_64-linux-fast.
2020-11-04 08:26:20 -08:00
Louis Dionne 9d58dab6f6 [libc++] Split off part of a test that require signals into a separate test
This will allow running the basic test on all platforms, and the part that
requires signals on platforms that support them only.
2020-11-04 11:20:47 -05:00
Vy Nguyen 6b67e22ea3 Fix breakage in D89615 (due to cmake version 3.16.5)
Differential Revision: https://reviews.llvm.org/D90764
2020-11-04 11:19:01 -05:00
Kadir Cetinkaya ed424b4288
[clangd] Cleanup dependencies around RemoteIndex
RemoteIndexClient implementations only depends on clangdSupport for
logging functionality and has no dependence on clangDeamon itself. This clears
out that link time dependency and enables depending on it in clangDeamon itself,
so that we can have other index implementations that makes use of the
RemoteIndex.

Differential Revision: https://reviews.llvm.org/D90746
2020-11-04 16:58:11 +01:00
LLVM GN Syncbot 2ce5b8f78c [gn build] Port d1b2a52319 2020-11-04 15:36:49 +00:00